[6/7] clk: rockchip: rk3328: Return zero for USB480M clocks
diff mbox series

Message ID 20230602152631.106887-7-jagan@amarulasolutions.com
State New
Headers show
Series
  • rockchip: Fix RK3328 USB support
Related show

Commit Message

Jagan Teki June 2, 2023, 3:26 p.m. UTC 
RK3328 u2phy has assigned-clock-rates on USB480M, return zero
for them since the default rates will work fine.

Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 drivers/clk/rockchip/clk_rk3328.c | 1 +
 1 file changed, 1 insertion(+)

Patch
diff mbox series 

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 969b7a8581..0e9b506890 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -681,6 +681,7 @@  static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case ACLK_GMAC:
 	case PCLK_GMAC:
 	case SCLK_USB3OTG_SUSPEND:
+	case USB480M:
 		return 0;
 	default:
 		return -ENOENT;