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[209.85.220.41]) by mx.google.com with SMTPS id g20-20020a625214000000b00659e904e28csor1948566pfb.11.2023.06.06.10.10.07 for (Google Transport Security); Tue, 06 Jun 2023 10:10:07 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:903:1207:b0:1b1:9d43:ad4c with SMTP id l7-20020a170903120700b001b19d43ad4cmr2001817plh.40.1686071407498; Tue, 06 Jun 2023 10:10:07 -0700 (PDT) Received: from localhost.localdomain ([2401:4900:2001:f7d3:5b78:1d82:fb5f:608c]) by smtp.gmail.com with ESMTPSA id bc8-20020a170902930800b001ab0159b9edsm8695129plb.250.2023.06.06.10.10.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 10:10:06 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Jonas Karlman , u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki , Lukasz Majewski , Sean Anderson Subject: [PATCH v2 6/7] clk: rockchip: rk3328: Handle usb480m phy clock Date: Tue, 6 Jun 2023 22:39:17 +0530 Message-Id: <20230606170918.45581-7-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230606170918.45581-1-jagan@amarulasolutions.com> References: <20230606170918.45581-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=HYwJOy8O; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Handle USB480M clock ID in set_rate() and set_parent() to allow the dt assigned-clocks and assigned-clock-parents work on rk3328.dtsi Cc: Lukasz Majewski Cc: Sean Anderson Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- Changes for v2: - add USB480M to set_parent drivers/clk/rockchip/clk_rk3328.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c index 969b7a8581..ef97381f0e 100644 --- a/drivers/clk/rockchip/clk_rk3328.c +++ b/drivers/clk/rockchip/clk_rk3328.c @@ -681,6 +681,7 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate) case ACLK_GMAC: case PCLK_GMAC: case SCLK_USB3OTG_SUSPEND: + case USB480M: return 0; default: return -ENOENT; @@ -771,6 +772,7 @@ static int rk3328_clk_set_parent(struct clk *clk, struct clk *parent) case SCLK_MAC2IO_EXT: return rk3328_gmac2io_ext_set_parent(clk, parent); case DCLK_LCDC: + case USB480M: case SCLK_PDM: case SCLK_RTC32K: case SCLK_UART0: