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[79.54.71.141]) by smtp.gmail.com with ESMTPSA id v22-20020aa7d9d6000000b0052568bf9411sm4850232eds.68.2023.09.03.13.57.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 03 Sep 2023 13:57:10 -0700 (PDT) From: Dario Binacchi To: u-boot@lists.denx.de Cc: linux-amarula@amarulasolutions.com, Dario Binacchi , Anatolij Gustschin , Patrice Chotard , Patrick Delaunay , Simon Glass , Tom Rini , uboot-stm32@st-md-mailman.stormreply.com Subject: [RFC PATCH 4/5] ARM: dts: stm32: support display on stm32f469-disco board Date: Sun, 3 Sep 2023 22:57:02 +0200 Message-Id: <20230903205703.662080-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230903205703.662080-1-dario.binacchi@amarulasolutions.com> References: <20230903205703.662080-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=num199Cv; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add support to Orise Tech OTM8009A display on stm32f469-disco board. It was necessary to retrieve the framebuffer address from the device tree because the address returned by the video-uclass driver pointed to a memory area that was not usable. Furthermore, unlike Linux, the DSI driver requires the LTDC clock to be properly probed. Hence, the changes made to the DSI node in stm32f469-disco-u-boot.dtsi. Signed-off-by: Dario Binacchi --- arch/arm/dts/stm32f469-disco-u-boot.dtsi | 4 +++ configs/stm32f469-discovery_defconfig | 13 +++++++++ drivers/video/stm32/stm32_ltdc.c | 37 +++++++++++++++++++++++- 3 files changed, 53 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi index 8e781c5a7b23..47ba9fa4a783 100644 --- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi @@ -92,7 +92,9 @@ &dsi { clocks = <&rcc 0 STM32F4_APB2_CLOCK(DSI)>, + <&rcc 0 STM32F4_APB2_CLOCK(LTDC)>, <&clk_hse>; + clock-names = "pclk", "px_clk", "ref"; }; &gpioa { @@ -140,6 +142,8 @@ }; <dc { + bootph-all; + clocks = <&rcc 0 STM32F4_APB2_CLOCK(LTDC)>; }; diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig index 35d18d58be6f..9796b8f2d9a5 100644 --- a/configs/stm32f469-discovery_defconfig +++ b/configs/stm32f469-discovery_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y # CONFIG_ISO_PARTITION is not set @@ -40,3 +41,15 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y +CONFIG_VIDEO=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=480 +CONFIG_VIDEO_STM32_MAX_YRES=800 +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index f48badc517a8..428b0addc43c 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -494,6 +494,34 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv *priv, ulong fb_addr) setbits_le32(priv->regs + LTDC_L1CR, LXCR_LEN); } +#if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY) +static int stm32_ltdc_get_fb_addr(struct udevice *dev, ulong *base, uint size, + uint align) +{ + phys_addr_t cpu; + dma_addr_t bus; + u64 dma_size; + int ret; + + ret = dev_get_dma_range(dev, &cpu, &bus, &dma_size); + if (ret) { + dev_err(dev, "failed to get dma address\n"); + return ret; + } + + *base = bus + 0x1000000 - ALIGN(size, align); + return 0; +} +#else +static int stm32_ltdc_get_fb_addr(struct udevice *dev, ulong *base, uint size, + uint align) +{ + /* Delegate framebuffer allocation to video-uclass */ + *base = 0; + return 0; +} +#endif + static int stm32_ltdc_probe(struct udevice *dev) { struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev); @@ -504,7 +532,7 @@ static int stm32_ltdc_probe(struct udevice *dev) struct display_timing timings; struct clk pclk; struct reset_ctl rst; - ulong rate; + ulong rate, fb_base; int ret; priv->regs = dev_read_addr_ptr(dev); @@ -604,6 +632,13 @@ static int stm32_ltdc_probe(struct udevice *dev) priv->crop_h = timings.vactive.typ; priv->alpha = 0xFF; + ret = stm32_ltdc_get_fb_addr(dev, &fb_base, uc_plat->size, + uc_plat->align); + if (ret) + return ret; + + uc_plat->base = fb_base; + dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n", timings.hactive.typ, timings.vactive.typ, VNBITS(priv->l2bpp), uc_plat->base);