[3/3] arm64: dts: rockchip: Add Engicam PX30.Core C.TOUCH 2.0 7" OF

Message ID 20240521153800.3478838-4-francesco.nicolettap@amarulasolutions.com
State New
Headers show
Series
  • Add of7 DTS support and of10 GPU bindings
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Commit Message

Francesco Nicoletta Puzzillo May 21, 2024, 3:38 p.m. UTC
X30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

7" OF is a capacitive touch 7" Open Frame panel solutions.

PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
7" OF for creating complete PX30.Core C.TOUCH 2.0 7" Open Frame.

Add support for it.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
 .../devicetree/bindings/arm/rockchip.yaml     |  6 +++
 arch/arm64/boot/dts/rockchip/Makefile         |  1 +
 .../px30-engicam-px30-core-ctouch2-of7.dts    | 47 +++++++++++++++++++
 3 files changed, 54 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-ctouch2-of7.dts

Patch

diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index e04c213a0dee..c1fa33bb5772 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -136,6 +136,12 @@  properties:
           - const: engicam,px30-core
           - const: rockchip,px30
 
+      - description: Engicam PX30.Core C.TOUCH 2.0 7" Open Frame
+        items:
+          - const: engicam,px30-core-ctouch2-of7
+          - const: engicam,px30-core
+          - const: rockchip,px30
+
       - description: Engicam PX30.Core C.TOUCH 2.0 10.1" Open Frame
         items:
           - const: engicam,px30-core-ctouch2-of10
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index f42fa62b4064..45630ff1b5bd 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -1,6 +1,7 @@ 
 # SPDX-License-Identifier: GPL-2.0
 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of7.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-edimm2.2.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-ringneck-haikou.dtb
diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-ctouch2-of7.dts b/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-ctouch2-of7.dts
new file mode 100644
index 000000000000..0c7a35a26978
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-ctouch2-of7.dts
@@ -0,0 +1,47 @@ 
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "px30.dtsi"
+#include "px30-engicam-ctouch2.dtsi"
+#include "px30-engicam-px30-core.dtsi"
+#include "px30-engicam-px30-core-ctouch2-of.dtsi"
+
+/ {
+	model = "Engicam PX30.Core C.TOUCH 2.0 7\" Open Frame";
+	compatible = "engicam,px30-core-ctouch2-of7", "engicam,px30-core",
+		     "rockchip,px30";
+
+
+	panel {
+		compatible = "yes-optoelectronics,ytc700tlag-05-201c";
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	polytouch: edt-ft5x26@38 {
+		compatible = "edt,edt-ft5506";
+		reg = <0x38>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&edt_ft5x06_pins>;
+		interrupt-parent = <&gpio2>;
+		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
+		touchscreen-size-x = <1024>;
+		touchscreen-size-y = <600>;
+	};
+};
+
+&pinctrl {
+	politouch {
+		edt_ft5x06_pins: edt-ft5x06-pins {
+			rockchip,pins =
+				<2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};