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[209.85.220.41]) by mx.google.com with SMTPS id a640c23a62f3a-a5a1798918dsor771953566b.12.2024.05.21.08.38.29 for (Google Transport Security); Tue, 21 May 2024 08:38:29 -0700 (PDT) Received-SPF: pass (google.com: domain of francesco.nicolettap@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:907:7b8a:b0:a59:9b8e:aa61 with SMTP id a640c23a62f3a-a5a2d5c9303mr2848733066b.35.1716305908782; Tue, 21 May 2024 08:38:28 -0700 (PDT) Received: from nomnp-ThinkPad-T14s-Gen-2i.amarulasolutions.com ([2001:b07:add:9f96:84a3:ea6:7aa2:bacd]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a5a1781d2dcsm1626379366b.44.2024.05.21.08.38.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 May 2024 08:38:28 -0700 (PDT) From: Francesco Nicoletta Puzzillo To: linux-amarula@amarulasolutions.com Cc: michael@amarulasolutions.com, dario.binacchi@amarulasolutions.com , patrick.barsanti@amarulasolutions.com, margherita.milani@amarulasolutions.com, meena.murthy@amarulasolutions.com, andrea.calabrese@amarulasolutions.com, flavia.caforio@amarulasolutions.com, francesco.nicolettap@amarulasolutions.com Subject: [PATCH 3/3] arm64: dts: rockchip: Add Engicam PX30.Core C.TOUCH 2.0 7" OF Date: Tue, 21 May 2024 17:38:00 +0200 Message-Id: <20240521153800.3478838-4-francesco.nicolettap@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240521153800.3478838-1-francesco.nicolettap@amarulasolutions.com> References: <20240521153800.3478838-1-francesco.nicolettap@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: francesco.nicolettap@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=bUW7PE4Y; spf=pass (google.com: domain of francesco.nicolettap@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=francesco.nicolettap@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , X30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. C.TOUCH 2.0 is a general purpose carrier board with capacitive touch interface support. 7" OF is a capacitive touch 7" Open Frame panel solutions. PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged 7" OF for creating complete PX30.Core C.TOUCH 2.0 7" Open Frame. Add support for it. Signed-off-by: Michael Trimarchi --- .../devicetree/bindings/arm/rockchip.yaml | 6 +++ arch/arm64/boot/dts/rockchip/Makefile | 1 + .../px30-engicam-px30-core-ctouch2-of7.dts | 47 +++++++++++++++++++ 3 files changed, 54 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-ctouch2-of7.dts diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index e04c213a0dee..c1fa33bb5772 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -136,6 +136,12 @@ properties: - const: engicam,px30-core - const: rockchip,px30 + - description: Engicam PX30.Core C.TOUCH 2.0 7" Open Frame + items: + - const: engicam,px30-core-ctouch2-of7 + - const: engicam,px30-core + - const: rockchip,px30 + - description: Engicam PX30.Core C.TOUCH 2.0 10.1" Open Frame items: - const: engicam,px30-core-ctouch2-of10 diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index f42fa62b4064..45630ff1b5bd 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of7.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-edimm2.2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-ringneck-haikou.dtb diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-ctouch2-of7.dts b/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-ctouch2-of7.dts new file mode 100644 index 000000000000..0c7a35a26978 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-ctouch2-of7.dts @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd + * Copyright (c) 2020 Engicam srl + * Copyright (c) 2020 Amarula Solutions(India) + */ + +/dts-v1/; +#include "px30.dtsi" +#include "px30-engicam-ctouch2.dtsi" +#include "px30-engicam-px30-core.dtsi" +#include "px30-engicam-px30-core-ctouch2-of.dtsi" + +/ { + model = "Engicam PX30.Core C.TOUCH 2.0 7\" Open Frame"; + compatible = "engicam,px30-core-ctouch2-of7", "engicam,px30-core", + "rockchip,px30"; + + + panel { + compatible = "yes-optoelectronics,ytc700tlag-05-201c"; + }; +}; + +&i2c1 { + status = "okay"; + + polytouch: edt-ft5x26@38 { + compatible = "edt,edt-ft5506"; + reg = <0x38>; + pinctrl-names = "default"; + pinctrl-0 = <&edt_ft5x06_pins>; + interrupt-parent = <&gpio2>; + interrupts = <8 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <1024>; + touchscreen-size-y = <600>; + }; +}; + +&pinctrl { + politouch { + edt_ft5x06_pins: edt-ft5x06-pins { + rockchip,pins = + <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +};