Message ID | 20240713084526.922537-10-michael@amarulasolutions.com |
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diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index 685e7df0e5..275f119686 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -170,6 +170,8 @@ static const char * const imx8mm_ecspi3_sels[] = {"clock-osc-24m", "sys_pll2_200 static int imx8mm_clk_probe(struct udevice *dev) { void __iomem *base; + struct clk *clk; + int ret; base = (void *)ANATOP_BASE_ADDR; @@ -448,6 +450,13 @@ static int imx8mm_clk_probe(struct udevice *dev) clk_dm(IMX8MM_CLK_QSPI_ROOT, imx_clk_gate4("qspi_root_clk", "qspi", base + 0x42f0, 0)); #endif + ret = clk_get_by_id(IMX8MM_SYS_PLL2, &clk); + if (!ret) + clk_enable(clk); + + ret = clk_get_by_id(IMX8MM_SYS_PLL3, &clk); + if (!ret) + clk_enable(clk); return 0; }
Both clock are enabled by the bootloader and we need to increase their reference count to avoid disable during reparent operation. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> --- drivers/clk/imx/clk-imx8mm.c | 9 +++++++++ 1 file changed, 9 insertions(+)