From patchwork Sat Jul 13 08:45:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Trimarchi X-Patchwork-Id: 3223 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-lf1-f70.google.com (mail-lf1-f70.google.com [209.85.167.70]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 23C8340F45 for ; Sat, 13 Jul 2024 10:46:02 +0200 (CEST) Received: by mail-lf1-f70.google.com with SMTP id 2adb3069b0e04-52e969d34a9sf3184856e87.2 for ; Sat, 13 Jul 2024 01:46:02 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1720860361; cv=pass; d=google.com; s=arc-20160816; b=g0r7c00bRHDbG8XSHPu3cKgXeQbf1PukND5IhHowbaZYxieVN8Cvj09LhpHLlsnsku 3iCBYOhzUo+L5vE93c4k+g+rm6C0cyCgnf6AWVd7Ynl8SVzGZTXwacuYT85HpN9DBLsR 94mRfYOsKY2iV0yCs8xv24TH2rBVeZ+1m0bGOtaHJqUeKHz5xk0e9XlKYWPhp5mQOCEC EKM+OVG9duAkNi5CmmRgyCr2+m+AsgzaGUeBFGqUBoUjT91IkcfZkhuvgMFPyalM/WAN vEnAk9O6U9uIwI3q2Wlyzb1llPNg4j1DrxAYVOvBLhllQa9XYRJdpd/IsWQxA/5qv66o VNpg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=krP4NUGSkeUMNK8SEII3obvO7Ty4Vj7hFPOtuUS94Cs=; fh=piiZG4bYg+VUnUmbFj69Lv4Lk7Sr4CshsOClnvQC8/Y=; b=xd9p09slNMVk7I8rJsaLcDClHEl2IRwqGqyvTR5ywy1qzZzD+LA0YymOGhaG1eOQuu rJA4zPlb0izm4K8t1dEXrXybzvWWmgBKZxLoMTlxnL1ZAsDwn5Zfko+yv/v5iz9CeyXy 95scynITXd7kidB1t09SILEFkPH8T//dWcXZivBA44p8shNEwKtuhVtHjpCTryqdE7kz r0/BLJHJI1Jdnhq0bhcPPEa3kiZbZVJco1q2pxoEglf32oyKuIA2NT6RxE7ZT3h7r03X vDPOlf2VB3ZpT1iEsimfc4a0sZyXV2Czt8Rew+859q/Ht6E9xU/ZEJdpAx+DIVe3AVm+ ZIkQ==; darn=patchwork.amarulasolutions.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="JkSi/f8R"; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1720860361; x=1721465161; darn=patchwork.amarulasolutions.com; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:x-original-authentication-results :x-original-sender:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:from:to:cc:subject:date:message-id:reply-to; bh=krP4NUGSkeUMNK8SEII3obvO7Ty4Vj7hFPOtuUS94Cs=; b=XNviO2IrR0LofzHLk9cWce2uH5elKgAt+5njyra5uChU+eedbES9FY+2mOcab6/IlB TGyM9oabY5clMgp9aLDBlljgtuZmanQgpm13rX7w4vw7FE+MR1bnKw09CPhoiU74oWMV +l65ZnBMoNCzwrj4YggfKH5NoA4L5/h8gwYLA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720860361; x=1721465161; h=list-unsubscribe:list-archive:list-help:list-post :x-spam-checked-in-group:list-id:mailing-list:precedence :x-original-authentication-results:x-original-sender:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :x-beenthere:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=krP4NUGSkeUMNK8SEII3obvO7Ty4Vj7hFPOtuUS94Cs=; b=Kqz2Ew+RCY8/CZua+Voq2O0L2vvwV2VaWFZ+zRTLaFZBAyLs2V2tdq7MqlENMYWOE4 Aad//v1W7zKaHaJIkYf4LouOs8qxonlR8aFjk++NOasvPfLgq6lt3lUN56EuapvQQEDX ulfv5KwHARN6RODjlo5JAzkFgzFb54BkxUhHxtbBabksMeAwX67/Fntm/ibbuXIdmgid 8KoCllazx42OWCCDvb7+ZcQKduSPFz6Je0H7Mza4kjCJ2THek/2A7X2MRkJ5ta2FV0ah fcu/2kWsvmjbMFCyGl53UsTW5Lskl+fabp29InKsEl0cWMAmetUsJ5mlhJPYodJU7MR9 kRRw== X-Forwarded-Encrypted: i=2; AJvYcCWEYcBke9UM35TIDfgmv0QwFH2HJoGIUSQ18/ZprkruLxvL/U/AgmNJq2lRX+QvY1V4vULw8ryej0P38+D4s8xfZB7aWBO8jN4KOQhBakDKR3f3JYM8JVqVL7ZLNg== X-Gm-Message-State: AOJu0Yw9tORjOr7LYh20bnQ2f+uNYOZ5+717e4ucxTua65oRTfnZCqGA v7/sAH64A0egdiuczrynlZ+o7WSdXZxp1KNy5RjAqZVJrqx3NtH7SQd98ixwDgNzMyeaTZZuoQ= = X-Google-Smtp-Source: AGHT+IGCRpIM7Band/9oHqu0GPyeN6Cj0XQpElrg2GG5LuC7GpRdMQUDjFVz3Z8SyKkNUCkwnqIS5w== X-Received: by 2002:a05:6512:3c9d:b0:52c:84ac:8fa2 with SMTP id 2adb3069b0e04-52eb9991e70mr11190717e87.7.1720860361632; Sat, 13 Jul 2024 01:46:01 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a19:ac02:0:b0:52e:97da:24d7 with SMTP id 2adb3069b0e04-52ec4504d84ls1501742e87.1.-pod-prod-05-eu; Sat, 13 Jul 2024 01:46:00 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV9YLqLg4Q7TaCCwdjF8DpOkrfQmw+2M5L8X3GEM9T8+UyZ5WgIa2WCKE7Ei0mDY0jhVcXItx5Gaxbj+/T8HsYeLgTfrxih4kEC2svKbWxAS/wR X-Received: by 2002:a19:5f4d:0:b0:52c:d5ac:d42 with SMTP id 2adb3069b0e04-52eb9991e65mr9414962e87.9.1720860359641; Sat, 13 Jul 2024 01:45:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1720860359; cv=none; d=google.com; s=arc-20160816; b=Jj4TysIpWA4mLWjOti2BkCTTvTLcOP7OtNsslP5oWpXsdO0i8AR2WYDeI9pQ3TA13k FAIGdnCQ+XgQu4mFANVpGi20FCLaP1V7ubH/GKD6q6vv3eNE8WKmWxN+YLJix+6i/M82 KH3Rd2sppOIujuATcWnZHvkIkM8BqAg348Dkbr24nUQAjyFlRaWaBkaGtVVE5reZZeSt bOxtXA4uBeqgWdOJARjxb6JdtUkHbZFKaduXOqTRe1s1jSZRsPaNGIseDexqpD7yvvEq LMch7hWwBEio9qFCE1QoLqgwlm+4nMPiqTKUnkLKAIlK7XL4NIA7pxC+nThg5I44Nakk yHjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Hmbbxb1F+DyFqKbkxqGn2PPIwpqkWAvkpsklF4VY2yo=; fh=djMPBp3h5t/g3kNNKl7GoXFBv67ZwMAwZrO2SS7uVRE=; b=xGq1TezhxkGPR1tixollwXF13wbIISRgGCFteZoNLU06P+B/kWGLim0Bo7icWkPyUe m8TZQwdTg8pYKE+Pw9KQvAg+DO0QOYEzH4qz+lLYfFbvOmnshDGQkG/x8J3vFZI+j2/W 8u4UipAdAAGt1Xld6OFi/VhDNbpFr5ctdTlCDC83A/x4Ger2rvDLbI06H5CbI/pjCPdz M+dybc19h1OWjBKeLNk6U9rMSmeykX523Mgku3fnMZ9baZqeE53f7m25KM4d6mi0EK6X bBr7inmjLbC5y0lmmTiylk37WI4WUsU7TBD4ZdyvvpRRkin+nIf9lf/M0qMQIi/qaH8P lo2g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="JkSi/f8R"; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id 2adb3069b0e04-52ed2584e9bsor130657e87.20.2024.07.13.01.45.59 for (Google Transport Security); Sat, 13 Jul 2024 01:45:59 -0700 (PDT) Received-SPF: pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Forwarded-Encrypted: i=1; AJvYcCUer+M9JqfsmSPvJ//g4BoHAsaqka08fHOHhyCTgPNzljHnDMOHBuJZ4gCrqDFrngCyUtPuJVHz+/XRZnUpEsfU8uADBruA0M3aW+NTiZNMOkwy X-Received: by 2002:a05:6512:1286:b0:52d:582e:4111 with SMTP id 2adb3069b0e04-52eb999b398mr12284817e87.18.1720860359163; Sat, 13 Jul 2024 01:45:59 -0700 (PDT) Received: from panicking.amarulasolutions.com (93-35-128-17.ip55.fastwebnet.it. [93.35.128.17]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a79bc7f1e20sm31483966b.116.2024.07.13.01.45.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 13 Jul 2024 01:45:58 -0700 (PDT) From: Michael Trimarchi To: Michael Trimarchi Cc: Dario Binacchi , Patrick Barsanti , linux-amarula@amarulasolutions.com, Ye Li Subject: [PATCH 17/21] video: Update mxsfb video drivers for iMX8MM/iMX8MN display Date: Sat, 13 Jul 2024 10:45:22 +0200 Message-ID: <20240713084526.922537-17-michael@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240713084526.922537-1-michael@amarulasolutions.com> References: <20240713084526.922537-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="JkSi/f8R"; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Update mxsfb for LCD video driver Signed-off-by: Ye Li Signed-off-by: Michael Trimarchi --- drivers/video/mxsfb.c | 141 ++++++++++++++++++++++++++++-------------- 1 file changed, 95 insertions(+), 46 deletions(-) diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index 792d6314d1..4186ccd002 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -21,8 +21,13 @@ #include #include #include +#include +#include +#include +#include #include "videomodes.h" +#include #define PS2KHZ(ps) (1000000000UL / (ps)) #define HZ2PS(hz) (1000000000UL / ((hz) / 1000)) @@ -30,6 +35,11 @@ #define BITS_PP 18 #define BYTES_PP 4 +struct mxsfb_priv { + fdt_addr_t reg_base; + struct udevice *disp_dev; +}; + struct mxs_dma_desc desc; /** @@ -56,9 +66,10 @@ __weak void mxsfb_system_setup(void) */ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, - struct display_timing *timings, int bpp) + struct display_timing *timings, int bpp, bool bridge) { - struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE; + struct mxsfb_priv *priv = dev_get_priv(dev); + struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)priv->reg_base; const enum display_flags flags = timings->flags; uint32_t word_len = 0, bus_width = 0; uint8_t valid_data = 0; @@ -109,7 +120,7 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, } #else /* Kick in the LCDIF clock */ - mxs_set_lcdclk(MXS_LCDIF_BASE, timings->pixelclock.typ / 1000); + mxs_set_lcdclk(priv->reg_base, timings->pixelclock.typ / 1000); #endif /* Restart the LCDIF block */ @@ -142,26 +153,30 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, LCDIF_CTRL_BYPASS_COUNT | LCDIF_CTRL_LCDIF_MASTER, ®s->hw_lcdif_ctrl); - writel(valid_data << LCDIF_CTRL1_BYTE_PACKING_FORMAT_OFFSET, + writel((valid_data << LCDIF_CTRL1_BYTE_PACKING_FORMAT_OFFSET) | + LCDIF_CTRL1_RECOVER_ON_UNDERFLOW, ®s->hw_lcdif_ctrl1); + if (bridge) + writel(LCDIF_CTRL2_OUTSTANDING_REQS_REQ_16, ®s->hw_lcdif_ctrl2); + mxsfb_system_setup(); writel((timings->vactive.typ << LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET) | timings->hactive.typ, ®s->hw_lcdif_transfer_count); - vdctrl0 = LCDIF_VDCTRL0_ENABLE_PRESENT | LCDIF_VDCTRL0_ENABLE_POL | + vdctrl0 = LCDIF_VDCTRL0_ENABLE_PRESENT | LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT | LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT | timings->vsync_len.typ; - if(flags & DISPLAY_FLAGS_HSYNC_HIGH) + if (flags & DISPLAY_FLAGS_HSYNC_HIGH) vdctrl0 |= LCDIF_VDCTRL0_HSYNC_POL; - if(flags & DISPLAY_FLAGS_VSYNC_HIGH) + if (flags & DISPLAY_FLAGS_VSYNC_HIGH) vdctrl0 |= LCDIF_VDCTRL0_VSYNC_POL; - if(flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) + if (flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) vdctrl0 |= LCDIF_VDCTRL0_DOTCLK_POL; - if(flags & DISPLAY_FLAGS_DE_HIGH) + if (flags & DISPLAY_FLAGS_DE_HIGH) vdctrl0 |= LCDIF_VDCTRL0_ENABLE_POL; writel(vdctrl0, ®s->hw_lcdif_vdctrl0); @@ -198,10 +213,10 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, } static int mxs_probe_common(struct udevice *dev, struct display_timing *timings, - int bpp, u32 fb) + int bpp, u32 fb, bool bridge) { /* Start framebuffer */ - mxs_lcd_init(dev, fb, timings, bpp); + mxs_lcd_init(dev, fb, timings, bpp, bridge); #ifdef CONFIG_VIDEO_MXS_MODE_SYSTEM /* @@ -212,7 +227,8 @@ static int mxs_probe_common(struct udevice *dev, struct display_timing *timings, * sets the RUN bit, then waits until it gets cleared and repeats this * infinitelly. This way, we get smooth continuous updates of the LCD. */ - struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE; + struct mxsfb_priv *priv = dev_get_priv(dev); + struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)priv->reg_base; memset(&desc, 0, sizeof(struct mxs_dma_desc)); desc.address = (dma_addr_t)&desc; @@ -229,9 +245,9 @@ static int mxs_probe_common(struct udevice *dev, struct display_timing *timings, return 0; } -static int mxs_remove_common(u32 fb) +static int mxs_remove_common(phys_addr_t reg_base, u32 fb) { - struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE; + struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)(reg_base); int timeout = 1000000; if (!fb) @@ -258,6 +274,7 @@ static int mxs_of_get_timings(struct udevice *dev, int ret = 0; u32 display_phandle; ofnode display_node; + struct mxsfb_priv *priv = dev_get_priv(dev); ret = ofnode_read_u32(dev_ofnode(dev), "display", &display_phandle); if (ret) { @@ -278,10 +295,19 @@ static int mxs_of_get_timings(struct udevice *dev, return -EINVAL; } - ret = ofnode_decode_display_timing(display_node, 0, timings); - if (ret) { - dev_err(dev, "failed to get any display timings\n"); - return -EINVAL; + priv->disp_dev = video_link_get_next_device(dev); + if (priv->disp_dev) { + ret = video_link_get_display_timings(timings); + if (ret) { + dev_err(dev, "failed to get any video link display timings\n"); + return -EINVAL; + } + } else { + ret = ofnode_decode_display_timing(display_node, 0, timings); + if (ret) { + dev_err(dev, "failed to get any display timings\n"); + return -EINVAL; + } } return ret; @@ -291,20 +317,58 @@ static int mxs_video_probe(struct udevice *dev) { struct video_uc_plat *plat = dev_get_uclass_plat(dev); struct video_priv *uc_priv = dev_get_uclass_priv(dev); + struct mxsfb_priv *priv = dev_get_priv(dev); struct display_timing timings; u32 bpp = 0; u32 fb_start, fb_end; int ret; + bool enable_bridge = false; debug("%s() plat: base 0x%lx, size 0x%x\n", __func__, plat->base, plat->size); + priv->reg_base = dev_read_addr(dev); + if (priv->reg_base == FDT_ADDR_T_NONE) { + dev_err(dev, "lcdif base address is not found\n"); + return -EINVAL; + } + ret = mxs_of_get_timings(dev, &timings, &bpp); if (ret) return ret; - ret = mxs_probe_common(dev, &timings, bpp, plat->base); + if (priv->disp_dev) { +#if IS_ENABLED(CONFIG_VIDEO_BRIDGE) + if (device_get_uclass_id(priv->disp_dev) == UCLASS_VIDEO_BRIDGE) { + ret = video_bridge_attach(priv->disp_dev); + if (ret) { + dev_err(dev, "fail to attach bridge\n"); + return ret; + } + + ret = video_bridge_set_backlight(priv->disp_dev, 80); + if (ret) { + dev_err(dev, "fail to set backlight\n"); + return ret; + } + + enable_bridge = true; + video_bridge_check_timing(priv->disp_dev, &timings); + } +#endif + + if (device_get_uclass_id(priv->disp_dev) == UCLASS_PANEL) { + ret = panel_enable_backlight(priv->disp_dev); + if (ret) { + dev_err(dev, "panel %s enable backlight error %d\n", + priv->disp_dev->name, ret); + return ret; + } + } + } + + ret = mxs_probe_common(dev, &timings, bpp, plat->base, enable_bridge); if (ret) return ret; @@ -343,33 +407,9 @@ static int mxs_video_probe(struct udevice *dev) static int mxs_video_bind(struct udevice *dev) { struct video_uc_plat *plat = dev_get_uclass_plat(dev); - struct display_timing timings; - u32 bpp = 0; - u32 bytes_pp = 0; - int ret; - ret = mxs_of_get_timings(dev, &timings, &bpp); - if (ret) - return ret; - - switch (bpp) { - case 32: - case 24: - case 18: - bytes_pp = 4; - break; - case 16: - bytes_pp = 2; - break; - case 8: - bytes_pp = 1; - break; - default: - dev_err(dev, "invalid bpp specified (bpp = %i)\n", bpp); - return -EINVAL; - } - - plat->size = timings.hactive.typ * timings.vactive.typ * bytes_pp; + /* Max size supported by LCDIF, because in bind, we can't probe panel */ + plat->size = 1920 * 1080 *4 * 2; return 0; } @@ -377,8 +417,14 @@ static int mxs_video_bind(struct udevice *dev) static int mxs_video_remove(struct udevice *dev) { struct video_uc_plat *plat = dev_get_uclass_plat(dev); + struct mxsfb_priv *priv = dev_get_priv(dev); + + debug("%s\n", __func__); + + if (priv->disp_dev) + device_remove(priv->disp_dev, DM_REMOVE_NORMAL); - mxs_remove_common(plat->base); + mxs_remove_common(priv->reg_base, plat->base); return 0; } @@ -389,6 +435,8 @@ static const struct udevice_id mxs_video_ids[] = { { .compatible = "fsl,imx6sx-lcdif" }, { .compatible = "fsl,imx7ulp-lcdif" }, { .compatible = "fsl,imxrt-lcdif" }, + { .compatible = "fsl,imx8mm-lcdif" }, + { .compatible = "fsl,imx8mn-lcdif" }, { /* sentinel */ } }; @@ -400,4 +448,5 @@ U_BOOT_DRIVER(mxs_video) = { .probe = mxs_video_probe, .remove = mxs_video_remove, .flags = DM_FLAG_PRE_RELOC | DM_FLAG_OS_PREPARE, + .priv_auto = sizeof(struct mxsfb_priv), };