From patchwork Sun Jul 14 10:53:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michael Trimarchi X-Patchwork-Id: 3278 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-lj1-f199.google.com (mail-lj1-f199.google.com [209.85.208.199]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id EE2B240F59 for ; Sun, 14 Jul 2024 12:54:02 +0200 (CEST) Received: by mail-lj1-f199.google.com with SMTP id 38308e7fff4ca-2ee95497b77sf35231741fa.1 for ; Sun, 14 Jul 2024 03:54:02 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1720954442; cv=pass; d=google.com; s=arc-20160816; b=AvsvwaLzs7CDo/iOsp0VEdzN5m8l2XtyFgs7C0iNf4r5/dhOs6O0Salto5qRHhxlDP z6E4L9QWrAG+hs9MAozXkZch1YhDGLSafnuOQjGgVGLJtVPnzcJbQetwf0MCsaAgucec RX+JDhUbIWtt263BvFeNSCLu4Omx33HqLoCxCxbnY1ODG4IkZHJvyWQYfTOl6Anz70dG wqx1x/0dI3Dt45jbyrde4H2EjWgusSWC6WOnyJdXXgm+/P5JRoG50VZkN0CXRg4E0ZLr ZPg2Fw7dZk4F7DlhdotwLgWl/qFbuKLgXkW6Kyo3phfi9QFLwuuerBtVCvZhD8CsoU0Z BfYg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=e/RPqzzKrC8KkhhfqoobinWC79JKSHi8lfntzaLm5a0=; fh=Tg4qKv8ZIQpZ9t/LqVlGZ4mlK4+k1UiFkcCSPBUuFTc=; b=ExElXZ4ZT7pmhFuwVmgqZ15+aonIMkZgunUOqXuGDFJiD+WfqXx7UfamveAgIefm4g OM72TUfgUufgYdFntmRg3dlXpRXeW4gnH48UBJGgcFGnctF3FQHya3APLVlqm6mesKtj VU7rO6L9RvDYXH5Sx8LK0L23iOg2rFE+qdpMAhp6lEYIhzSW2tNrU0UIEAJKRPzhO1Tp ve72PpOWMrm2FIVon36el7dq8UvQYDZxcAMMmzTZm6Oddqhj4AL5bOKgz0dbfNaQMHXu OXgf/R/lMiLM2OWjDzy02a4b3eexAKNgzWHNg2+/znFGK6PTCpF+haXOP/5BApKAF/xK XV3w==; darn=patchwork.amarulasolutions.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=icX1RRpH; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1720954442; x=1721559242; darn=patchwork.amarulasolutions.com; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:x-original-authentication-results :x-original-sender:content-transfer-encoding:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to; bh=e/RPqzzKrC8KkhhfqoobinWC79JKSHi8lfntzaLm5a0=; b=CGVclMfxrKqSGl/Iaq/TCG9wJQ7UXi0lDS31BiW3uK1AZ+3Mu4rqtMe5vhxxwjiNuz 6LBbu43tzPjjwLZxXkgZFpa12PKz7+IrCEYWw0zIjQo2vGan7SbSZIdurG3k3gQ1wkj9 3ZKe/7lN84TaAjbgN5/M94JX1nw7gZyZOPyyY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720954442; x=1721559242; h=list-unsubscribe:list-archive:list-help:list-post :x-spam-checked-in-group:list-id:mailing-list:precedence :x-original-authentication-results:x-original-sender :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-beenthere:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=e/RPqzzKrC8KkhhfqoobinWC79JKSHi8lfntzaLm5a0=; b=tySLAFaNaQE3A0hT/RgpbvwBcAMVrL8Mk3OX+CmtRGIFB5Xs98dM1+IPoNb23WdUTV G1HHur8hjjYwfPhb5s2adbD81IvbJhHXzqIoJPsIzdLtm7iDHwmhqYWq2MA49OgyRQS+ MGJHuXTAWVwEuW3pqRmrnLUUgISrT0C0EnrRlOBUhUul1hW3ZnQwa6+pEpJcp9/sVwDo drmLkwDJojahPc6aerfgD+pnyFT7Mib0r6OoUJ3h5sZGeSYSGcuw6Y6ikDG/Meh4PJwy 8bDEyaxsYed5sD0G99oTVWYz2stTTfiZC4QfadnU4EqfJzfIjDkp/MhmZ9zxGyY3nHlo uxDg== X-Forwarded-Encrypted: i=2; AJvYcCU+vCAZpZvEJ0k+oce2HtJdKIeHGDYUtF9Dn0l7vak6HmtWI7I0K5eVcqDaCnmAh+5srDMl6AU2BKYByh+9oESLN4bkjxHZvP/raLh4ac10cIxX2C2werYG/WB7QA== X-Gm-Message-State: AOJu0Yx8DAK0DC0SgnzprSftlr3ioO2kCtxYtFcIFtzUxSRp+53Qi2TF pu7iJ9P4Tqx2f/G62kxganCf935KSyMVaKaXVnM7y3WNJwUJwftbUG5GCbruVDInwg== X-Google-Smtp-Source: AGHT+IHGwdw+1jjUxRR2De40X7iy3o8YKthrKIyxuM3k9/KS+HajEV2jUcrKvL813XPJPv9Vl7IKnw== X-Received: by 2002:a2e:8297:0:b0:2ee:8aed:ddba with SMTP id 38308e7fff4ca-2eeb30b8ae7mr120691221fa.4.1720954442411; Sun, 14 Jul 2024 03:54:02 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a05:6402:5249:b0:599:9c73:c38b with SMTP id 4fb4d7f45d1cf-5999c73c444ls1016105a12.2.-pod-prod-08-eu; Sun, 14 Jul 2024 03:54:01 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWAL/BoKD/H7a7zCeba26v5xsMT/y6W5IQGWyRjpNVu0ko9uRwhHH+LzFP0g6KXzRWbIdgYu4hmP+MtsXW/wfjoKZRe6/bJ9r8nMN1EH6HLvMrH X-Received: by 2002:a17:906:f6d5:b0:a75:3c2d:cd8e with SMTP id a640c23a62f3a-a780b6b1941mr1052399266b.27.1720954440718; Sun, 14 Jul 2024 03:54:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1720954440; cv=none; d=google.com; s=arc-20160816; b=QAoB6fUUOfMLF3ehZRve5RAx2zhpaf1tijsaWlBcLtX+yq37WlSQIAxJsztTv4ax/P 9URwIkSfvjBDHJe0QkgJ5ZaGRfKiS2oRY5QeEYrchGH3lQYNm10j8+K/Sc53KAeEXynq TGhe6kz5fJOap0NhC9v999w3dujS2s3ss8hB1uQSwmKiyMW3ADNVN2S84YpGcyBWRWEW yyHmm9DL9hkjZY3Lp4kzjvwPrDfNL9KsVyZ2dn2JmL8NyHyP9MEYgfiy1yZPMdY6WZyU 9/JOu2JW8aSg8N5aH6cDmSOZJw1Yoa5fkTOGfcQN7jbrwhV7zMBv1tHjtbXcf/0b4zOy wfcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=ExSEdrVHAuGJCeNa1DulbUhbsfDuL+nFSoEwjoPzUm8=; fh=YX3It5SZRi6nbUQo74J+0ZVSSfypr8ADLORY3IMVAI0=; b=f5v0ryy2JvHoCYGHvHyzg5UUsrYyyxqO5n6MMH6g/v2M95lRcp09G3CSKeHW//pBZ1 Hg/e1xGIjbXl/UR9cjN+tvJnoEAyqwEyuwOz6Iy3fgqdi3MgQN+pDn9SkRi4WY4Qke/X TJeWkDQajs4J6Dm0GrIOaNZhc9xSabqg9Bnrtwa9ID9nI2mXnDvoCqFe8YSRJIFFph+X BG0XnyY01eu+NgtU4X8Kh7HPzto23iXHG/WRzwvnSUlC2NenihBEDjb9lruQuhQ/PAij dRmOwzL+Roh53zr9JWx+VxLrL1fmrbZmAM8LSwMLQZIAlYR69zedvmffQfzxFukpW7SI sang==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=icX1RRpH; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id a640c23a62f3a-a79bc5928desor46080066b.4.2024.07.14.03.54.00 for (Google Transport Security); Sun, 14 Jul 2024 03:54:00 -0700 (PDT) Received-SPF: pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Forwarded-Encrypted: i=1; AJvYcCV/r8dxuwJxE/HfXcifbwoGIkzBNBruDTxl88LchMa068XIjaD2Jnq3FapwRibRtfEA80m3Qly97GywH/tEIIEUM8z3JyVG1T56yWlMEgFa20vi X-Received: by 2002:a17:906:c154:b0:a72:455f:e8b with SMTP id a640c23a62f3a-a780b5057b4mr1494352566b.0.1720954440252; Sun, 14 Jul 2024 03:54:00 -0700 (PDT) Received: from panicking.. (mob-5-91-58-211.net.vodafone.it. [5.91.58.211]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a79bc5a36c7sm119966166b.7.2024.07.14.03.53.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Jul 2024 03:53:59 -0700 (PDT) From: Michael Trimarchi To: Michael Trimarchi Cc: Dario Binacchi , Patrick Barsanti , linux-amarula@amarulasolutions.com Subject: [PATCH 21/25] phy: dphy: Correct clk_pre parameter Date: Sun, 14 Jul 2024 12:53:24 +0200 Message-ID: <20240714105328.35825-21-michael@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240714105328.35825-1-michael@amarulasolutions.com> References: <20240714105328.35825-1-michael@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=icX1RRpH; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Upstream linux commit 9a8406ba1a9a29. The D-PHY specification (v1.2) explicitly mentions that the T-CLK-PRE parameter's unit is Unit Interval(UI) and the minimum value is 8. Also, kernel doc of the 'clk_pre' member of struct phy_configure_opts_mipi_dphy mentions that it should be in UI. However, the dphy core driver wrongly sets 'clk_pre' to 8000, which seems to hint that it's in picoseconds. So, let's fix the dphy core driver to correctly reflect the T-CLK-PRE parameter's minimum value according to the D-PHY specification. I'm assuming that all impacted custom drivers shall program values in TxByteClkHS cycles into hardware for the T-CLK-PRE parameter. The D-PHY specification mentions that the frequency of TxByteClkHS is exactly 1/8 the High-Speed(HS) bit rate(each HS bit consumes one UI). So, relevant custom driver code is changed to program those values as DIV_ROUND_UP(cfg->clk_pre, BITS_PER_BYTE), then. Note that I've only tested the patch with RM67191 DSI panel on i.MX8mq EVK. Help is needed to test with other i.MX8mq, Meson and Rockchip platforms, as I don't have the hardwares. Tested-by: Liu Ying # RM67191 DSI panel on i.MX8mq EVK Reviewed-by: Andrzej Hajda Reviewed-by: Neil Armstrong # for phy-meson-axg-mipi-dphy.c Tested-by: Neil Armstrong # for phy-meson-axg-mipi-dphy.c Tested-by: Guido Günther # Librem 5 (imx8mq) with it's rather picky panel Reviewed-by: Laurent Pinchart Signed-off-by: Liu Ying Link: https://lore.kernel.org/r/20220124024007.1465018-1-victor.liu@nxp.com Signed-off-by: Vinod Koul Signed-off-by: Michael Trimarchi --- drivers/phy/meson-axg-mipi-dphy.c | 2 +- drivers/phy/phy-core-mipi-dphy.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/phy/meson-axg-mipi-dphy.c b/drivers/phy/meson-axg-mipi-dphy.c index 3f89de1997..fb10ccca6a 100644 --- a/drivers/phy/meson-axg-mipi-dphy.c +++ b/drivers/phy/meson-axg-mipi-dphy.c @@ -237,7 +237,7 @@ static int phy_meson_axg_mipi_dphy_power_on(struct phy *phy) (DIV_ROUND_UP(priv->config.clk_zero, temp) << 16) | (DIV_ROUND_UP(priv->config.clk_prepare, temp) << 24)); regmap_write(priv->regmap, MIPI_DSI_CLK_TIM1, - DIV_ROUND_UP(priv->config.clk_pre, temp)); + DIV_ROUND_UP(priv->config.clk_pre, BITS_PER_BYTE)); regmap_write(priv->regmap, MIPI_DSI_HS_TIM, DIV_ROUND_UP(priv->config.hs_exit, temp) | diff --git a/drivers/phy/phy-core-mipi-dphy.c b/drivers/phy/phy-core-mipi-dphy.c index 7a7cc4dc5b..8341b78e0d 100644 --- a/drivers/phy/phy-core-mipi-dphy.c +++ b/drivers/phy/phy-core-mipi-dphy.c @@ -36,7 +36,7 @@ static int phy_mipi_dphy_calc_config(unsigned long pixel_clock, cfg->clk_miss = 0; cfg->clk_post = 60000 + 52 * ui; - cfg->clk_pre = 8000; + cfg->clk_pre = 8; cfg->clk_prepare = 38000; cfg->clk_settle = 95000; cfg->clk_term_en = 0;