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[209.85.220.41]) by mx.google.com with SMTPS id 5b1f17b1804b1-42bb705d2c3sor45753725e9.4.2024.09.03.08.32.00 for (Google Transport Security); Tue, 03 Sep 2024 08:32:00 -0700 (PDT) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a05:600c:1f87:b0:428:6f4:57ff with SMTP id 5b1f17b1804b1-42c82f6cdf6mr48490875e9.35.1725377520230; Tue, 03 Sep 2024 08:32:00 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.amarulasolutions.com ([2.196.42.65]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42baf1b0c18sm192963055e9.37.2024.09.03.08.31.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Sep 2024 08:32:00 -0700 (PDT) From: Dario Binacchi To: linux-amarula@amarulasolutions.com Subject: [PATCH 02/10] arm64: dts: imx8mn-bsh-smm-s2/pro: add simple-framebuffer Date: Tue, 3 Sep 2024 17:31:49 +0200 Message-ID: <20240903153157.918185-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240903153157.918185-1-dario.binacchi@amarulasolutions.com> References: <20240903153157.918185-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=fC866vp6; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add a simple-framebuffer node for U-Boot to further fill and activate. Co-Developed-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- .../freescale/imx8mn-bsh-smm-s2-display.dtsi | 31 ++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi index 7675583a6b67..c6f286eace38 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi @@ -4,6 +4,35 @@ */ / { + chosen { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + framebuffer-panel0 { + compatible = "simple-framebuffer"; + clocks = <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>, /* lcdif */ + <&clk IMX8MN_CLK_DISP_APB_ROOT>, + <&clk IMX8MN_CLK_DISP_AXI_ROOT>, + <&clk IMX8MN_VIDEO_PLL1>, + <&clk IMX8MN_CLK_DISP_AXI_ROOT>, /* pgc_dispmix */ + <&clk IMX8MN_CLK_DISP_APB_ROOT>, + <&clk IMX8MN_CLK_DISP_AXI>, + <&clk IMX8MN_CLK_DISP_APB>, + <&clk IMX8MN_SYS_PLL2_1000M>, + <&clk IMX8MN_SYS_PLL1_800M>, + <&clk IMX8MN_CLK_DSI_CORE>, /* mipi_disi */ + <&clk IMX8MN_CLK_DSI_PHY_REF>; + + power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_LCDIF>, + <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_DSI>; + dvdd-supply = <®_3v3_dvdd>; + avdd-supply = <®_v3v3_avdd>; + display = <&panel0>; + status = "disabled"; + }; + }; + backlight: backlight { compatible = "pwm-backlight"; pwms = <&pwm1 0 700000 0>; /* 700000 ns = 1337Hz */ @@ -59,7 +88,7 @@ &mipi_dsi { samsung,pll-clock-frequency = <12000000>; status = "okay"; - panel@0 { + panel0: panel@0 { compatible = "sharp,ls068b3sx02", "syna,r63353"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_panel>;