From patchwork Sun Sep 29 17:27:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 3542 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f69.google.com (mail-ed1-f69.google.com [209.85.208.69]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 11EA13F03C for ; Sun, 29 Sep 2024 19:27:59 +0200 (CEST) Received: by mail-ed1-f69.google.com with SMTP id 4fb4d7f45d1cf-5c8853e8451sf1256771a12.1 for ; Sun, 29 Sep 2024 10:27:59 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1727630878; cv=pass; d=google.com; s=arc-20240605; b=AHhq8DFXtO00+yFBJKdbhvhzJ+gSlaUd6NoEfkrsLyEMCGAK9C1GwBO0cA459B/mZl wxE2+H8dFuznuZaabppshPRaqS1wmxwEXx9BcsfxrC1yFs28A8cnhOJNzkLk3E4jBfQf upg2gmjOB/DpbLtkjwyq05waUzogmSFiOwsJEeXw/FleDzKAURgOChUXrAUzAoWNZzxV eZpLkLk+DuCSxR34G7C+w3FzSsKJ+dLZvtxFEy+nyLan1M7wSOKvAdbujeks3HaiEULS Z31Z9AOJcfJJ3yDvs+uvs3en4j3pD8L8OzJFJZH4aVTTG4tp91/UDVysmAWd2xpatqtU oQFw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=agx7+u85kKbQbWiFSDrhUgGvq5ZsT6VSyiljEga4kgM=; fh=kZ7eLiqG5OSalQC4VLSRxITEa+jSct5f0s1/tTWoZK8=; b=RhRCj9pQXx/CQN4rFJAyWdSQOcHemPFFijYwsbVXPlWEjQROfmes+q5iWDI6bUnC3G zSEoJ663bPWJXYz9ZE5cM1rENJo7V9CJ+oB/utnEtTR9iIroX4KOiz+6KxQ4zP5Cjovk uELVIkWY5tOwSs6HdnFoQ+N0h9+Ju5hGyL14InNU69QZF34uL6ZCEyBuJaMgcx8xXj5t 0NdFPTekO2nBCa5DghQoTD8g2NZSKiHYvqMnc6Qd0fQOhuJOA0vdWtAwweEDsfwMpLDT RXVIOIGoBzcc2e++Ft0ElwNIoziABwq7+Oe72XEYwDMKPCfWMx5EgaVl+tuS7htFWhWV bnQw==; darn=patchwork.amarulasolutions.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Z18ekuU4; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1727630878; x=1728235678; darn=patchwork.amarulasolutions.com; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:x-original-authentication-results :x-original-sender:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:from:to:cc:subject:date:message-id:reply-to; bh=agx7+u85kKbQbWiFSDrhUgGvq5ZsT6VSyiljEga4kgM=; b=UcxMvCOPQeviVFclQ0bGzYtETR897vMr7SMvUIppMouaCBG/a39y0C7yquvJMBsPx0 RKhcNHldEJ22iHmBBMjHCgLjMr0wOI1ox3F8QNomPWvJvMegG5H8g8B+UtoeG1LCrC29 iIhDmrsrYnvIsD7XFTpkEIK9q1yoGCF72BUlw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727630878; x=1728235678; h=list-unsubscribe:list-archive:list-help:list-post :x-spam-checked-in-group:list-id:mailing-list:precedence :x-original-authentication-results:x-original-sender:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :x-beenthere:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=agx7+u85kKbQbWiFSDrhUgGvq5ZsT6VSyiljEga4kgM=; b=hp7VNezK59STG2PB26TRubKSUT3JpqBMe2x83JOETIKNBekYar5Puy1288K+zg5Y1c JLNw0ddVU1PISEvOFvgEuM9kp8MFG8nklucCS6E8hwX4x8cPuHxRtf5zeGPFODHqffkM GG0IF5k2uon5+TUc66KPZv8KfNIG5a9YYJYT+e8mOHRsvVuqnAxabkGKxiPadIFwwmKT rkLaWraewYDdU5nR+5o6i4RSrHqMB6D/OdmMFry1SdCVktilSoTwEfGt/hMrpJlL7IhU z3nIun5msle0SKKaxcO7QCeQctMmQo3tnhpplqD8cLkB6eOoHEoJbREWppaHY9pLACws ewvw== X-Forwarded-Encrypted: i=2; AJvYcCWcfiBKl/TB75tu3L2Gkh5kyB1MyS5rhmZuplLNyHpGcJ7HRh//0pV9DDwGGi25YCgwFK6jVF0CUDkPTRJy@patchwork.amarulasolutions.com X-Gm-Message-State: AOJu0Yz6wh5D0bFtcQmq6ITF19W+QQpXU4G3WS47dVN7aRlhnS73nz3Q VSqUdpUrl1pxNbLS6YGrNGX3EszW9tUXWDhcEZOK7K7gmy5JToEF+S+bZQTa/lQP/A== X-Google-Smtp-Source: AGHT+IF6gJLQt8ZOmF1IYTSyzbvalTUNjNPa+KHwtcDglys4+OW/T5s+htka/4lqWJ2pz1/oYGBuYw== X-Received: by 2002:a05:6402:3893:b0:5c7:227f:3990 with SMTP id 4fb4d7f45d1cf-5c88262cb6cmr9081158a12.31.1727630878628; Sun, 29 Sep 2024 10:27:58 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a05:6402:26c9:b0:5c4:6c19:f742 with SMTP id 4fb4d7f45d1cf-5c877819335ls1502805a12.2.-pod-prod-02-eu; Sun, 29 Sep 2024 10:27:57 -0700 (PDT) X-Received: by 2002:a17:907:2dac:b0:a8d:6921:e181 with SMTP id a640c23a62f3a-a93c4921892mr941732566b.16.1727630876877; Sun, 29 Sep 2024 10:27:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1727630876; cv=none; d=google.com; s=arc-20240605; b=E4YZm12hz0a+bZaVDJEf0Aim+sHwD++4Nk6PV7sVLFgbgTZpdVoVuV+LVz4jhhj/sT C55NfaKDHUyq337MgN4sEA4qiX//7jk8GKsOhDVxCl2ywni267CeOj9PE692oi2ce9pF lbVcKtmCy0VTVotAhmTYmMFmBWO4esmcaHeBMcPg3ixkQfHnq7ofWKyPCUM9GAkW2ZD8 A0X4ngN+XibTtuGjTfyutIbY1GWQLc5yiSAc/pLzRt5a05h0B7YH4ek82HOHfXhcXb2N 8oeTyJNv/YFoLqlxOfrfu8utq7rUcRKlTCwjltnsmaYg9z7DW5D3iKk42DY5RDYqvFqX lL7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=y0iBp/WuiGBbwsQFlblUsJsTztRh00umfcE38KK4N/I=; fh=u/u80m6tBSaxW7VWG5AQatIbYzkIAnRGhZp/RTASK5o=; b=FVNCrVW1F3fR3uhFXlcY78TklRyxlb8JGFe/m0KwTeVQnGdiZVTCYNH9g1BXy0/hoV zc/51VCBZASVwp1jQbDKHoMzl0H3vhKywhohwTnajpRBcnxvOa9nv+SismxaVjqsrSYP EYfHVFHU/D+zOudfk2zsFZ4Ge4SgdXghKvUCwQ+te2hMfqa5fbYZyJehW4HlD9dAYSH8 Wlb4Xd4ddd3z742/wABczHv9vhMZg6fwDSAcVb1CWk2bBRH36rbKYHTudVLG/2CDntOq xJRUgs/kyTtVK1T6B28trN+vhnLB3MkoIVF/ameawBcTE6huRpCztQzwLEM6g9Zu+aXL Zzjg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Z18ekuU4; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id a640c23a62f3a-a93c29ba240sor200292566b.15.2024.09.29.10.27.56 for (Google Transport Security); Sun, 29 Sep 2024 10:27:56 -0700 (PDT) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:907:6d20:b0:a8a:8c92:1c9c with SMTP id a640c23a62f3a-a93c4967869mr949147066b.29.1727630876427; Sun, 29 Sep 2024 10:27:56 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-79-54-102-102.retail.telecomitalia.it. [79.54.102.102]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a93c27776a1sm403176866b.8.2024.09.29.10.27.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Sep 2024 10:27:55 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Dario Binacchi , Abel Vesa , Fabio Estevam , Michael Turquette , Peng Fan , Pengutronix Kernel Team , Sascha Hauer , Shawn Guo , Stephen Boyd , imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: [PATCH v2 6/6] clk: imx8mp: support spread spectrum clock generation Date: Sun, 29 Sep 2024 19:27:16 +0200 Message-ID: <20240929172743.1758292-7-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240929172743.1758292-1-dario.binacchi@amarulasolutions.com> References: <20240929172743.1758292-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Z18ekuU4; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The patch adds support for spread spectrum clock generation for the audio, video, and DRAM PLLs. Signed-off-by: Dario Binacchi --- (no changes since v1) drivers/clk/imx/clk-imx8mp.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index b2778958a572..460e8271def5 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -410,6 +410,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct device_node *np, *anatop_np; void __iomem *anatop_base, *ccm_base; + struct imx_pll14xx_ssc pll1443x_ssc; int err; anatop_np = of_find_compatible_node(NULL, NULL, "fsl,imx8mp-anatop"); @@ -449,10 +450,14 @@ static int imx8mp_clocks_probe(struct platform_device *pdev) hws[IMX8MP_SYS_PLL2_REF_SEL] = imx_clk_hw_mux("sys_pll2_ref_sel", anatop_base + 0x104, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); hws[IMX8MP_SYS_PLL3_REF_SEL] = imx_clk_hw_mux("sys_pll3_ref_sel", anatop_base + 0x114, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); - hws[IMX8MP_AUDIO_PLL1] = imx_clk_hw_pll14xx("audio_pll1", "audio_pll1_ref_sel", anatop_base, &imx_1443x_pll); - hws[IMX8MP_AUDIO_PLL2] = imx_clk_hw_pll14xx("audio_pll2", "audio_pll2_ref_sel", anatop_base + 0x14, &imx_1443x_pll); - hws[IMX8MP_VIDEO_PLL1] = imx_clk_hw_pll14xx("video_pll1", "video_pll1_ref_sel", anatop_base + 0x28, &imx_1443x_pll); - hws[IMX8MP_DRAM_PLL] = imx_clk_hw_pll14xx("dram_pll", "dram_pll_ref_sel", anatop_base + 0x50, &imx_1443x_dram_pll); + imx_clk_pll14xx_get_ssc_conf(anatop_np, IMX8MP_AUDIO_PLL1, &pll1443x_ssc); + hws[IMX8MP_AUDIO_PLL1] = imx_clk_hw_pll14xx_ssc("audio_pll1", "audio_pll1_ref_sel", anatop_base, &imx_1443x_pll, &pll1443x_ssc); + imx_clk_pll14xx_get_ssc_conf(anatop_np, IMX8MP_AUDIO_PLL2, &pll1443x_ssc); + hws[IMX8MP_AUDIO_PLL2] = imx_clk_hw_pll14xx_ssc("audio_pll2", "audio_pll2_ref_sel", anatop_base + 0x14, &imx_1443x_pll, &pll1443x_ssc); + imx_clk_pll14xx_get_ssc_conf(anatop_np, IMX8MP_VIDEO_PLL1, &pll1443x_ssc); + hws[IMX8MP_VIDEO_PLL1] = imx_clk_hw_pll14xx_ssc("video_pll1", "video_pll1_ref_sel", anatop_base + 0x28, &imx_1443x_pll, &pll1443x_ssc); + imx_clk_pll14xx_get_ssc_conf(anatop_np, IMX8MP_DRAM_PLL, &pll1443x_ssc); + hws[IMX8MP_DRAM_PLL] = imx_clk_hw_pll14xx_ssc("dram_pll", "dram_pll_ref_sel", anatop_base + 0x50, &imx_1443x_dram_pll, &pll1443x_ssc); hws[IMX8MP_GPU_PLL] = imx_clk_hw_pll14xx("gpu_pll", "gpu_pll_ref_sel", anatop_base + 0x64, &imx_1416x_pll); hws[IMX8MP_VPU_PLL] = imx_clk_hw_pll14xx("vpu_pll", "vpu_pll_ref_sel", anatop_base + 0x74, &imx_1416x_pll); hws[IMX8MP_ARM_PLL] = imx_clk_hw_pll14xx("arm_pll", "arm_pll_ref_sel", anatop_base + 0x84, &imx_1416x_pll);