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[82.54.94.193]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa59990a78esm415220066b.163.2024.12.01.09.47.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Dec 2024 09:47:22 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Dario Binacchi , Conor Dooley , Fabio Estevam , Krzysztof Kozlowski , Michael Turquette , Peng Fan , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , Stephen Boyd , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: [PATCH v4 03/18] dt-bindings: clock: imx8m-anatop: define clocks/clock-names Date: Sun, 1 Dec 2024 18:46:03 +0100 Message-ID: <20241201174639.742000-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241201174639.742000-1-dario.binacchi@amarulasolutions.com> References: <20241201174639.742000-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="hKvfE+/h"; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Define clocks and clock-names properties of the anatop device node. Signed-off-by: Dario Binacchi - Added in v4 --- (no changes since v1) .../bindings/clock/fsl,imx8m-anatop.yaml | 53 ++++++++++++++++++- 1 file changed, 52 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml index bbd22e95b319..f439b0a94ce2 100644 --- a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml +++ b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml @@ -30,22 +30,73 @@ properties: interrupts: maxItems: 1 + clocks: + minItems: 2 + maxItems: 3 + + clock-names: + minItems: 2 + maxItems: 3 + '#clock-cells': const: 1 required: - compatible - reg + - clocks + - clock-names - '#clock-cells' +allOf: + - if: + properties: + compatible: + contains: + const: fsl,imx8mq-anatop + then: + properties: + clocks: + items: + - description: 32k osc + - description: 25m osc + - description: 27m osc + clock-names: + items: + - const: ckil + - const: osc_25m + - const: osc_27m + else: + properties: + clocks: + items: + - description: 32k osc + - description: 24m osc + + clock-names: + items: + - const: osc_32k + - const: osc_24m + additionalProperties: false examples: - | - anatop: clock-controller@30360000 { + clock-controller@30360000 { compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop"; reg = <0x30360000 0x10000>; #clock-cells = <1>; + clocks = <&osc_32k>, <&osc_24m>; + clock-names = "osc_32k", "osc_24m"; + }; + + - | + clock-controller@30360000 { + compatible = "fsl,imx8mq-anatop"; + reg = <0x30360000 0x10000>; + #clock-cells = <1>; + clocks = <&ckil>, <&osc_25m>, <&osc_27m>; + clock-names = "ckil", "osc_25m", "osc_27m"; }; ...