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[79.41.6.15]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aac0e82f178sm2138185066b.38.2025.01.05.10.15.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jan 2025 10:15:38 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Michael Turquette , Rob Herring , Stephen Boyd , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 4/6] dt-bindings: clock: st,stm32-rcc: support spread spectrum clocking Date: Sun, 5 Jan 2025 19:14:16 +0100 Message-ID: <20250105181525.1370822-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250105181525.1370822-1-dario.binacchi@amarulasolutions.com> References: <20250105181525.1370822-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=YytcGPe4; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The addition of DT bindings for enabling and tuning spread spectrum clocking generation is available only for the main PLL. Signed-off-by: Dario Binacchi --- .../bindings/clock/st,stm32-rcc.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml index ae9e5b26d876..c345d3ff3fc4 100644 --- a/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml +++ b/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml @@ -77,6 +77,26 @@ properties: Phandle to system configuration controller. It can be used to control the power domain circuitry. + st,ssc-modfreq-hz: + description: + The modulation frequency for main PLL (in Hz) + + st,ssc-moddepth-permyriad: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The modulation rate for main PLL (in permyriad, i.e. 0.01%) + minimum: 25 + maximum: 200 + + st,ssc-modmethod: + $ref: /schemas/types.yaml#/definitions/non-unique-string-array + description: + The modulation techniques for main PLL. + items: + enum: + - center-spread + - down-spread + required: - compatible - reg @@ -97,6 +117,10 @@ allOf: const: 1 description: | The clock index for the specified type. + st,ssc-modfreq-hz: false + st,ssc-moddepth-permyriad: false + st,ssc-modmethod: false + else: properties: '#clock-cells': @@ -118,6 +142,9 @@ examples: reg = <0x40023800 0x400>; clocks = <&clk_hse>, <&clk_i2s_ckin>; st,syscfg = <&pwrcfg>; + st,ssc-modfreq-hz = <10000>; + st,ssc-moddepth-permyriad = <200>; + st,ssc-modmethod = "center-spread"; }; - |