From patchwork Thu Jan 9 21:18:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 3794 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ej1-f69.google.com (mail-ej1-f69.google.com [209.85.218.69]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 2A7C64173F for ; Thu, 9 Jan 2025 22:19:23 +0100 (CET) Received: by mail-ej1-f69.google.com with SMTP id a640c23a62f3a-aa67f03ca86sf95934266b.2 for ; Thu, 09 Jan 2025 13:19:23 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1736457563; cv=pass; d=google.com; s=arc-20240605; b=VFP41zGUaxrqd/FU88GAf6kr0beqPlrHQiz9JZQ6/ZH6/KWq4CUM1sl2nyxkzMbR5o A+vQ2hL42gMQMwSTRlkTyAcam8kVUhqwzFykdrfWWFGAEWRiHTFZD8Px6lapNhqlDWB0 G3dyzDxXaNzvmqoWBFaOBpbsrcMfzc89K9HiXxg049ehjwCyS1pX3Zb8ymXOhKh+NIyH gjpe4S7vh+mGxP4fOL0AVB2f2tkbCk0XkHTSYp/IGPyNSCxWEPhFbYWbb0naaxavmFzt nK0EBdc1/mkK1h1xZnKOSZX3rXEatNkEcRQeVs3V4g85zUA99yn/zMIlStsmbXZdsaWU jaTg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=XtbjdETKR/arvBjKY7fm1vE6kJB4kTw5aeYbUgY4Kd0=; fh=QTgKwgZAfXKcQQV+dp3IMCmXX0NkFdh6fUNcYzK3X+o=; b=e9Pp6pg9BAynapFLB5PpSr6IFDmnALeK24XYTxv3LD8RGnwQm3BqVbZLV42z17Cx41 cxZLxcFzCNqFb45QimlvmvcU2bg6Vd5aGCFPIW8COtk9bvUdB931qq+DS+ScdUHRp1G1 DHFdeIEWrpqkdqXLjT596Q814pwgXXvB+D1Fecs/OV5ttUtYGDd8UpDA1xYjkQaKvGiW ceGbIwBujlxS84l4MCaBd26/zLeR6h9PFzMryekyQFMSno6frW5ACYaVdGT4z9VDBHVH NiQ6FAXbBFDA06KSFzBzou1e7NxOYBTXU6UN8EUgimJNLYiJHdl1D5ZaTPvDKF3OTNF/ h5vA==; darn=patchwork.amarulasolutions.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=I5GgHCBE; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1736457563; x=1737062363; darn=patchwork.amarulasolutions.com; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:x-original-authentication-results :x-original-sender:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:from:to:cc:subject:date:message-id:reply-to; bh=XtbjdETKR/arvBjKY7fm1vE6kJB4kTw5aeYbUgY4Kd0=; b=pCU2QJbpsGMWGpAXxt+XJt/xZdpN6reY+cD5Sbh5qoGDp2JNsIU+fSLogT6uXLhczJ YB+gPPtOFI7PD82gPQB5F+ymK3+33kPXgv6UXkyRINxP1sxn5N3QC9fo52VnSMUUXgFO y1fy8z8STuZMmt621wwAPHEV3O2MRk0l8G2M8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736457563; x=1737062363; h=list-unsubscribe:list-archive:list-help:list-post :x-spam-checked-in-group:list-id:mailing-list:precedence :x-original-authentication-results:x-original-sender:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :x-beenthere:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=XtbjdETKR/arvBjKY7fm1vE6kJB4kTw5aeYbUgY4Kd0=; b=v6ssKdyID0OgMzzKvjwc0/wOTMXELHO6VP5eGcYK8SLDQDTbdQzzrSlRVOnjGfzB6x r93NUqFd529v1irX/nVbCegLb5jJam9Co6tXjDSq9czBwEEcOE81GNb69NX6xUrvrJy0 x+dH/184UiFOckVPKV1+UxibJl2z5Kkm8taQhP/Etfxb8z6i/H6Eti/16sFxHj6rcwLL Dev916VlbOPYxF4W8RsRfvzRP0AFC3MVbsJQoB7g8udWaDIDT3Gf/+zh4wBsRrEUUJML 8UWq7oZIAOJ7tO2cNY9JFSaSj1KiOvUv60WFoKN/nGCa1urFtpwl2VU+xr/kRhg/TuAo 3viQ== X-Forwarded-Encrypted: i=2; AJvYcCUbcBxXu5c4yRmGcpEaxwm320yxV5qzfI7+KQTDQlpK4lp5vAMJxtp6xkMOPysly/oftBjwZJebmO3h8osX@patchwork.amarulasolutions.com X-Gm-Message-State: AOJu0YxJWTzJ4+I6QHlr9V6lftAGPYD3WmliDf28sbz9TOzG3iyN2U1x i+eDv9K11JLIftjmLcXJmRwF3aEvYEuI0JAitfXyPbTElC8dZUPClCZyzofcg99SGg== X-Google-Smtp-Source: AGHT+IFdahOK2A0LTn2/AnVORd0dG9pSh2yBkjPxWOaL1TDumXG3lS5anrvtLpfYiiGCLj8IBFd8Bw== X-Received: by 2002:a05:6402:40c1:b0:5d1:1064:326a with SMTP id 4fb4d7f45d1cf-5d972e1c39fmr18965795a12.15.1736457562761; Thu, 09 Jan 2025 13:19:22 -0800 (PST) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a50:d485:0:b0:5d0:e410:4698 with SMTP id 4fb4d7f45d1cf-5d9855ad73dls464247a12.1.-pod-prod-05-eu; Thu, 09 Jan 2025 13:19:21 -0800 (PST) X-Received: by 2002:a05:6402:26cf:b0:5d4:55e:f99e with SMTP id 4fb4d7f45d1cf-5d972e1d7dfmr19583239a12.18.1736457560905; Thu, 09 Jan 2025 13:19:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736457560; cv=none; d=google.com; s=arc-20240605; b=E8aGijDBkRIKuJd+nqXu3yfH8lUP94DSviXIGuQVwsCS/rw5rA3AO3Ew5s746X+YjT LuZsaMaFKX7p5v16rOjQjXYEW/4Bx2VU7aNuklsfn5UQn0YRC6yCA6+0f/sdD+FenbRM 7dmOR8lRtF51pnbYL8EjVy2OfoyCbNdxJhoDBdQgxEpnIawzXckQZgYZ2zaz+hp/fpzf QtYITsGhvjbGDd1jyJLeOkuXBFeLO7s4npoBVKhT5j39s1WlIYvysj6R8UabZ7/BsRY7 rve+gBlhhtqmMIxEIgGz7BdkeZDWhGZ5zIFtgiNiD7HEK9r3Do9DOE2bsjGnNaj2IpX2 2f4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=4PuckIz6TtMrm6FhKB7AMqxRoyDL7dpmszhuAU6edRg=; fh=LKhgYKqW/DH7bOgdnVELRgL+gR1eISg3bEXUN1rI9pA=; b=Jg0WZjlhCMjdvwibJ84G7M85Z7iFcGY6NwL7JcmKRu4MOIhUzwE1ixH6xQCCDiQ4xK O4ngTMy6jSnGheFucpRu9PNzkoNLtv4zRXV0Nrb8dIs8nbQR/Kr1y7/7gk3VZWxM8gY0 gvSXHAw1fToR2BRJ7bIbA6XIC1jMO1dVi96ra8QkqQ5T+QteFm14xZzYYgL4fogM6EvI q62DIAxZthLq7f/M4zX6He1vN3fucWnxYz697a2EKgv5qY4WAO81dwVzguoHZ3RThpgA Fjt/JgCAdLeyTtWg8oa3UDZpKXOI+x5FA9r6jDQUcncBeZLvXx86KHzE5B5FItnoyJRP VE8w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=I5GgHCBE; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id a640c23a62f3a-ab2c90dc5b1sor86274766b.7.2025.01.09.13.19.20 for (Google Transport Security); Thu, 09 Jan 2025 13:19:20 -0800 (PST) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Gm-Gg: ASbGncu/1z7xwGJbymo2XOqZGTJPCHT511hwPg2UqWgFRORFMsfne3Xhh3qHtRY2t/1 5YaRswZgRsSRV4V74QqAuhhiZHf/RwYP5V3EmG/c/j2HhdqVug1VtWa6B/h5YsGpMeD2OoIORbj dqRUu0mQ/AKP5dMkZgWVUXgxBA7FrBy7B72nrsSULcqAeT1msKQaTcetkMLdaZRi9MYbR0m2/Rz taDAsYaSfFEMX/lHSNxYpXWTrtEtjN4kLQM9a5Clg8V3/DIcip0GEeyyMzT+i7i9he74s10qIf6 ObMQEPo9fOia3CvU2mYOitQekpveHq7rrnOxfCpUhJObk8Hi3hwRRbWnANXIzujHoH0jihq8Tab P1moVbYYoOt9obmqH1Q== X-Received: by 2002:a05:6402:400a:b0:5d2:7199:ac2 with SMTP id 4fb4d7f45d1cf-5d972e00032mr18870795a12.2.1736457560441; Thu, 09 Jan 2025 13:19:20 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-79-41-6-15.retail.telecomitalia.it. [79.41.6.15]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5d9900c4b56sm925567a12.32.2025.01.09.13.19.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jan 2025 13:19:20 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Maxime Coquelin , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v2 3/4] clk: stm32f4: use FIELD helpers to access the PLLCFGR fields Date: Thu, 9 Jan 2025 22:18:30 +0100 Message-ID: <20250109211908.1553072-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250109211908.1553072-1-dario.binacchi@amarulasolutions.com> References: <20250109211908.1553072-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=I5GgHCBE; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Use GENMASK() along with FIELD_GET() and FIELD_PREP() helpers to access the PLLCFGR fields instead of manually masking and shifting. Signed-off-by: Dario Binacchi --- (no changes since v1) drivers/clk/clk-stm32f4.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index 07c13ebe327d..db1c56c8d54f 100644 --- a/drivers/clk/clk-stm32f4.c +++ b/drivers/clk/clk-stm32f4.c @@ -5,6 +5,7 @@ * Inspired by clk-asm9260.c . */ +#include #include #include #include @@ -39,6 +40,8 @@ #define STM32F4_RCC_DCKCFGR 0x8c #define STM32F7_RCC_DCKCFGR2 0x90 +#define STM32F4_RCC_PLLCFGR_N_MASK GENMASK(14, 6) + #define NONE -1 #define NO_IDX NONE #define NO_MUX NONE @@ -632,9 +635,11 @@ static unsigned long stm32f4_pll_recalc(struct clk_hw *hw, { struct clk_gate *gate = to_clk_gate(hw); struct stm32f4_pll *pll = to_stm32f4_pll(gate); + unsigned long val; unsigned long n; - n = (readl(base + pll->offset) >> 6) & 0x1ff; + val = readl(base + pll->offset); + n = FIELD_GET(STM32F4_RCC_PLLCFGR_N_MASK, val); return parent_rate * n; } @@ -673,9 +678,10 @@ static int stm32f4_pll_set_rate(struct clk_hw *hw, unsigned long rate, n = rate / parent_rate; - val = readl(base + pll->offset) & ~(0x1ff << 6); + val = readl(base + pll->offset) & ~STM32F4_RCC_PLLCFGR_N_MASK; + val |= FIELD_PREP(STM32F4_RCC_PLLCFGR_N_MASK, n); - writel(val | ((n & 0x1ff) << 6), base + pll->offset); + writel(val, base + pll->offset); if (pll_state) stm32f4_pll_enable(hw);