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[209.85.220.41]) by mx.google.com with SMTPS id ffacd0b85a97d-3912beef8d8sor436137f8f.0.2025.03.06.03.30.53 for (Google Transport Security); Thu, 06 Mar 2025 03:30:53 -0800 (PST) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Forwarded-Encrypted: i=1; AJvYcCUzlC7Mn9qqLvPkecvVqzjRF/0B+gyM2R1YX8DLKQnv3iCEeG3ntC6DhqzT+SEqR/2k4oTCEcXzMA0Tcq60@amarulasolutions.com X-Gm-Gg: ASbGnctgZMcYGLQIOwgpAddfmp/63jhCZgIpAkSG+22D04LZyjzziV7rhP/cR7w1dR7 v0KVX8dTXyiTqE/rRI6QpZOus2y6B9zM+BGsRYvTh98JXiOceLyTIULhnb1RZpPSR7I6st8NIKN FBSmipVgTaALHk5gsEPmfzHiM3sjrFesdVcQms7K6OqVLpJ99TBHLfyVC3Rnz3jKWAFtC81mho6 PrtFY0fO/g+6rYaCUFVF3azIWSpS33DjbaUiMQlVDvqLpCAGF7HvAg+nwPT0owksLd35+SvkyPL BJPZ3BcJSJ2GXNO1EoqRBwxPO9MxTzSgF1V+wDkn6jVVl3XB9GI/HAGsmO15qO70UoSpdMxy58X NZpUcqw== X-Received: by 2002:a05:6000:1ac9:b0:390:de58:d7fe with SMTP id ffacd0b85a97d-3911f7d1074mr7102679f8f.51.1741260653419; Thu, 06 Mar 2025 03:30:53 -0800 (PST) Received: from localhost.localdomain ([2001:b07:6474:ebbf:4703:aa8c:6eab:8161]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3912bfb79b9sm1749650f8f.3.2025.03.06.03.30.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Mar 2025 03:30:53 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Stephen Boyd , Peng Fan , Abel Vesa , linux-amarula@amarulasolutions.com, Dario Binacchi , Krzysztof Kozlowski , Conor Dooley , Fabio Estevam , Krzysztof Kozlowski , Michael Turquette , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: [PATCH v10 15/18] dt-bindings: clock: imx8m-clock: add PLLs Date: Thu, 6 Mar 2025 12:28:04 +0100 Message-ID: <20250306112959.242131-16-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250306112959.242131-1-dario.binacchi@amarulasolutions.com> References: <20250306112959.242131-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="Rpss43H/"; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Though adding the PLLs to clocks and clock-names properties will break the ABI, it is required to accurately describe the hardware. Indeed, the Clock Control Module (CCM) receives clocks from the PLLs and oscillators and generates clocks for on-chip peripherals. Signed-off-by: Dario Binacchi Reviewed-by: Krzysztof Kozlowski --- (no changes since v7) Changes in v7: - Add 'Reviewed-by' tag of Krzysztof Kozlowski Changes in v6: - New .../bindings/clock/imx8m-clock.yaml | 27 ++++++++++++++----- 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml index c643d4a81478..d96570bf60dc 100644 --- a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml @@ -29,12 +29,12 @@ properties: maxItems: 2 clocks: - minItems: 6 - maxItems: 7 + minItems: 7 + maxItems: 10 clock-names: - minItems: 6 - maxItems: 7 + minItems: 7 + maxItems: 10 '#clock-cells': const: 1 @@ -86,6 +86,10 @@ allOf: - description: ext2 clock input - description: ext3 clock input - description: ext4 clock input + - description: audio1 PLL input + - description: audio2 PLL input + - description: dram PLL input + - description: video PLL input clock-names: items: @@ -95,20 +99,31 @@ allOf: - const: clk_ext2 - const: clk_ext3 - const: clk_ext4 + - const: audio_pll1 + - const: audio_pll2 + - const: dram_pll + - const: video_pll additionalProperties: false examples: # Clock Control Module node: - | + #include + clock-controller@30380000 { compatible = "fsl,imx8mm-ccm"; reg = <0x30380000 0x10000>; #clock-cells = <1>; clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, - <&clk_ext3>, <&clk_ext4>; + <&clk_ext3>, <&clk_ext4>, + <&anatop IMX8MM_ANATOP_AUDIO_PLL1>, + <&anatop IMX8MM_ANATOP_AUDIO_PLL2>, + <&anatop IMX8MM_ANATOP_DRAM_PLL>, + <&anatop IMX8MM_ANATOP_VIDEO_PLL>; clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", - "clk_ext3", "clk_ext4"; + "clk_ext3", "clk_ext4", "audio_pll1", "audio_pll2", + "dram_pll", "video_pll"; }; - |