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[87.5.95.99]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ade1dc38cffsm246524966b.124.2025.06.07.02.37.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Jun 2025 02:37:44 -0700 (PDT) From: Dario Binacchi To: u-boot@lists.denx.de Cc: linux-amarula@amarulasolutions.com, Dario Binacchi , Ilias Apalodimas , Jerome Forissier , Lukasz Majewski , Patrice Chotard , Patrick Delaunay , Rasmus Villemoes , Sean Anderson , Tom Rini , uboot-stm32@st-md-mailman.stormreply.com Subject: [PATCH 9/9] board: stm32: add stm32h747-discovery board support Date: Sat, 7 Jun 2025 11:37:17 +0200 Message-ID: <20250607093730.2249536-10-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250607093730.2249536-1-dario.binacchi@amarulasolutions.com> References: <20250607093730.2249536-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=ocVQ1p9L; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The board includes an STM32H747XI SoC with the following resources: - 2 Mbytes Flash - 1 Mbyte SRAM - LCD-TFT controller - MIPI-DSI interface - FD-CAN - USB 2.0 high-speed/full-speed - Ethernet MAC - camera interface Detailed information can be found at: https://www.st.com/en/evaluation-tools/stm32h747i-disco.html Signed-off-by: Dario Binacchi Reviewed-by: Patrice Chotard --- arch/arm/mach-stm32/stm32h7/Kconfig | 4 +++ board/st/stm32h747-disco/Kconfig | 15 ++++++++ board/st/stm32h747-disco/MAINTAINERS | 7 ++++ board/st/stm32h747-disco/Makefile | 6 ++++ board/st/stm32h747-disco/stm32h747-disco.c | 42 ++++++++++++++++++++++ configs/stm32h747-disco_defconfig | 35 ++++++++++++++++++ drivers/clk/stm32/clk-stm32h7.c | 5 +++ include/configs/stm32h747-disco.h | 32 +++++++++++++++++ 8 files changed, 146 insertions(+) create mode 100644 board/st/stm32h747-disco/Kconfig create mode 100644 board/st/stm32h747-disco/MAINTAINERS create mode 100644 board/st/stm32h747-disco/Makefile create mode 100644 board/st/stm32h747-disco/stm32h747-disco.c create mode 100644 configs/stm32h747-disco_defconfig create mode 100644 include/configs/stm32h747-disco.h diff --git a/arch/arm/mach-stm32/stm32h7/Kconfig b/arch/arm/mach-stm32/stm32h7/Kconfig index 70233a4b23cd..72f20c477d04 100644 --- a/arch/arm/mach-stm32/stm32h7/Kconfig +++ b/arch/arm/mach-stm32/stm32h7/Kconfig @@ -6,11 +6,15 @@ config TARGET_STM32H743_DISCO config TARGET_STM32H743_EVAL bool "STM32H743 Evaluation board" +config TARGET_STM32H747_DISCO + bool "STM32H747 Discovery board" + config TARGET_STM32H750_ART_PI bool "STM32H750 ART Pi board" source "board/st/stm32h743-eval/Kconfig" source "board/st/stm32h743-disco/Kconfig" +source "board/st/stm32h747-disco/Kconfig" source "board/st/stm32h750-art-pi/Kconfig" endif diff --git a/board/st/stm32h747-disco/Kconfig b/board/st/stm32h747-disco/Kconfig new file mode 100644 index 000000000000..a7b2c09a327f --- /dev/null +++ b/board/st/stm32h747-disco/Kconfig @@ -0,0 +1,15 @@ +if TARGET_STM32H747_DISCO + +config SYS_BOARD + default "stm32h747-disco" + +config SYS_VENDOR + default "st" + +config SYS_SOC + default "stm32h7" + +config SYS_CONFIG_NAME + default "stm32h747-disco" + +endif diff --git a/board/st/stm32h747-disco/MAINTAINERS b/board/st/stm32h747-disco/MAINTAINERS new file mode 100644 index 000000000000..d48649f773f3 --- /dev/null +++ b/board/st/stm32h747-disco/MAINTAINERS @@ -0,0 +1,7 @@ +STM32H747 DISCOVERY BOARD +M: Dario Binacchi +S: Maintained +F: board/st/stm32h747-disco +F: include/configs/stm32h747-disco.h +F: configs/stm32h747-disco_defconfig +F: arch/arm/dts/stm32h747* diff --git a/board/st/stm32h747-disco/Makefile b/board/st/stm32h747-disco/Makefile new file mode 100644 index 000000000000..e11f052cc88f --- /dev/null +++ b/board/st/stm32h747-disco/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2025 Dario Binacchi +# + +obj-y := stm32h747-disco.o diff --git a/board/st/stm32h747-disco/stm32h747-disco.c b/board/st/stm32h747-disco/stm32h747-disco.c new file mode 100644 index 000000000000..be0884bdeb4d --- /dev/null +++ b/board/st/stm32h747-disco/stm32h747-disco.c @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * stm32h747i-disco support + * + * Copyright (C) 2025 Dario Binacchi + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { + debug("DRAM init failed: %d\n", ret); + return ret; + } + + if (fdtdec_setup_mem_size_base() != 0) + ret = -EINVAL; + + return ret; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + + return 0; +} + +int board_init(void) +{ + return 0; +} diff --git a/configs/stm32h747-disco_defconfig b/configs/stm32h747-disco_defconfig new file mode 100644 index 000000000000..8a0c72450d1e --- /dev/null +++ b/configs/stm32h747-disco_defconfig @@ -0,0 +1,35 @@ +CONFIG_ARM=y +CONFIG_ARCH_STM32=y +CONFIG_TEXT_BASE=0x08000000 +CONFIG_SYS_MALLOC_LEN=0x100000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="st/stm32h747i-disco" +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_SYS_LOAD_ADDR=0xd0400000 +CONFIG_STM32H7=y +CONFIG_TARGET_STM32H747_DISCO=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTDELAY=3 +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_DEFAULT_FDT_FILE="stm32h747i-disco" +CONFIG_SYS_CBSIZE=256 +CONFIG_SYS_PBSIZE=282 +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT4_WRITE=y +# CONFIG_ISO_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NO_NET=y +CONFIG_STM32_SDMMC2=y +# CONFIG_PINCTRL_FULL is not set diff --git a/drivers/clk/stm32/clk-stm32h7.c b/drivers/clk/stm32/clk-stm32h7.c index 6acf2ff0a8fb..aa3be414a29f 100644 --- a/drivers/clk/stm32/clk-stm32h7.c +++ b/drivers/clk/stm32/clk-stm32h7.c @@ -114,6 +114,7 @@ #define QSPISRC_PER_CK 3 #define PWR_CR3 0x0c +#define PWR_CR3_LDOEN BIT(1) #define PWR_CR3_SCUEN BIT(2) #define PWR_D3CR 0x18 #define PWR_D3CR_VOS_MASK GENMASK(15, 14) @@ -375,7 +376,11 @@ int configure_clocks(struct udevice *dev) clrsetbits_le32(pwr_base + PWR_D3CR, PWR_D3CR_VOS_MASK, VOS_SCALE_1 << PWR_D3CR_VOS_SHIFT); /* Lock supply configuration update */ +#if IS_ENABLED(CONFIG_TARGET_STM32H747_DISCO) + clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_LDOEN); +#else clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SCUEN); +#endif while (!(readl(pwr_base + PWR_D3CR) & PWR_D3CR_VOSREADY)) ; diff --git a/include/configs/stm32h747-disco.h b/include/configs/stm32h747-disco.h new file mode 100644 index 000000000000..393445a8ae1f --- /dev/null +++ b/include/configs/stm32h747-disco.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2025 Dario Binacchi + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include +#include + +/* For booting Linux, use the first 16MB of memory */ +#define CFG_SYS_BOOTMAPSZ SZ_16M + +#define CFG_SYS_FLASH_BASE 0x08000000 + +#define CFG_SYS_HZ_CLOCK 1000000 + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) + +#include +#define CFG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=0xD0008000\0" \ + "fdtfile=stm32h747i-disco.dtb\0" \ + "fdt_addr_r=0xD0408000\0" \ + "scriptaddr=0xD0418000\0" \ + "pxefile_addr_r=0xD0428000\0" \ + "ramdisk_addr_r=0xD0438000\0" \ + BOOTENV + +#endif /* __CONFIG_H */