From patchwork Fri Jun 20 08:27:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 4194 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-wm1-f71.google.com (mail-wm1-f71.google.com [209.85.128.71]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 5765C3F0EB for ; Fri, 20 Jun 2025 10:27:56 +0200 (CEST) Received: by mail-wm1-f71.google.com with SMTP id 5b1f17b1804b1-43eed325461sf9733225e9.3 for ; Fri, 20 Jun 2025 01:27:56 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1750408076; cv=pass; d=google.com; s=arc-20240605; b=eWwRlaYif7XFwOwxChFPm1rE8r8N6dUZQMvkamzeyRw3WIyBosTRisMZBcbxaXrcj6 LE5dVUVX9raKp7h+enEq5tadqQso3T8z3jh4v3ZQRYCUr6u/5D6en0ZKoyPAYuGzSE/S +I6FbasltkDzv9W2ycw8qP/IcWUSFWtHd70doGEfLPQ4/bFbw7M07oSblMPbbcvPKQjg gh4N3g8ZR7Yya5C5hz3PSzrQPyP9i/4sKQyq58k7dm2If2zrZWBc86XIq+3M0foIBY3i wXWwC9l3X759T4JD+0YEelkfj0GELhiBLL24sOPPxsRSvtd5+TM5YcONoNwO54SP5Jta JQAQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=fuKWhBieixnV6cMAYw5yUq0HOu7yK+69WIzrXEAHBZM=; fh=3dddx0Mms8hFcKFp2H7ynbFg86osP7Wl1kDc3I87TeI=; b=YO9VimRkqu4dniDruGQ4IdM1BUFvnGWVZsbiA7SxavH9V1OCPAyEjqq7Emkfrykz3G fRHQCDlosvO7zeIvULv60oUupHbXKpgiWWG8N/BiCCukKfbOzyzKidk/HAQO1XflpMXY fo7p54Yh/GzmyeTRsuu2+WBRIMdazUKaHt+ShRpNkmnhkBfmolSmSCOdcN+vkTef1GC+ o6+0zt2Uw+/lP/6uOxhqNXiRSxJ/4kEbwrioZI4dKpV/CyrNTeQ0pRf+zeUVJO3e++MV V0M4g8t89gMzSTnHP65Z/puLK2YnuCAcziqbvL32veT8XEhI/Wz5X6j01cmQx2R2WIQ6 h19g==; darn=patchwork.amarulasolutions.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=kO4Hj+S8; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1750408076; x=1751012876; darn=patchwork.amarulasolutions.com; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:x-original-authentication-results :x-original-sender:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:from:to:cc:subject:date:message-id:reply-to; bh=fuKWhBieixnV6cMAYw5yUq0HOu7yK+69WIzrXEAHBZM=; b=SOuPuiZsoup25oq/86F4kuwOwYHbRWDm8NthYKvf+2lCXQORo8VdVB/4DTUlLJy+7+ ic4j1LEmOs0RaY28dPScQXtsyDV4bStw22psRAVZiDgdaDHPyDf0fhrsNG7GtpAzI4yP STDn5YD+SYfF0Swwr6I4Aa/tNceAYz6ofd5N0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1750408076; x=1751012876; h=list-unsubscribe:list-archive:list-help:list-post :x-spam-checked-in-group:list-id:mailing-list:precedence :x-original-authentication-results:x-original-sender:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :x-beenthere:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=fuKWhBieixnV6cMAYw5yUq0HOu7yK+69WIzrXEAHBZM=; b=L1c/8C3W858tZcfqQPyQ8nw2Jriab7R1UK6gIvy8Wp4Bj0VklhM4q4xjmHInCFfDp0 TJ9+rWcsm8ZSLrTcwSQm3Dfb/At6adz/DpbnnbAv1ukvZ8VvQe4wIQTe9mwuEFZAWT9a dyeQikjFjnI+P9NNrfRH4TOMXQH7a6odXybb152mhiWM85ncCQcu+nULnoVbXnEjVsDK WgRrPUTfH9+k7KGz1PN+K7wj+zBzVjvIXicc4ViAlOXJ7o25vx3Miz6kdnOkJkfJ1GPE nUw24mGQdo8GpfyRR+ORzYcb0RyUihv9X77SkVKwZixrJAbjMkppR2P8wwcoEW+qjjw5 BECA== X-Forwarded-Encrypted: i=2; AJvYcCWoK/p51E5KjfDe01qdYPAkYP+Pl6HRvgPc1m9maW46Ewgrucp9CzwxVbuSHkMCOQP/4fx3WWfm/owky1xk@patchwork.amarulasolutions.com X-Gm-Message-State: AOJu0YwctmaiZdC9/2QX9rKR8DK+loKOEO4ENMuoi6dr5X2ROoYveCF2 OWZ5cs9UEnQfGstkBWoPdCHCxT0YDhFWOKg40wMORnTsFYxXrAWWzWboe7bcbMzJ0rHnsw== X-Google-Smtp-Source: AGHT+IGE7akNjK19BPWRuRaDu/EaPK/ydMzsi7l9mKBCTSLsAMawYNS9+cYJL4LWIx+ukEI7+GovaA== X-Received: by 2002:a05:600c:81c8:b0:441:d4e8:76cd with SMTP id 5b1f17b1804b1-453659f6a8cmr16374815e9.29.1750408075828; Fri, 20 Jun 2025 01:27:55 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com; h=AZMbMZeKALcX/hnVJTi//uBy9t3xFyh+lwBLJX1cJUsbvsSe5w== Received: by 2002:a05:600c:630f:b0:43b:cfb8:a5d7 with SMTP id 5b1f17b1804b1-4535f1ceda5ls9060385e9.0.-pod-prod-06-eu; Fri, 20 Jun 2025 01:27:54 -0700 (PDT) X-Received: by 2002:a05:600c:8b2a:b0:43d:b3:f95 with SMTP id 5b1f17b1804b1-453659f580fmr12885115e9.28.1750408073700; Fri, 20 Jun 2025 01:27:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750408073; cv=none; d=google.com; s=arc-20240605; b=i5afbp2BW3C3N8LipyUkSuWKuEgI4N5oIMYL65wBGeVH0LrZVlpp8I2SzBFPAWNp7M yOkyVNN8jDcgcJ+k/ZpHeTIC9WyIA+ap8dhD2NWAZbdEQttYRSdhMjC5dk0m+6xGUAIC kmn4Q0qtt/HYLk5dQrIjlqR85ByZymhCr3mDd5v3tO/5ssquV9uMlMWlnGMilsWsQ/FH NJZWi/EuncgVPxwxbXkqkWZwJwBEob/8QsZWX4oYknSbF7wMube0fV2rFf0qB76JZ/zw JKe0Jusb5AxJ2YIR/hX1knL7wtlbka+B4c0uHGUDLaj4/BiaWQ5bMPmz6uHcpmUUIvGe qx+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=ncgHuik/0sMUegckJw8LnO6mW6Me0WOvEDXQPt1J5GI=; fh=xu+G6IIbJio+UNLMtGxDniGsR9i9CRRo5Zeavy9ZrJE=; b=fak3qJ6LTGfcSV07YzAyYdP1P00+gfEQplXZjobHAneFq+ymqOyNxhZEFWir5X5Y4v NJbKvpQLgIuI3bHo+jj0nBr9Z/ZtSugAWbcg5hsakbg5AVNxHEyYdlXt1u5UE4EIcrrU 9ppuGwiUovAiUUJCZzU6/yl378UFK+uCJ4Mw/GtpUVQrY6znFB8fnzioiYyyzDGExZi2 7EgTMeDUA5RZONHkNLr2MD6/mcGsdPiPjUmu36bH1gZ1R0q5cDjVVxc70KmFes9xXDV2 nkW7j0rHYGa0UEDvBwBRMCGRqPZ0Nn4D+hx1MfQlBpf75ncMjr2svPJmbJunBqQiYc36 XS5g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=kO4Hj+S8; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id 5b1f17b1804b1-45365a3c664sor3297715e9.9.2025.06.20.01.27.53 for (Google Transport Security); Fri, 20 Jun 2025 01:27:53 -0700 (PDT) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Gm-Gg: ASbGncvytIqgG9pVaa6XxUNf9wWjuwSZG43rm0t8ETQg6MkeEtXPBXn4UuGfgyl8kT9 XmP8RIdjRxQ7AcI4LI2K+BqmyK0tpNBwzRIP6hEKqLGoaMn1FygEw8zasG8RtlGjI5ykQC+jSow j0HnmL/co2wl486vfm4LXZeOCXfYMHrLkw/LLOIdJ7Op1wlXFBvHDjDH4VBU2ixASxiNKOxSoYr Euf4nzQDPk84wh78bYVBBYCEDwXfMusKt53H7k1T+bWgx4/R+ELNQScrI2S51ArhbZTALa376Wh gFN1en2TNn0ojZGHgY+pOCp6+rJjLVo/oisB0bq5eb+l4fj8Kw2EhUMDN8gAGaBH6XkJ2hS/IJa vzdIwDlvw2xdnAw+jGgDMiTQzi1b5k/CM45gfcgB3uYVK7B6cAPgJ X-Received: by 2002:a05:600c:5494:b0:450:cd50:3c64 with SMTP id 5b1f17b1804b1-45365a00582mr16506825e9.31.1750408073201; Fri, 20 Jun 2025 01:27:53 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.amarulasolutions.com ([2.196.43.224]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4535e9844a9sm52274285e9.12.2025.06.20.01.27.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jun 2025 01:27:52 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Matteo Lisi , Dario Binacchi , Peng Fan , Frank Li , Conor Dooley , Fabio Estevam , Krzysztof Kozlowski , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [RESEND PATCH v4 07/10] ARM: dts: imx6ul: support Engicam MicroGEA RMM board Date: Fri, 20 Jun 2025 10:27:11 +0200 Message-ID: <20250620082736.3582691-8-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250620082736.3582691-1-dario.binacchi@amarulasolutions.com> References: <20250620082736.3582691-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=kO4Hj+S8; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Support Engicam MicroGEA RMM board with: - 256 Mbytes NAND Flash - 512 Mbytes DRAM DDR2 - CAN - LEDs - Micro SD card connector - USB 2.0 high-speed/full-speed - Ethernet MAC Signed-off-by: Dario Binacchi Reviewed-by: Peng Fan Reviewed-by: Frank Li --- Changes in v4: - Add Reviewed-by tag of Frank Li Changes in v3: - Rename sgtl5000 node to audio-codec. - Move the reg property of the audio-codec node right after the compatible property. - Drop an extra blank line from iomuxc and iomuxc_snvs nodes. Changes in v2: - Move iomuxc and iomuxc_snvs nodes to the end of the DTS file. - Add Reviewed-by tag of Peng Fan arch/arm/boot/dts/nxp/imx/Makefile | 1 + .../nxp/imx/imx6ull-engicam-microgea-rmm.dts | 360 ++++++++++++++++++ 2 files changed, 361 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile index 57f185198217..32dfd69b8d8b 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -357,6 +357,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ull-dhcom-picoitx.dtb \ imx6ull-dhcor-maveo-box.dtb \ imx6ull-engicam-microgea-bmm.dtb \ + imx6ull-engicam-microgea-rmm.dtb \ imx6ull-jozacp.dtb \ imx6ull-kontron-bl.dtb \ imx6ull-myir-mys-6ulx-eval.dtb \ diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts new file mode 100644 index 000000000000..5d1cc8a1f555 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts @@ -0,0 +1,360 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 Amarula Solutions, Dario Binacchi + * Copyright (C) 2025 Engicam srl + */ + +/dts-v1/; + +#include "imx6ull-engicam-microgea.dtsi" + +/ { + compatible = "engicam,microgea-imx6ull-rmm", + "engicam,microgea-imx6ull", "fsl,imx6ull"; + model = "Engicam MicroGEA i.MX6ULL BMM Board"; + + backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 100>; + num-interpolated-steps = <100>; + default-brightness-level = <85>; + pwms = <&pwm8 0 100000 0>; + }; + + buzzer { + compatible = "pwm-beeper"; + pwms = <&pwm4 0 1000000 0>; + }; + + reg_1v8: regulator-1v8 { + compatible = "regulator-fixed"; + regulator-name = "1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_usb1_vbus: regulator-usb1-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usb1>; + regulator-name = "usb1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usb2_vbus: regulator-usb2-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usb2>; + regulator-name = "usbotg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio5 3 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_ext_pwr: regulator-ext-pwr { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_ext_pwr>; + regulator-name = "ext-pwr"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio5 6 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "imx6ull-microgea-rmm-sgtl5000"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&codec_dai>; + simple-audio-card,frame-master = <&codec_dai>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + + cpu_dai: simple-audio-card,cpu { + sound-dai = <&sai2>; + }; + + codec_dai: simple-audio-card,codec { + sound-dai = <&codec>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds>; + + led-0 { + gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; + default-state = "off"; + status = "okay"; + }; + + led-1 { + gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; + default-state = "off"; + status = "okay"; + }; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clock-frequency = <100000>; + status = "okay"; + + touchscreen: touchscreen@38 { + compatible ="edt,edt-ft5306"; + reg = <0x38>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_touchscreen>; + interrupt-parent = <&gpio2>; + interrupts = <8 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; + report-rate-hz = <6>; + /* settings valid only for Hycon touchscreen */ + touchscreen-size-x = <1280>; + touchscreen-size-y = <800>; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <100000>; + status = "okay"; + + codec: audio-codec@a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mclk>; + #sound-dai-cells = <0>; + clocks = <&clks IMX6UL_CLK_CKO>; + assigned-clocks = <&clks IMX6UL_CLK_CKO2_SEL>, + <&clks IMX6UL_CLK_CKO2_PODF>, + <&clks IMX6UL_CLK_CKO2>, + <&clks IMX6UL_CLK_CKO>; + assigned-clock-parents = <&clks IMX6UL_CLK_OSC>, + <&clks IMX6UL_CLK_CKO2_SEL>, + <&clks IMX6UL_CLK_CKO2_PODF>, + <&clks IMX6UL_CLK_CKO2>; + VDDA-supply = <®_3v3>; + VDDIO-supply = <®_3v3>; + VDDD-supply = <®_1v8>; + }; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + +&pwm8 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm8>; + status = "okay"; +}; + +&sai2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&usbotg1 { + dr_mode = "host"; + vbus-supply = <®_usb1_vbus>; + disable-over-current; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + vbus-supply = <®_usb2_vbus>; + disable-over-current; + status = "okay"; +}; + +/* MicroSD */ +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + vmmc-supply = <®_3v3>; + bus-width = <4>; + keep-power-in-suspend; + non-removable; + wakeup-source; + status = "okay"; +}; + +&iomuxc { + pinctrl_can: can-grp { + fsl,pins = < + MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 + MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_CSI_PIXCLK__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_CSI_MCLK__I2C1_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO00__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_GPIO1_IO01__I2C2_SDA 0x4001b8b0 + >; + }; + + pinctrl_leds: ledsgrp { + fsl,pins = < + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x130b0 + MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x130b0 + >; + }; + + pinctrl_mclk: mclkgrp { + fsl,pins = < + MX6UL_PAD_JTAG_TMS__CCM_CLKO1 0x13009 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO05__PWM4_OUT 0x110b0 + >; + }; + + pinctrl_pwm8: pwm8grp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0 + >; + }; + + pinctrl_sai2: sai2grp { + fsl,pins = < + MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0 + MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 + MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 + MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0 + >; + }; + + pinctrl_touchscreen: touchgrp { + fsl,pins = < + MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14 0x17059 + MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x17059 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x0b0b0 + MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x0b0b0 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; +}; + +&iomuxc_snvs { + pinctrl_reg_usb1: regusb1grp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x17059 + >; + }; + + pinctrl_reg_usb2: regusb2grp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059 + >; + }; + + pinctrl_reg_ext_pwr: reg-ext-pwrgrp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x17059 + >; + }; +};