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[209.85.220.41]) by mx.google.com with SMTPS id a640c23a62f3a-b842c018b62sor95097166b.1.2026.01.07.11.45.47 for (Google Transport Security); Wed, 07 Jan 2026 11:45:48 -0800 (PST) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Gm-Gg: AY/fxX5NqEVRwB2l3vzNPTmvdd/Ovs3weo8SxQP0Q+SjWoYLEkOJOiZEL5VvRTA9eOb eUpUbkyIXWHk9FVOdrx3VHkKXdjDffTNupDP+M/16Vc5B12pdOIz2yHEq4wzJtyYSBS0ZDD9gnA o0P21d2e38Wd82+YmAc6xAfQrxwt8bYMBnlYHZAFfH+hEMI3Q4mMBs1b7q9/VKWHFLvG/FGUyCV QKtyRCjyh2yC4n0Vj2hn8IX3qCjAf7QKbRiQUqRL//W9LUC2gfFFy2mhycQjQoaZfubcwrjYxcP XOMLQmMIRo8BoZrsY1L0H0Zfkeq6KsbscyfIAU+xajHovwUiNnDa7eNN76Kyj1pDKBJP80etuew KUrKgHTL2yxpKaYtCZE4/kn0p7hJV8ycqJB0sLCB6lMA3RsIJXecx9AiqPuD25Wt5aZ/gzyJgY9 c/vziAGZCDjnPlZo8auBwKYZrxctUBx4V58frLBo+r7+CZz3cHJELKfa4syNWYFPVV+Fys/pgPR 5qMjELZr0qeyY6XehI/jqNcCH3psY5GQ3c= X-Received: by 2002:a17:907:d0a:b0:b76:d734:d459 with SMTP id a640c23a62f3a-b844506436fmr387336366b.57.1767815147362; Wed, 07 Jan 2026 11:45:47 -0800 (PST) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.41.122]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b842a233fb3sm591201066b.12.2026.01.07.11.45.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Jan 2026 11:45:46 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 2/2] arm64: dts: st: add TAMP-NVRAM support for STM32MP25 Date: Wed, 7 Jan 2026 20:45:33 +0100 Message-ID: <20260107194541.1843999-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260107194541.1843999-1-dario.binacchi@amarulasolutions.com> References: <20260107194541.1843999-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=iSFciIkh; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=neutral header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add the TAMP node along with its NVRAM child node and define the fixed-layout for fwu_info and boot_mode registers. The TAMP (Tamper and backup registers) block is a system controller that provides access to backup registers as NVMEM storage that persists across reboots. Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index a8e6e0f77b83..c7839e732f31 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -2084,6 +2084,32 @@ rtc: rtc@46000000 { status = "disabled"; }; + tamp: tamp@46010000 { + compatible = "st,stm32-tamp", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x46010000 0x400>; + ranges; + + nvram: nvram@46010100 { + compatible = "st,stm32mp25-tamp-nvram"; + reg = <0x46010100 0x200>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + fwu_info: tamp-bkp@c0 { + reg = <0xc0 0x4>; + }; + + boot_mode: tamp-bkp@180 { + reg = <0x180 0x4>; + }; + }; + }; + }; + pinctrl_z: pinctrl@46200000 { #address-cells = <1>; #size-cells = <1>;