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[209.85.220.41]) by mx.google.com with SMTPS id 5b1f17b1804b1-48ff6262333sor9869185e9.12.2026.05.18.07.32.16 for (Google Transport Security); Mon, 18 May 2026 07:32:16 -0700 (PDT) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Gm-Gg: Acq92OEkFBgnFrRg08ibwEHl+J3RFH7GmJH+XHy1OFwQy+ggYiQc0/nHgcXj5CAmYD9 cXblKiAHBNk8coATk06gSHQGqV4WrQvMocqV9dDSvh6WBRuPkuwVQNFIIljkBiUV/w6us9/1zdq r0jufnvjHiCHVFIA9q0fJiNTx6kHL22lAYpwOAsB9JPtkfTq89MmMbYpcU71HV54FCEOOoyuvVB o5kIkdSdZV3iutzvRblc0sKebr8nEh2fm/qTP3B9o/MV5C0zHY1j1EUV8KPq98jVUZ10vAPlULc J3YstKLnVFcLY8hJkp2MUTUmiexVkClu2sM+hAcxqPWtPoA2WSKJ6SLNA7sM+qpddjO6IzsxxnI GuG56aWtmKwWf0Xm5L5QXciBx4pMi10VX3q7QG9sJwzetiYHr8HCSUFYVQ0DWgC6Wc0KZQCKpy5 tjf0QP6EBuVmwxfGyzPzPzEPrbP1M8ERKE1E3cH4Nd4oN6CnEfpZaXLlTonUx+DR5i6AFCBt8Ys i9Q79v33tioF1NIKP9uM4+3ZVu5CMYIh926sPo8EwX4guE5r0os2Nuf4kE= X-Received: by 2002:a05:600c:8184:b0:485:46fd:7887 with SMTP id 5b1f17b1804b1-48fe60edcefmr232164425e9.13.1779114736213; Mon, 18 May 2026 07:32:16 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:15 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 09/15] arm64: dts: st: add sdmmc2 pins for stm32mp25 Date: Mon, 18 May 2026 16:31:24 +0200 Message-ID: <20260518143150.3138712-10-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=daAXCJQ6; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=neutral header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add the sdmmc2 pins used on MicroGEA-STM32MP257-RMM board. Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi index ab1e62cf2bfc..62f898a55d45 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -622,6 +622,86 @@ pins { }; }; + /omit-if-no-ref/ + sdmmc2_b4_pins_a: sdmmc2-b4-0 { + pins1 { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + ; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = ; /* SDMMC2_CK */ + slew-rate = <2>; + drive-push-pull; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { + pins1 { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + ; /* SDMMC2_D3 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = ; /* SDMMC2_CK */ + slew-rate = <2>; + drive-push-pull; + bias-pull-up; + }; + pins3 { + pinmux = ; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-open-drain; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { + pins { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + , /* SDMMC2_CK */ + ; /* SDMMC2_CMD */ + }; + }; + + /omit-if-no-ref/ + sdmmc2_d47_pins_a: sdmmc2-d47-0 { + pins { + pinmux = , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + ; /* SDMMC2_D7 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 { + pins { + pinmux = , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + ; /* SDMMC2_D7 */ + }; + }; + /omit-if-no-ref/ spi3_pins_a: spi3-0 { pins1 {