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[209.85.220.65]) by mx.google.com with SMTPS id n15-v6sor26596740pfb.30.2018.11.16.08.40.45 for (Google Transport Security); Fri, 16 Nov 2018 08:40:45 -0800 (PST) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a62:528e:: with SMTP id g136mr7747262pfb.111.1542386445340; Fri, 16 Nov 2018 08:40:45 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id p5-v6sm34622213pfb.109.2018.11.16.08.40.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Nov 2018 08:40:44 -0800 (PST) From: Jagan Teki To: Maarten Lankhorst , Maxime Ripard , Sean Paul , David Airlie , Rob Herring , Chen-Yu Tsai , Icenowy Zheng , Jernej Skrabec , Vasily Khoruzhick , Thierry Reding , Mark Rutland , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Michael Trimarchi , TL Lim , linux-sunxi@googlegroups.com, linux-amarula@amarulasolutions.com Cc: Jagan Teki Subject: [PATCH v2 09/12] drm/sun4i: sun6i_mipi_dsi: Enable burst mode HBP, HSA_HSE Date: Fri, 16 Nov 2018 22:09:13 +0530 Message-Id: <20181116163916.29621-10-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181116163916.29621-1-jagan@amarulasolutions.com> References: <20181116163916.29621-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=S2T6BdWe; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Horizontal back porch, sync active and sync end bits are needed to disable for burst mode panel operations. So, disable them via dsi base control register. Signed-off-by: Jagan Teki --- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c index 22d2987c3298..20a1de8493e0 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c @@ -644,15 +644,21 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi, struct sun6i_dsi_timings timings; size_t bytes; u8 *buffer; + u32 val = 0; /* Do all timing calculations up front to allocate buffer space */ memset(&timings, 0, sizeof(timings)); - if (device->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) + if (device->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) { timings.hblk = (mode->hdisplay * Bpp); - else + + regmap_read(dsi->regs, SUN6I_DSI_BASIC_CTL_REG, &val); + val |= SUN6I_DSI_BASIC_CTL_HBP_DIS; + val |= SUN6I_DSI_BASIC_CTL_HSA_HSE_DIS; + } else { sun6i_dsi_get_timings(dsi, mode, &timings); + } /* How many bytes do we need to send all payloads? */ bytes = max_t(size_t, max(max(timings.hfp, timings.hblk), @@ -661,7 +667,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi, if (WARN_ON(!buffer)) return; - regmap_write(dsi->regs, SUN6I_DSI_BASIC_CTL_REG, 0); + regmap_write(dsi->regs, SUN6I_DSI_BASIC_CTL_REG, val); regmap_write(dsi->regs, SUN6I_DSI_SYNC_HSS_REG, sun6i_dsi_build_sync_pkt(MIPI_DSI_H_SYNC_START,