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[209.85.220.65]) by mx.google.com with SMTPS id m11sor3899683pjl.21.2019.06.14.09.44.01 for (Google Transport Security); Fri, 14 Jun 2019 09:44:01 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90a:26a1:: with SMTP id m30mr12317652pje.59.1560530641316; Fri, 14 Jun 2019 09:44:01 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.18]) by smtp.gmail.com with ESMTPSA id 85sm1639583pfv.130.2019.06.14.09.43.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 14 Jun 2019 09:44:00 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , David Airlie , Daniel Vetter , Chen-Yu Tsai , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jernej Skrabec Cc: Michael Trimarchi , linux-sunxi@googlegroups.com, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v2 5/9] drm/sun4i: tcon_top: Register clock gates in probe Date: Fri, 14 Jun 2019 22:13:20 +0530 Message-Id: <20190614164324.9427-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190614164324.9427-1-jagan@amarulasolutions.com> References: <20190614164324.9427-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="Omtw/7fq"; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , TCON TOP have clock gates for TV0, TV1, dsi and right now these are register during bind call. Of which, dsi clock gate would required during DPHY probe but same can miss to get since tcon top is not bound at that time. To solve, this circular dependency move the clock gate registration from bind to probe so-that DPHY can get the dsi gate clock on time. Signed-off-by: Jagan Teki --- drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 94 ++++++++++++++------------ 1 file changed, 49 insertions(+), 45 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c index 465e9b0cdfee..a8978b3fe851 100644 --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c @@ -124,7 +124,53 @@ static struct clk_hw *sun8i_tcon_top_register_gate(struct device *dev, static int sun8i_tcon_top_bind(struct device *dev, struct device *master, void *data) { - struct platform_device *pdev = to_platform_device(dev); + struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev); + int ret; + + ret = reset_control_deassert(tcon_top->rst); + if (ret) { + dev_err(dev, "Could not deassert ctrl reset control\n"); + return ret; + } + + ret = clk_prepare_enable(tcon_top->bus); + if (ret) { + dev_err(dev, "Could not enable bus clock\n"); + goto err_assert_reset; + } + + return 0; + +err_assert_reset: + reset_control_assert(tcon_top->rst); + + return ret; +} + +static void sun8i_tcon_top_unbind(struct device *dev, struct device *master, + void *data) +{ + struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev); + struct clk_hw_onecell_data *clk_data = tcon_top->clk_data; + int i; + + of_clk_del_provider(dev->of_node); + for (i = 0; i < CLK_NUM; i++) + if (clk_data->hws[i]) + clk_hw_unregister_gate(clk_data->hws[i]); + + clk_disable_unprepare(tcon_top->bus); + reset_control_assert(tcon_top->rst); +} + +static const struct component_ops sun8i_tcon_top_ops = { + .bind = sun8i_tcon_top_bind, + .unbind = sun8i_tcon_top_unbind, +}; + +static int sun8i_tcon_top_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; struct clk_hw_onecell_data *clk_data; struct sun8i_tcon_top *tcon_top; const struct sun8i_tcon_top_quirks *quirks; @@ -132,7 +178,7 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, void __iomem *regs; int ret, i; - quirks = of_device_get_match_data(&pdev->dev); + quirks = of_device_get_match_data(dev); tcon_top = devm_kzalloc(dev, sizeof(*tcon_top), GFP_KERNEL); if (!tcon_top) @@ -164,18 +210,6 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, if (IS_ERR(regs)) return PTR_ERR(regs); - ret = reset_control_deassert(tcon_top->rst); - if (ret) { - dev_err(dev, "Could not deassert ctrl reset control\n"); - return ret; - } - - ret = clk_prepare_enable(tcon_top->bus); - if (ret) { - dev_err(dev, "Could not enable bus clock\n"); - goto err_assert_reset; - } - /* * At least on H6, some registers have some bits set by default * which may cause issues. Clear them here. @@ -226,45 +260,15 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, dev_set_drvdata(dev, tcon_top); - return 0; + return component_add(dev, &sun8i_tcon_top_ops); err_unregister_gates: for (i = 0; i < CLK_NUM; i++) if (!IS_ERR_OR_NULL(clk_data->hws[i])) clk_hw_unregister_gate(clk_data->hws[i]); - clk_disable_unprepare(tcon_top->bus); -err_assert_reset: - reset_control_assert(tcon_top->rst); - return ret; } -static void sun8i_tcon_top_unbind(struct device *dev, struct device *master, - void *data) -{ - struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev); - struct clk_hw_onecell_data *clk_data = tcon_top->clk_data; - int i; - - of_clk_del_provider(dev->of_node); - for (i = 0; i < CLK_NUM; i++) - if (clk_data->hws[i]) - clk_hw_unregister_gate(clk_data->hws[i]); - - clk_disable_unprepare(tcon_top->bus); - reset_control_assert(tcon_top->rst); -} - -static const struct component_ops sun8i_tcon_top_ops = { - .bind = sun8i_tcon_top_bind, - .unbind = sun8i_tcon_top_unbind, -}; - -static int sun8i_tcon_top_probe(struct platform_device *pdev) -{ - return component_add(&pdev->dev, &sun8i_tcon_top_ops); -} - static int sun8i_tcon_top_remove(struct platform_device *pdev) { component_del(&pdev->dev, &sun8i_tcon_top_ops);