[v3,11/18] ram: rockchip: debug: Add sdram_print_ddr_info
diff mbox series

Message ID 20190715182856.21688-12-jagan@amarulasolutions.com
State New
Headers show
Series
  • ram: rk3399: Add rank detection
Related show

Commit Message

Jagan Teki July 15, 2019, 6:28 p.m. UTC 
Add sdram ddr info print support, this would help to
observe the sdram base parameters.

Here is sample print on LPDDR4, 50MHz channel 0
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
---
 .../include/asm/arch-rockchip/sdram_common.h  |  7 ++++
 drivers/ram/rockchip/sdram_debug.c            | 40 +++++++++++++++++++
 2 files changed, 47 insertions(+)

Comments

Kever Yang July 16, 2019, 7:42 a.m. UTC | #1 
On 2019/7/16 上午2:28, Jagan Teki wrote:
> Add sdram ddr info print support, this would help to
> observe the sdram base parameters.
>
> Here is sample print on LPDDR4, 50MHz channel 0
> BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> Signed-off-by: YouMin Chen <cym@rock-chips.com>

Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>

Thanks,
  - Kever
> ---
>   .../include/asm/arch-rockchip/sdram_common.h  |  7 ++++
>   drivers/ram/rockchip/sdram_debug.c            | 40 +++++++++++++++++++
>   2 files changed, 47 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
> index 171b233f95..cfbb511843 100644
> --- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
> +++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
> @@ -97,8 +97,15 @@ int dram_init(void);
>   inline void sdram_print_dram_type(unsigned char dramtype)
>   {
>   }
> +
> +inline void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
> +				 struct sdram_base_params *base)
> +{
> +}
>   #else
>   void sdram_print_dram_type(unsigned char dramtype);
> +void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
> +			  struct sdram_base_params *base);
>   #endif /* CONFIG_RAM_ROCKCHIP_DEBUG */
>   
>   #endif
> diff --git a/drivers/ram/rockchip/sdram_debug.c b/drivers/ram/rockchip/sdram_debug.c
> index c13e140fa5..69a6f94a73 100644
> --- a/drivers/ram/rockchip/sdram_debug.c
> +++ b/drivers/ram/rockchip/sdram_debug.c
> @@ -32,3 +32,43 @@ void sdram_print_dram_type(unsigned char dramtype)
>   		break;
>   	}
>   }
> +
> +void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
> +			  struct sdram_base_params *base)
> +{
> +	u32 bg;
> +
> +	bg = (cap_info->dbw == 0) ? 2 : 1;
> +
> +	sdram_print_dram_type(base->dramtype);
> +
> +	printascii(", ");
> +	printdec(base->ddr_freq);
> +	printascii("MHz\n");
> +
> +	printascii("BW=");
> +	printdec(8 << cap_info->bw);
> +
> +	printascii(" Col=");
> +	printdec(cap_info->col);
> +
> +	printascii(" Bk=");
> +	printdec(0x1 << cap_info->bk);
> +	if (base->dramtype == DDR4) {
> +		printascii(" BG=");
> +		printdec(1 << bg);
> +	}
> +
> +	printascii(" CS0 Row=");
> +	printdec(cap_info->cs0_row);
> +	if (cap_info->rank > 1) {
> +		printascii(" CS1 Row=");
> +		printdec(cap_info->cs1_row);
> +	}
> +
> +	printascii(" CS=");
> +	printdec(cap_info->rank);
> +
> +	printascii(" Die BW=");
> +	printdec(8 << cap_info->dbw);
> +}

Patch
diff mbox series 

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 171b233f95..cfbb511843 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -97,8 +97,15 @@  int dram_init(void);
 inline void sdram_print_dram_type(unsigned char dramtype)
 {
 }
+
+inline void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
+				 struct sdram_base_params *base)
+{
+}
 #else
 void sdram_print_dram_type(unsigned char dramtype);
+void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
+			  struct sdram_base_params *base);
 #endif /* CONFIG_RAM_ROCKCHIP_DEBUG */
 
 #endif
diff --git a/drivers/ram/rockchip/sdram_debug.c b/drivers/ram/rockchip/sdram_debug.c
index c13e140fa5..69a6f94a73 100644
--- a/drivers/ram/rockchip/sdram_debug.c
+++ b/drivers/ram/rockchip/sdram_debug.c
@@ -32,3 +32,43 @@  void sdram_print_dram_type(unsigned char dramtype)
 		break;
 	}
 }
+
+void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
+			  struct sdram_base_params *base)
+{
+	u32 bg;
+
+	bg = (cap_info->dbw == 0) ? 2 : 1;
+
+	sdram_print_dram_type(base->dramtype);
+
+	printascii(", ");
+	printdec(base->ddr_freq);
+	printascii("MHz\n");
+
+	printascii("BW=");
+	printdec(8 << cap_info->bw);
+
+	printascii(" Col=");
+	printdec(cap_info->col);
+
+	printascii(" Bk=");
+	printdec(0x1 << cap_info->bk);
+	if (base->dramtype == DDR4) {
+		printascii(" BG=");
+		printdec(1 << bg);
+	}
+
+	printascii(" CS0 Row=");
+	printdec(cap_info->cs0_row);
+	if (cap_info->rank > 1) {
+		printascii(" CS1 Row=");
+		printdec(cap_info->cs1_row);
+	}
+
+	printascii(" CS=");
+	printdec(cap_info->rank);
+
+	printascii(" Die BW=");
+	printdec(8 << cap_info->dbw);
+}