Message ID | 20190716115745.12585-9-jagan@amarulasolutions.com |
---|---|
State | New |
Headers | show |
Series |
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Related | show |
On 2019/7/16 下午7:56, Jagan Teki wrote: > Add simplified and meaningful macro for dbw. > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com> Thanks, - Kever > --- > arch/arm/include/asm/arch-rockchip/sdram_common.h | 1 + > drivers/ram/rockchip/sdram_rk3399.c | 3 +-- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h > index 71062e3e71..338f4043e1 100644 > --- a/arch/arm/include/asm/arch-rockchip/sdram_common.h > +++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h > @@ -96,6 +96,7 @@ struct sdram_base_params { > #define SYS_REG_BW_MASK 3 > #define SYS_REG_DBW_SHIFT(ch) ((ch) * 16) > #define SYS_REG_DBW_MASK 3 > +#define SYS_REG_ENC_DBW(n, ch) ((2 >> (n)) << SYS_REG_DBW_SHIFT(ch)) > > /* Get sdram size decode from reg */ > size_t rockchip_sdram_size(phys_addr_t reg); > diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c > index b93a6c6c44..b994134fdb 100644 > --- a/drivers/ram/rockchip/sdram_rk3399.c > +++ b/drivers/ram/rockchip/sdram_rk3399.c > @@ -1100,8 +1100,7 @@ static void dram_all_config(struct dram_info *dram, > SYS_REG_CS1_ROW_SHIFT(channel); > sys_reg |= (2 >> info->cap_info.bw) << > SYS_REG_BW_SHIFT(channel); > - sys_reg |= (2 >> info->cap_info.dbw) << > - SYS_REG_DBW_SHIFT(channel); > + sys_reg |= SYS_REG_ENC_DBW(info->cap_info.dbw, channel); > > ddr_msch_regs = dram->chan[channel].msch; > noc_timing = ¶ms->ch[channel].noc_timings;
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h index 71062e3e71..338f4043e1 100644 --- a/arch/arm/include/asm/arch-rockchip/sdram_common.h +++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h @@ -96,6 +96,7 @@ struct sdram_base_params { #define SYS_REG_BW_MASK 3 #define SYS_REG_DBW_SHIFT(ch) ((ch) * 16) #define SYS_REG_DBW_MASK 3 +#define SYS_REG_ENC_DBW(n, ch) ((2 >> (n)) << SYS_REG_DBW_SHIFT(ch)) /* Get sdram size decode from reg */ size_t rockchip_sdram_size(phys_addr_t reg); diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index b93a6c6c44..b994134fdb 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -1100,8 +1100,7 @@ static void dram_all_config(struct dram_info *dram, SYS_REG_CS1_ROW_SHIFT(channel); sys_reg |= (2 >> info->cap_info.bw) << SYS_REG_BW_SHIFT(channel); - sys_reg |= (2 >> info->cap_info.dbw) << - SYS_REG_DBW_SHIFT(channel); + sys_reg |= SYS_REG_ENC_DBW(info->cap_info.dbw, channel); ddr_msch_regs = dram->chan[channel].msch; noc_timing = ¶ms->ch[channel].noc_timings;