[v3,09/57] ram: rk3399: Add cs0_rw macro
diff mbox series

Message ID 20190716115745.12585-10-jagan@amarulasolutions.com
State New
Headers show
Series
  • ram: rk3399: Add LPDDR4 support
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Commit Message

Jagan Teki July 16, 2019, 11:56 a.m. UTC 
Add simplified and meaningful macro for cs0_rw.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
---
 arch/arm/include/asm/arch-rockchip/sdram_common.h | 2 ++
 drivers/ram/rockchip/sdram_rk3399.c               | 3 +--
 2 files changed, 3 insertions(+), 2 deletions(-)

Comments

Kever Yang July 16, 2019, 1 p.m. UTC | #1 
On 2019/7/16 下午7:56, Jagan Teki wrote:
> Add simplified and meaningful macro for cs0_rw.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> Signed-off-by: YouMin Chen <cym@rock-chips.com>

Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>

Thanks,
  - Kever
> ---
>   arch/arm/include/asm/arch-rockchip/sdram_common.h | 2 ++
>   drivers/ram/rockchip/sdram_rk3399.c               | 3 +--
>   2 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
> index 338f4043e1..ad9726a57c 100644
> --- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
> +++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
> @@ -90,6 +90,8 @@ struct sdram_base_params {
>   					SYS_REG_BK_SHIFT(ch))
>   #define SYS_REG_CS0_ROW_SHIFT(ch)	(6 + (ch) * 16)
>   #define SYS_REG_CS0_ROW_MASK		3
> +#define SYS_REG_ENC_CS0_ROW(n, ch)	(((n) - 13) << \
> +					SYS_REG_CS0_ROW_SHIFT(ch))
>   #define SYS_REG_CS1_ROW_SHIFT(ch)	(4 + (ch) * 16)
>   #define SYS_REG_CS1_ROW_MASK		3
>   #define SYS_REG_BW_SHIFT(ch)		(2 + (ch) * 16)
> diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
> index b994134fdb..43cf597828 100644
> --- a/drivers/ram/rockchip/sdram_rk3399.c
> +++ b/drivers/ram/rockchip/sdram_rk3399.c
> @@ -1094,8 +1094,7 @@ static void dram_all_config(struct dram_info *dram,
>   		sys_reg |= SYS_REG_ENC_RANK(info->cap_info.rank, channel);
>   		sys_reg |= SYS_REG_ENC_COL(info->cap_info.col, channel);
>   		sys_reg |= SYS_REG_ENC_BK(info->cap_info.bk, channel);
> -		sys_reg |= (info->cap_info.cs0_row - 13) <<
> -			    SYS_REG_CS0_ROW_SHIFT(channel);
> +		sys_reg |= SYS_REG_ENC_CS0_ROW(info->cap_info.cs0_row, channel);
>   		sys_reg |= (info->cap_info.cs1_row - 13) <<
>   			    SYS_REG_CS1_ROW_SHIFT(channel);
>   		sys_reg |= (2 >> info->cap_info.bw) <<

Patch
diff mbox series 

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 338f4043e1..ad9726a57c 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -90,6 +90,8 @@  struct sdram_base_params {
 					SYS_REG_BK_SHIFT(ch))
 #define SYS_REG_CS0_ROW_SHIFT(ch)	(6 + (ch) * 16)
 #define SYS_REG_CS0_ROW_MASK		3
+#define SYS_REG_ENC_CS0_ROW(n, ch)	(((n) - 13) << \
+					SYS_REG_CS0_ROW_SHIFT(ch))
 #define SYS_REG_CS1_ROW_SHIFT(ch)	(4 + (ch) * 16)
 #define SYS_REG_CS1_ROW_MASK		3
 #define SYS_REG_BW_SHIFT(ch)		(2 + (ch) * 16)
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index b994134fdb..43cf597828 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -1094,8 +1094,7 @@  static void dram_all_config(struct dram_info *dram,
 		sys_reg |= SYS_REG_ENC_RANK(info->cap_info.rank, channel);
 		sys_reg |= SYS_REG_ENC_COL(info->cap_info.col, channel);
 		sys_reg |= SYS_REG_ENC_BK(info->cap_info.bk, channel);
-		sys_reg |= (info->cap_info.cs0_row - 13) <<
-			    SYS_REG_CS0_ROW_SHIFT(channel);
+		sys_reg |= SYS_REG_ENC_CS0_ROW(info->cap_info.cs0_row, channel);
 		sys_reg |= (info->cap_info.cs1_row - 13) <<
 			    SYS_REG_CS1_ROW_SHIFT(channel);
 		sys_reg |= (2 >> info->cap_info.bw) <<