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[209.85.220.65]) by mx.google.com with SMTPS id j5sor72491540pjf.7.2019.07.29.00.47.30 for (Google Transport Security); Mon, 29 Jul 2019 00:47:30 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90a:b883:: with SMTP id o3mr109551398pjr.50.1564386450038; Mon, 29 Jul 2019 00:47:30 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.47.26 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:47:29 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 02/15] rockchip: Add cpu-info Date: Mon, 29 Jul 2019 13:16:58 +0530 Message-Id: <20190729074711.16988-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=HkHPufJY; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add cpu information for rockchip soc. This would help to print the SoC family number, with associated temparature, clock and reason for reset etc. Signed-off-by: Jagan Teki --- arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/cpu-info.c | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 arch/arm/mach-rockchip/cpu-info.c diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index a12b8d4434..655b3e3e1a 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -25,6 +25,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # we can have the preprocessor correctly recognise both 0x0 and 0 # meaning "turn it off". obj-y += boot_mode.o +obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c new file mode 100644 index 0000000000..088fc806a6 --- /dev/null +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * (C) Copyright 2019 Amarula Solutions. + * Author: Jagan Teki + */ + +#include + +int print_cpuinfo(void) +{ + puts("SoC: Rockchip "); + + /* TODO print operating temparature and clock */ +# ifdef CONFIG_ROCKCHIP_RK3288 + puts("RK3288\n"); +# elif CONFIG_ROCKCHIP_RK3399 + puts("RK3399\n"); +# else +# warning Please update cpu.c with correct CPU information + puts("Family\n"); +# endif + + return 0; +}