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[209.85.220.65]) by mx.google.com with SMTPS id i26sor20518895pfq.67.2019.10.22.10.55.47 for (Google Transport Security); Tue, 22 Oct 2019 10:55:47 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a62:1709:: with SMTP id 9mr3855741pfx.83.1571766947215; Tue, 22 Oct 2019 10:55:47 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.31]) by smtp.gmail.com with ESMTPSA id b3sm20454775pfd.125.2019.10.22.10.55.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Oct 2019 10:55:46 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Levin Du , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , Marek Vasut Subject: [PATCH 8/9] rockchip: Setup dwc3_device (for non-dm gadgets) Date: Tue, 22 Oct 2019 23:24:57 +0530 Message-Id: <20191022175458.22604-9-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20191022175458.22604-1-jagan@amarulasolutions.com> References: <20191022175458.22604-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=pJSGeqOh; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Setup dwc3_device structure for non-dm gadgets, which is used in rk3399 platforms. dwc3_device would have basic regbase, dr_mode, high speed and 16-bit UTMI+ etc. Cc: Marek Vasut Signed-off-by: Jagan Teki --- arch/arm/mach-rockchip/board.c | 32 ++++++++++++++++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index 8ca3463731..1468f1da80 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -49,8 +49,10 @@ void enable_caches(void) } #endif -#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) +#if defined(CONFIG_USB_GADGET) #include + +#if defined(CONFIG_USB_GADGET_DWC2_OTG) #include static struct dwc2_plat_otg_data otg_data = { @@ -91,7 +93,33 @@ int board_usb_cleanup(int index, enum usb_init_type init) { return 0; } -#endif +#endif /* CONFIG_USB_GADGET_DWC2_OTG */ + +#if defined(CONFIG_USB_DWC3) && !defined(CONFIG_DM_USB_GADGET) +#include + +static struct dwc3_device dwc3_device_data = { + .maximum_speed = USB_SPEED_HIGH, + .base = 0xfe800000, + .dr_mode = USB_DR_MODE_PERIPHERAL, + .index = 0, + .dis_u2_susphy_quirk = 1, + .hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW, +}; + +int usb_gadget_handle_interrupts(void) +{ + dwc3_uboot_handle_interrupt(0); + return 0; +} + +int board_usb_init(int index, enum usb_init_type init) +{ + return dwc3_uboot_init(&dwc3_device_data); +} +#endif /* CONFIG_USB_DWC3 */ + +#endif /* CONFIG_USB_GADGET */ #if CONFIG_IS_ENABLED(FASTBOOT) int fastboot_set_reboot_flag(void)