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[209.85.220.65]) by mx.google.com with SMTPS id g8sor3068540pfk.3.2019.10.25.10.57.07 for (Google Transport Security); Fri, 25 Oct 2019 10:57:07 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a62:58c2:: with SMTP id m185mr6044311pfb.10.1572026227045; Fri, 25 Oct 2019 10:57:07 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.31]) by smtp.gmail.com with ESMTPSA id n15sm2926580pfq.146.2019.10.25.10.57.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 10:57:06 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , Chen-Yu Tsai , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland Cc: michael@amarulasolutions.com, Icenowy Zheng , linux-sunxi , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v11 4/7] =?utf-8?q?drm/sun4i=3A_dsi=3A_Handle_bus_clock_ex?= =?utf-8?q?plicitly=C2=A0?= Date: Fri, 25 Oct 2019 23:26:22 +0530 Message-Id: <20191025175625.8011-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20191025175625.8011-1-jagan@amarulasolutions.com> References: <20191025175625.8011-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=i3MIHeuY; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Usage of clocks are varies between different Allwinner DSI controllers. Clocking in A33 would need bus and mod clocks where as A64 would need only bus clock. To support this kind of clocking structure variants in the same dsi driver, explicit handling of common clock would require since the A64 doesn't need to mention the clock-names explicitly in dts since it support only one bus clock. Also pass clk_id NULL instead "bus" to regmap clock init function since the single clock variants no need to mention clock-names explicitly. Signed-off-by: Jagan Teki --- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c index 8c4c541224dd..eacdfcff64ad 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c @@ -1109,7 +1109,7 @@ static int sun6i_dsi_probe(struct platform_device *pdev) return PTR_ERR(dsi->regulator); } - dsi->regs = devm_regmap_init_mmio_clk(dev, "bus", base, + dsi->regs = devm_regmap_init_mmio_clk(dev, NULL, base, &sun6i_dsi_regmap_config); if (IS_ERR(dsi->regs)) { dev_err(dev, "Couldn't create the DSI encoder regmap\n"); @@ -1122,6 +1122,12 @@ static int sun6i_dsi_probe(struct platform_device *pdev) return PTR_ERR(dsi->reset); } + dsi->bus_clk = devm_clk_get(dev, NULL); + if (IS_ERR(dsi->bus_clk)) { + dev_err(dev, "Couldn't get the DSI bus clock\n"); + return PTR_ERR(dsi->bus_clk); + } + if (dsi->variant->has_mod_clk) { dsi->mod_clk = devm_clk_get(dev, "mod"); if (IS_ERR(dsi->mod_clk)) { @@ -1196,6 +1202,7 @@ static int __maybe_unused sun6i_dsi_runtime_resume(struct device *dev) } reset_control_deassert(dsi->reset); + clk_prepare_enable(dsi->bus_clk); if (dsi->variant->has_mod_clk) clk_prepare_enable(dsi->mod_clk); @@ -1227,6 +1234,7 @@ static int __maybe_unused sun6i_dsi_runtime_suspend(struct device *dev) if (dsi->variant->has_mod_clk) clk_disable_unprepare(dsi->mod_clk); + clk_disable_unprepare(dsi->bus_clk); reset_control_assert(dsi->reset); regulator_disable(dsi->regulator);