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[209.85.220.65]) by mx.google.com with SMTPS id a30sor2817837pgb.48.2019.10.25.10.57.20 for (Google Transport Security); Fri, 25 Oct 2019 10:57:20 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:5949:: with SMTP id j9mr5883267pgm.371.1572026240010; Fri, 25 Oct 2019 10:57:20 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.31]) by smtp.gmail.com with ESMTPSA id n15sm2926580pfq.146.2019.10.25.10.57.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 10:57:19 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , Chen-Yu Tsai , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland Cc: michael@amarulasolutions.com, Icenowy Zheng , linux-sunxi , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v11 6/7] arm64: dts: allwinner: a64: Add MIPI DSI pipeline Date: Fri, 25 Oct 2019 23:26:24 +0530 Message-Id: <20191025175625.8011-7-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20191025175625.8011-1-jagan@amarulasolutions.com> References: <20191025175625.8011-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=SkOqSdCS; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add MIPI DSI pipeline for Allwinner A64. - dsi node, with A64 compatible since it doesn't support DSI_SCLK gating unlike A33 - dphy node, with A64 compatible with A33 fallback since DPHY on A64 and A33 is similar - finally, attach the dsi_in to tcon0 for complete MIPI DSI Signed-off-by: Jagan Teki Tested-by: Merlijn Wajer --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 69128a6dfc46..a52dfa98ac5e 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -382,6 +382,12 @@ #address-cells = <1>; #size-cells = <0>; reg = <1>; + + tcon0_out_dsi: endpoint@1 { + reg = <1>; + remote-endpoint = <&dsi_in_tcon0>; + allwinner,tcon-channel = <1>; + }; }; }; }; @@ -1003,6 +1009,37 @@ status = "disabled"; }; + dsi: dsi@1ca0000 { + compatible = "allwinner,sun50i-a64-mipi-dsi"; + reg = <0x01ca0000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_MIPI_DSI>; + resets = <&ccu RST_BUS_MIPI_DSI>; + phys = <&dphy>; + phy-names = "dphy"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + + port { + dsi_in_tcon0: endpoint { + remote-endpoint = <&tcon0_out_dsi>; + }; + }; + }; + + dphy: d-phy@1ca1000 { + compatible = "allwinner,sun50i-a64-mipi-dphy", + "allwinner,sun6i-a31-mipi-dphy"; + reg = <0x01ca1000 0x1000>; + clocks = <&ccu CLK_BUS_MIPI_DSI>, + <&ccu CLK_DSI_DPHY>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_MIPI_DSI>; + status = "disabled"; + #phy-cells = <0>; + }; + hdmi: hdmi@1ee0000 { compatible = "allwinner,sun50i-a64-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi";