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[209.85.220.65]) by mx.google.com with SMTPS id d24sor25036795pls.45.2019.12.31.05.06.02 for (Google Transport Security); Tue, 31 Dec 2019 05:06:02 -0800 (PST) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:902:b104:: with SMTP id q4mr64632455plr.132.1577797562596; Tue, 31 Dec 2019 05:06:02 -0800 (PST) Received: from localhost.localdomain ([49.206.202.115]) by smtp.gmail.com with ESMTPSA id i3sm55204089pfg.94.2019.12.31.05.05.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 Dec 2019 05:06:02 -0800 (PST) From: Jagan Teki To: Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Rob Herring Cc: David Airlie , Daniel Vetter , Mark Rutland , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi , linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v3 4/9] drm/sun4i: tcon_top: Use clock name index macros Date: Tue, 31 Dec 2019 18:35:23 +0530 Message-Id: <20191231130528.20669-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20191231130528.20669-1-jagan@amarulasolutions.com> References: <20191231130528.20669-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=UH2yrbjY; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , TCON TOP mux blocks in R40 are registering clock using tcon top clock index numbers. Right now the code is using, real numbers start with 0, but we have proper macros that defined these name index numbers. Use the existing macros, instead of real numbers for more code readability. Signed-off-by: Jagan Teki --- Changes for v3: - none drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c index 75d8e60c149d..e0b3c5330b9a 100644 --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c @@ -194,19 +194,22 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, clk_data->hws[CLK_TCON_TOP_TV0] = sun8i_tcon_top_register_gate(dev, "tcon-tv0", regs, &tcon_top->reg_lock, - TCON_TOP_TCON_TV0_GATE, 0); + TCON_TOP_TCON_TV0_GATE, + CLK_TCON_TOP_TV0); if (quirks->has_tcon_tv1) clk_data->hws[CLK_TCON_TOP_TV1] = sun8i_tcon_top_register_gate(dev, "tcon-tv1", regs, &tcon_top->reg_lock, - TCON_TOP_TCON_TV1_GATE, 1); + TCON_TOP_TCON_TV1_GATE, + CLK_TCON_TOP_TV1); if (quirks->has_dsi) clk_data->hws[CLK_TCON_TOP_DSI] = sun8i_tcon_top_register_gate(dev, "dsi", regs, &tcon_top->reg_lock, - TCON_TOP_TCON_DSI_GATE, 2); + TCON_TOP_TCON_DSI_GATE, + CLK_TCON_TOP_DSI); for (i = 0; i < CLK_NUM; i++) if (IS_ERR(clk_data->hws[i])) {