[v2,2/2] arm64: dts: allwinner: a64-oceanic-5205-5inmfd: Enable GT911 CTP
Commit Message
Goodix GT911 CTP is bound with Oceanic 5205 5inMFD board.
The CTP connected to board with,
- SDA, SCK from i2c0
- GPIO-LD0 as AVDD28 supply
- PH4 gpio as interrupt pin
- PH11 gpio as reset pin
- X axis is inverted
- Y axis is inverted
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v2:
- drop i2c1, bias-pull-up
.../sun50i-a64-oceanic-5205-5inmfd.dts | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
Comments
On Thu, Apr 18, 2019 at 02:05:43PM +0530, Jagan Teki wrote:
> Goodix GT911 CTP is bound with Oceanic 5205 5inMFD board.
>
> The CTP connected to board with,
> - SDA, SCK from i2c0
> - GPIO-LD0 as AVDD28 supply
> - PH4 gpio as interrupt pin
> - PH11 gpio as reset pin
> - X axis is inverted
> - Y axis is inverted
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> Changes for v2:
> - drop i2c1, bias-pull-up
>
> .../sun50i-a64-oceanic-5205-5inmfd.dts | 25 +++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts
> index 6a2154525d1e..02c1a04cc7eb 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts
> @@ -37,6 +37,24 @@
> status = "okay";
> };
>
> +&i2c0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c0_pins>;
The comments on PATCH 1 apply here as well.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
@@ -37,6 +37,24 @@
status = "okay";
};
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+
+ touchscreen@5d {
+ compatible = "goodix,gt911";
+ reg = <0x5d>;
+ AVDD28-supply = <®_ldo_io0>; /* VDD_CTP: GPIO0-LDO */
+ interrupt-parent = <&pio>;
+ interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>;
+ irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */
+ reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* CTP-RST: PH11 */
+ touchscreen-inverted-x;
+ touchscreen-inverted-y;
+ };
+};
+
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -52,6 +70,13 @@
regulator-name = "vcc-phy";
};
+®_ldo_io0 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vdd-ctp";
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;