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[79.14.29.58]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4ab69b54742sm188053075e9.15.2026.10.30.10.06.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Oct 2026 10:06:21 -0700 (PDT) From: Dario Binacchi To: u-boot@lists.denx.de Cc: linux-amarula@amarulasolutions.com, michael@amarulasolutions.com, Dario Binacchi , Fabio Estevam , Ilias Apalodimas , Joe Hershberger , "NXP i.MX U-Boot Team" , Stefano Babic , Tom Rini , u-boot@lists.u-boot-project.org Subject: [PATCH] net: dwc_eth_qos: Support external RMII reference clock on i.MX8M Plus Date: Fri, 30 Oct 2026 18:06:11 +0100 Message-ID: <20261030170618.2820085-1-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=aa7ypYmh; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=neutral header.i=@amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , In RMII mode the IOMUXC GPR[1] setup always selects the internally generated reference clock, ignoring the snps,rmii_refclk_ext property. On boards where the 50 MHz clock comes from an external source, the PHY auto-negotiation times out: Waiting for PHY auto negotiation to complete...... TIMEOUT ! phy_startup() failed: -110 Set ENET_QOS_CLK_TX_CLK_SEL only if snps,rmii_refclk_ext is missing, as Linux does. Signed-off-by: Dario Binacchi --- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) --- base-commit: 3973f3c4d24df75ca90d7c0a9f03e5e5c9b48f32 branch: imx8mp-eqos-rmii-refclk-ext diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index b7b3702041ee..065a946f2855 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -852,9 +853,11 @@ static int imx8mp_eqos_interface_init(struct udevice *dev, break; case PHY_INTERFACE_MODE_RMII: setbits_le32(&gpr->gpr[1], - IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_TX_CLK_SEL | IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_GEN_EN | IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_RMII); + if (!dev_read_bool(dev, "snps,rmii_refclk_ext")) + setbits_le32(&gpr->gpr[1], + IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_TX_CLK_SEL); break; case PHY_INTERFACE_MODE_RGMII: case PHY_INTERFACE_MODE_RGMII_ID: