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[209.85.220.65]) by mx.google.com with SMTPS id h63sor74340754pjb.6.2019.07.29.00.47.26 for (Google Transport Security); Mon, 29 Jul 2019 00:47:26 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90a:a404:: with SMTP id y4mr114436155pjp.58.1564386445900; Mon, 29 Jul 2019 00:47:25 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.47.22 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:47:25 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 01/15] arm: rockchip: Add common cru.h Date: Mon, 29 Jul 2019 13:16:57 +0530 Message-Id: <20190729074711.16988-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Cf3TC4YQ; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Few of the rockchip family SoC atleast rk3288, rk3399 are sharing some cru register bits so adding common code between these SoC families would require to include both cru include files that indeed resulting function declarations error. So, create a common cru include as cru.h then include the arch cru include file and move the common cru register bit definitions into it. Signed-off-by: Jagan Teki --- arch/arm/include/asm/arch-rockchip/cru.h | 16 ++++++++++++++++ arch/arm/mach-rockchip/rk3288-board.c | 2 +- arch/arm/mach-rockchip/rk3288/clk_rk3288.c | 2 +- arch/arm/mach-rockchip/rk3399-board-spl.c | 2 +- arch/arm/mach-rockchip/rk3399/clk_rk3399.c | 2 +- drivers/clk/rockchip/clk_rk3288.c | 2 +- drivers/clk/rockchip/clk_rk3399.c | 2 +- drivers/ram/rockchip/sdram_rk3288.c | 2 +- drivers/ram/rockchip/sdram_rk3399.c | 2 +- drivers/video/rockchip/rk3288_mipi.c | 2 +- drivers/video/rockchip/rk3399_mipi.c | 2 +- drivers/video/rockchip/rk_mipi.c | 2 +- 12 files changed, 27 insertions(+), 11 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/cru.h diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h new file mode 100644 index 0000000000..3b1a3bae71 --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/cru.h @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * (C) Copyright 2019 Amarula Solutions. + * Author: Jagan Teki + */ + +#ifndef _ROCKCHIP_CLOCK_H +#define _ROCKCHIP_CLOCK_H + +#if defined(CONFIG_ROCKCHIP_RK3288) +# include +#elif defined(CONFIG_ROCKCHIP_RK3399) +# include +#endif + +#endif /* _ROCKCHIP_CLOCK_H */ diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index a250d50387..d3ec141fea 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c index e64ee86f08..1730f12443 100644 --- a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include int rockchip_get_clk(struct udevice **devp) { diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 7154d8e5d0..5642c7f523 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c index f0411c0a21..a80a46f1db 100644 --- a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include static int rockchip_get_cruclk(struct udevice **devp) { diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 375d7f8acb..b05becd3d0 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index d9950c159b..37a82788c6 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c index 6bb025a851..48b479d82b 100644 --- a/drivers/ram/rockchip/sdram_rk3288.c +++ b/drivers/ram/rockchip/sdram_rk3288.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 81fc71c051..0801faf7a1 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/video/rockchip/rk3288_mipi.c b/drivers/video/rockchip/rk3288_mipi.c index 7c4a4cc53b..65891ce45c 100644 --- a/drivers/video/rockchip/rk3288_mipi.c +++ b/drivers/video/rockchip/rk3288_mipi.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/video/rockchip/rk3399_mipi.c b/drivers/video/rockchip/rk3399_mipi.c index a93b73400b..a5b7ba69a8 100644 --- a/drivers/video/rockchip/rk3399_mipi.c +++ b/drivers/video/rockchip/rk3399_mipi.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/video/rockchip/rk_mipi.c b/drivers/video/rockchip/rk_mipi.c index bcd039b7bc..f9280e8607 100644 --- a/drivers/video/rockchip/rk_mipi.c +++ b/drivers/video/rockchip/rk_mipi.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include From patchwork Mon Jul 29 07:46:58 2019 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id j5sor72491540pjf.7.2019.07.29.00.47.30 for (Google Transport Security); Mon, 29 Jul 2019 00:47:30 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90a:b883:: with SMTP id o3mr109551398pjr.50.1564386450038; Mon, 29 Jul 2019 00:47:30 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.47.26 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:47:29 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 02/15] rockchip: Add cpu-info Date: Mon, 29 Jul 2019 13:16:58 +0530 Message-Id: <20190729074711.16988-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=HkHPufJY; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add cpu information for rockchip soc. This would help to print the SoC family number, with associated temparature, clock and reason for reset etc. Signed-off-by: Jagan Teki --- arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/cpu-info.c | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 arch/arm/mach-rockchip/cpu-info.c diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index a12b8d4434..655b3e3e1a 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -25,6 +25,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # we can have the preprocessor correctly recognise both 0x0 and 0 # meaning "turn it off". obj-y += boot_mode.o +obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c new file mode 100644 index 0000000000..088fc806a6 --- /dev/null +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * (C) Copyright 2019 Amarula Solutions. + * Author: Jagan Teki + */ + +#include + +int print_cpuinfo(void) +{ + puts("SoC: Rockchip "); + + /* TODO print operating temparature and clock */ +# ifdef CONFIG_ROCKCHIP_RK3288 + puts("RK3288\n"); +# elif CONFIG_ROCKCHIP_RK3399 + puts("RK3399\n"); +# else +# warning Please update cpu.c with correct CPU information + puts("Family\n"); +# endif + + return 0; +} From patchwork Mon Jul 29 07:46:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 812 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pl1-f200.google.com (mail-pl1-f200.google.com [209.85.214.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 9B2AF3F0E1 for ; Mon, 29 Jul 2019 09:47:35 +0200 (CEST) Received: by mail-pl1-f200.google.com with SMTP id 65sf32634366plf.16 for ; Mon, 29 Jul 2019 00:47:35 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1564386454; cv=pass; d=google.com; s=arc-20160816; b=Ky/5sKnJJQ68ET9O8bRt5gOV8HAmOePXYBdfdgSbmkyCvQbWI57TX+L+RUbRx2F1W4 BP8upZ36z7xZNS8A6ANtYNvnmBw1kniUXF9+z9J0PzEDKCznlyLkbZ1i/IRM1I2gseOG I0rIUQi1xyRxlFft8Jh9Fs3B1fdmPJ6tsUQgCHq4e+XWQZ37D2RVFE2kiq0nEeLq62xS A/M8sA2Cd6zodESxc7ca3FG3PaM9w4icPpXPte4M2PEH2PPLYl+4YADrztabm9+mfkWX mYZbrBN6Ac5R52KaoFUMshzZkVq5CT1i/xwmrL1wbeX/Ee7tIRt0OJzeJ8t771RjhU/X fADA== ARC-Message-Signature: i=2; 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[209.85.220.65]) by mx.google.com with SMTPS id f89sor73067892plb.5.2019.07.29.00.47.34 for (Google Transport Security); Mon, 29 Jul 2019 00:47:34 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:902:110b:: with SMTP id d11mr113400546pla.213.1564386453901; Mon, 29 Jul 2019 00:47:33 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.47.30 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:47:33 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , Wadim Egorov Subject: [PATCH 03/15] rockchip: rk3288: Print reset reason Date: Mon, 29 Jul 2019 13:16:59 +0530 Message-Id: <20190729074711.16988-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=kJJcD646; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Print the reason for reset instead of storing it into env variable in rk3288. This would help to find the reset reason directly on U-Boot proper logs. Cc: Wadim Egorov Signed-off-by: Jagan Teki --- arch/arm/mach-rockchip/rk3288-board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index d3ec141fea..613264d7ee 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -72,7 +72,7 @@ static void rk3288_detect_reset_reason(void) reason = "unknown reset"; } - env_set("reset_reason", reason); + printf("Reset cause: %s\n", reason); /* * Clear cru_glb_rst_st, so we can determine the last reset cause From patchwork Mon Jul 29 07:47:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 813 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id BFAEF3F0E1 for ; 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[209.85.220.65]) by mx.google.com with SMTPS id r11sor72630460pjb.8.2019.07.29.00.47.38 for (Google Transport Security); Mon, 29 Jul 2019 00:47:38 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90b:f0f:: with SMTP id br15mr112231709pjb.101.1564386458628; Mon, 29 Jul 2019 00:47:38 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.47.35 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:47:38 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , Wadim Egorov Subject: [PATCH 04/15] rockchip: Add common reset reason Date: Mon, 29 Jul 2019 13:17:00 +0530 Message-Id: <20190729074711.16988-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="afvLBT/W"; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Right now the reset reason supported by rk3288 and which is printing on board late function. Support the same reset reason for rk3399 as well, since it is sharing same cru register mark the code into common area. Printing reset reason below SoC information would really help instead of printing in board late call, so support this as part of cpu_info. Cc: Wadim Egorov Signed-off-by: Jagan Teki --- arch/arm/include/asm/arch-rockchip/cru.h | 12 ++++++ .../include/asm/arch-rockchip/cru_rk3288.h | 14 +------ arch/arm/mach-rockchip/cpu-info.c | 41 +++++++++++++++++++ arch/arm/mach-rockchip/rk3288-board.c | 39 ------------------ 4 files changed, 54 insertions(+), 52 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h index 3b1a3bae71..b54e21d6f1 100644 --- a/arch/arm/include/asm/arch-rockchip/cru.h +++ b/arch/arm/include/asm/arch-rockchip/cru.h @@ -13,4 +13,16 @@ # include #endif +/* CRU_GLB_RST_ST */ +enum { + GLB_POR_RST, + FST_GLB_RST_ST = BIT(0), + SND_GLB_RST_ST = BIT(1), + FST_GLB_TSADC_RST_ST = BIT(2), + SND_GLB_TSADC_RST_ST = BIT(3), + FST_GLB_WDT_RST_ST = BIT(4), + SND_GLB_WDT_RST_ST = BIT(5), + GLB_RST_ST_MASK = GENMASK(5, 0), +}; + #endif /* _ROCKCHIP_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h index e891f20b37..7acb1c7208 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h @@ -51,7 +51,7 @@ struct rk3288_cru { u32 cru_glb_cnt_th; u32 cru_glb_rst_con; u32 reserved3; - u32 cru_glb_rst_st; + u32 glb_rst_st; u32 reserved4; u32 cru_sdmmc_con[2]; u32 cru_sdio0_con[2]; @@ -227,16 +227,4 @@ enum { CLKF_MASK = 0x1fff << CLKF_SHIFT, }; -/* CRU_GLB_RST_ST */ -enum { - GLB_POR_RST, - FST_GLB_RST_ST = BIT(0), - SND_GLB_RST_ST = BIT(1), - FST_GLB_TSADC_RST_ST = BIT(2), - SND_GLB_TSADC_RST_ST = BIT(3), - FST_GLB_WDT_RST_ST = BIT(4), - SND_GLB_WDT_RST_ST = BIT(5), - GLB_RST_ST_MASK = GENMASK(5, 0), -}; - #endif diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c index 088fc806a6..8e56999b05 100644 --- a/arch/arm/mach-rockchip/cpu-info.c +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -5,6 +5,38 @@ */ #include +#include +#include +#include +#include +#include + +static char *rockchip_reset_reason(unsigned int glb_rst_st) +{ + char *reason; + + switch (glb_rst_st) { + case GLB_POR_RST: + reason = "POR"; + break; + case FST_GLB_RST_ST: + case SND_GLB_RST_ST: + reason = "RST"; + break; + case FST_GLB_TSADC_RST_ST: + case SND_GLB_TSADC_RST_ST: + reason = "THERMAL"; + break; + case FST_GLB_WDT_RST_ST: + case SND_GLB_WDT_RST_ST: + reason = "WDOG"; + break; + default: + reason = "unknown reset"; + } + + return reason; +} int print_cpuinfo(void) { @@ -13,12 +45,21 @@ int print_cpuinfo(void) /* TODO print operating temparature and clock */ # ifdef CONFIG_ROCKCHIP_RK3288 puts("RK3288\n"); + struct rk3288_cru *cru = rockchip_get_cru(); # elif CONFIG_ROCKCHIP_RK3399 puts("RK3399\n"); + struct rk3399_cru *cru = rockchip_get_cru(); # else # warning Please update cpu.c with correct CPU information puts("Family\n"); # endif + if (IS_ERR(cru)) + return -EINVAL; + + printf("Reset cause: %s\n", rockchip_reset_reason(cru->glb_rst_st)); + + rk_clrreg(&cru->glb_rst_st, GLB_RST_ST_MASK); + return 0; } diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index 613264d7ee..3e5cd9bad9 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include @@ -44,48 +43,10 @@ int rk3288_qos_init(void) return 0; } -static void rk3288_detect_reset_reason(void) -{ - struct rk3288_cru *cru = rockchip_get_cru(); - const char *reason; - - if (IS_ERR(cru)) - return; - - switch (cru->cru_glb_rst_st) { - case GLB_POR_RST: - reason = "POR"; - break; - case FST_GLB_RST_ST: - case SND_GLB_RST_ST: - reason = "RST"; - break; - case FST_GLB_TSADC_RST_ST: - case SND_GLB_TSADC_RST_ST: - reason = "THERMAL"; - break; - case FST_GLB_WDT_RST_ST: - case SND_GLB_WDT_RST_ST: - reason = "WDOG"; - break; - default: - reason = "unknown reset"; - } - - printf("Reset cause: %s\n", reason); - - /* - * Clear cru_glb_rst_st, so we can determine the last reset cause - * for following resets. - */ - rk_clrreg(&cru->cru_glb_rst_st, GLB_RST_ST_MASK); -} - int board_late_init(void) { setup_boot_mode(); rk3288_qos_init(); - rk3288_detect_reset_reason(); return rk_board_late_init(); } From patchwork Mon Jul 29 07:47:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 814 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pl1-f200.google.com (mail-pl1-f200.google.com [209.85.214.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 1DEBA3F0E1 for ; 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[209.85.220.65]) by mx.google.com with SMTPS id l13sor38666860pgq.30.2019.07.29.00.47.42 for (Google Transport Security); Mon, 29 Jul 2019 00:47:42 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:4a51:: with SMTP id j17mr102712841pgl.284.1564386461978; Mon, 29 Jul 2019 00:47:41 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.47.38 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:47:41 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 05/15] rockchip: rk3288/rk3399: Enable DISPLAY_CPUINFO Date: Mon, 29 Jul 2019 13:17:01 +0530 Message-Id: <20190729074711.16988-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=dRi43XsU; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , RK3288 and Rk3399 are now support cpu-info, so enable them by default. Signed-off-by: Jagan Teki --- configs/evb-rk3288_defconfig | 1 - configs/evb-rk3399_defconfig | 1 - configs/fennec-rk3288_defconfig | 1 - configs/ficus-rk3399_defconfig | 1 - configs/firefly-rk3288_defconfig | 1 - configs/firefly-rk3399_defconfig | 1 - configs/miqi-rk3288_defconfig | 1 - configs/nanopc-t4-rk3399_defconfig | 1 - configs/nanopi-m4-rk3399_defconfig | 1 - configs/nanopi-neo4-rk3399_defconfig | 1 - configs/orangepi-rk3399_defconfig | 1 - configs/phycore-rk3288_defconfig | 1 - configs/popmetal-rk3288_defconfig | 1 - configs/puma-rk3399_defconfig | 1 - configs/rock-pi-4-rk3399_defconfig | 1 - configs/rock960-rk3399_defconfig | 1 - configs/rockpro64-rk3399_defconfig | 1 - configs/tinker-rk3288_defconfig | 1 - configs/vyasa-rk3288_defconfig | 1 - 19 files changed, 19 deletions(-) diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index a6df143276..28b3e392ec 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -11,7 +11,6 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-evb-rk808.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0 CONFIG_CMD_GPIO=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 764d32f259..3c48053480 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig index 16d8fb155c..21ff5a0efc 100644 --- a/configs/fennec-rk3288_defconfig +++ b/configs/fennec-rk3288_defconfig @@ -13,7 +13,6 @@ CONFIG_DEBUG_UART=y CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_DEFAULT_FDT_FILE="rk3288-fennec.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_SPL_STACK_R=y diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index d1425dc3d0..a146b0ced0 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -8,7 +8,6 @@ CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff8c2000 CONFIG_SPL_STACK_R=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 8abe8a648a..081744dc39 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -12,7 +12,6 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_SPL_STACK_R=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 9f05f33ddd..71f8e56669 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index c9a35115fb..42f27b0ba8 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -12,7 +12,6 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_SPL_STACK_R=y diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index bca4f08966..2d437f4d86 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index dd2065df5f..18cc9a4482 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig index 46039d1d07..037f3f7c5a 100644 --- a/configs/nanopi-neo4-rk3399_defconfig +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig index 16a0a17c74..f3e8b6686c 100644 --- a/configs/orangepi-rk3399_defconfig +++ b/configs/orangepi-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index dfddc4af5e..7766aa6d65 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -13,7 +13,6 @@ CONFIG_DEBUG_UART=y CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_DEFAULT_FDT_FILE="rk3288-phycore-rdk.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_SPL_STACK_R=y diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 4c9a7f0824..97e814d1e3 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -13,7 +13,6 @@ CONFIG_DEBUG_UART=y CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_DEFAULT_FDT_FILE="rk3288-popmetal.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_SPL_STACK_R=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 37f845cfb1..0e1ed3ec18 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -15,7 +15,6 @@ CONFIG_DEBUG_UART=y CONFIG_SPL_FIT_GENERATOR="board/theobroma-systems/puma_rk3399/fit_spl_atf.sh" CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb" CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff8c2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index 14ae39a561..c4c05d0d62 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index ed11fef7c2..8890b547ba 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff8c2000 CONFIG_SPL_STACK_R=y diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 72bfff289b..32d8415b23 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index b234539a53..06527c4933 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -12,7 +12,6 @@ CONFIG_DEBUG_UART=y CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0 CONFIG_CMD_GPIO=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index eaea625007..29482a299e 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -12,7 +12,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_SPL_STACK_R=y From patchwork Mon Jul 29 07:47:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit 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[209.85.220.65]) by mx.google.com with SMTPS id q31sor33761199pgb.5.2019.07.29.00.47.46 for (Google Transport Security); Mon, 29 Jul 2019 00:47:46 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a65:6547:: with SMTP id a7mr81906381pgw.65.1564386465884; Mon, 29 Jul 2019 00:47:45 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.47.42 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:47:45 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , Chin Liang See , Andy Shevchenko Subject: [PATCH 06/15] wdt: designware: Simplify is_enabled function Date: Mon, 29 Jul 2019 13:17:02 +0530 Message-Id: <20190729074711.16988-7-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=fMgIoiW3; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Right now the designware is_enabled function is using numeric number to check whether watchdog is enabled or not, so use register macro and check the same. Cc: Chin Liang See Cc: Andy Shevchenko Signed-off-by: Jagan Teki --- drivers/watchdog/designware_wdt.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c index c668567c66..bd858f0608 100644 --- a/drivers/watchdog/designware_wdt.c +++ b/drivers/watchdog/designware_wdt.c @@ -45,9 +45,7 @@ static void designware_wdt_enable(void) static unsigned int designware_wdt_is_enabled(void) { - unsigned long val; - val = readl((CONFIG_DW_WDT_BASE + DW_WDT_CR)); - return val & 0x1; + return readl(CONFIG_DW_WDT_BASE + DW_WDT_CR) & DW_WDT_CR_RMOD_OFFSET; } #if defined(CONFIG_HW_WATCHDOG) From patchwork Mon Jul 29 07:47:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 816 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f198.google.com (mail-pf1-f198.google.com [209.85.210.198]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 92E893F0E1 for ; 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[209.85.220.65]) by mx.google.com with SMTPS id a68sor81213955pje.1.2019.07.29.00.47.50 for (Google Transport Security); Mon, 29 Jul 2019 00:47:50 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90b:8cd:: with SMTP id ds13mr105023725pjb.141.1564386470284; Mon, 29 Jul 2019 00:47:50 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.47.46 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:47:49 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , Chin Liang See , Andy Shevchenko Subject: [PATCH 07/15] wdt: designware: Simplify enable function Date: Mon, 29 Jul 2019 13:17:03 +0530 Message-Id: <20190729074711.16988-8-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Zw8yjHY7; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Simplify dw watchdog enable function by using proper macro and drop unwanted macros. Cc: Chin Liang See Cc: Andy Shevchenko Signed-off-by: Jagan Teki --- drivers/watchdog/designware_wdt.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c index bd858f0608..2979fda44e 100644 --- a/drivers/watchdog/designware_wdt.c +++ b/drivers/watchdog/designware_wdt.c @@ -14,7 +14,6 @@ #define DW_WDT_CR_EN_OFFSET 0x00 #define DW_WDT_CR_RMOD_OFFSET 0x01 -#define DW_WDT_CR_RMOD_VAL 0x00 #define DW_WDT_CRR_RESTART_VAL 0x76 /* @@ -38,9 +37,11 @@ static int designware_wdt_settimeout(unsigned int timeout) static void designware_wdt_enable(void) { - writel(((DW_WDT_CR_RMOD_VAL << DW_WDT_CR_RMOD_OFFSET) | - (0x1 << DW_WDT_CR_EN_OFFSET)), - (CONFIG_DW_WDT_BASE + DW_WDT_CR)); + u32 val = readl(CONFIG_DW_WDT_BASE + DW_WDT_CR); + + /* Enable watchdog */ + val |= DW_WDT_CR_RMOD_OFFSET; + writel(val, CONFIG_DW_WDT_BASE + DW_WDT_CR); } static unsigned int designware_wdt_is_enabled(void) From patchwork Mon Jul 29 07:47:04 2019 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id s14sor74140318pjb.11.2019.07.29.00.47.55 for (Google Transport Security); Mon, 29 Jul 2019 00:47:55 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90a:b908:: with SMTP id p8mr23018965pjr.94.1564386474934; Mon, 29 Jul 2019 00:47:54 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.47.50 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:47:54 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , Chin Liang See , Andy Shevchenko Subject: [PATCH 08/15] wdt: dw: Add driver-model support Date: Mon, 29 Jul 2019 13:17:04 +0530 Message-Id: <20190729074711.16988-9-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=UPGJPNGs; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add driver-model code for designware watchdog. Cc: Chin Liang See Cc: Andy Shevchenko Signed-off-by: Jagan Teki --- drivers/watchdog/designware_wdt.c | 114 +++++++++++++++++++++++++++++- 1 file changed, 113 insertions(+), 1 deletion(-) diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c index 2979fda44e..4efbb25f86 100644 --- a/drivers/watchdog/designware_wdt.c +++ b/drivers/watchdog/designware_wdt.c @@ -4,7 +4,6 @@ */ #include -#include #include #include @@ -16,6 +15,117 @@ #define DW_WDT_CR_RMOD_OFFSET 0x01 #define DW_WDT_CRR_RESTART_VAL 0x76 +#ifdef CONFIG_WDT + +#include +#include +#include + +struct dw_wdt { + void __iomem *regs; + unsigned long clk_rate; +}; + +static inline int dw_wdt_is_enabled(struct dw_wdt *dw) +{ + return readl(dw->regs + DW_WDT_CR) & DW_WDT_CR_RMOD_OFFSET; +} + +/* + * Set the watchdog time interval. + * Counter is 32 bit. + */ +static int dw_wdt_set_timeout(struct dw_wdt *dw, unsigned int timeout) +{ + signed int i; + + /* calculate the timeout range value */ + i = (log_2_n_round_up(timeout * dw->clk_rate)) - 16; + if (i > 15) + i = 15; + if (i < 0) + i = 0; + + writel((i | (i << 4)), dw->regs + DW_WDT_TORR); + + return 0; +} + +static void dw_wdt_enable(struct dw_wdt *dw) +{ + u32 val = readl(dw->regs + DW_WDT_CR); + + /* Enable watchdog */ + val |= DW_WDT_CR_RMOD_OFFSET; + writel(val, dw->regs + DW_WDT_CR); +} + +static int dw_wdt_reset(struct udevice *dev) +{ + struct dw_wdt *dw = dev_get_priv(dev); + + if (dw_wdt_is_enabled(dw)) + writel(DW_WDT_CRR_RESTART_VAL, dw->regs + DW_WDT_CRR); + else + dw_wdt_enable(dw); + + return 0; +} + +static int dw_wdt_start(struct udevice *dev, u64 timeout, ulong flags) +{ + struct dw_wdt *dw = dev_get_priv(dev); + + dw_wdt_set_timeout(dw, timeout); + dw_wdt_enable(dw); + + return 0; +} + +static int dw_wdt_probe(struct udevice *dev) +{ + struct dw_wdt *dw = dev_get_priv(dev); + struct clk clk; + int ret; + + dw->regs = dev_remap_addr(dev); + if (!dw->regs) + return -EINVAL; + + ret = clk_get_by_index(dev, 0, &clk); + if (!ret) + dw->clk_rate = clk_get_rate(&clk); + else + return -EINVAL; + + dw_wdt_reset(dev); + + return 0; +} + +static const struct wdt_ops dw_wdt_ops = { + .reset = dw_wdt_reset, + .start = dw_wdt_start, +}; + +static const struct udevice_id dw_wdt_ids[] = { + { .compatible = "snps,dw-wdt" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(dw_wdt) = { + .name = "dw_wdt", + .id = UCLASS_WDT, + .of_match = dw_wdt_ids, + .ops = &dw_wdt_ops, + .priv_auto_alloc_size = sizeof(struct dw_wdt), + .probe = dw_wdt_probe, +}; + +#else + +#include + /* * Set the watchdog time interval. * Counter is 32 bit. @@ -70,3 +180,5 @@ void hw_watchdog_init(void) hw_watchdog_reset(); } #endif + +#endif /* CONFIG_WDT */ From patchwork Mon Jul 29 07:47:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 818 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pg1-f198.google.com (mail-pg1-f198.google.com [209.85.215.198]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id E65303F0E1 for ; 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[209.85.220.65]) by mx.google.com with SMTPS id b84sor42116549pfb.57.2019.07.29.00.47.59 for (Google Transport Security); Mon, 29 Jul 2019 00:47:59 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:aa7:8acb:: with SMTP id b11mr33967451pfd.109.1564386478973; Mon, 29 Jul 2019 00:47:58 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.47.55 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:47:58 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , Dinh Nguyen , Chin-Liang See Subject: [PATCH 09/15] wdt: dw: Rename to dw_wdt.c Date: Mon, 29 Jul 2019 13:17:05 +0530 Message-Id: <20190729074711.16988-10-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=MBdweSrM; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , - use dw instead of designware for driver file since Linux following the same. - add CONFIG macro start with CONFIG_WDT since the driver mode wdt drivers follow this. Cc: Dinh Nguyen Cc: Chin-Liang See Signed-off-by: Jagan Teki --- common/board_f.c | 2 +- drivers/watchdog/Makefile | 2 +- drivers/watchdog/{designware_wdt.c => dw_wdt.c} | 0 include/configs/socfpga_common.h | 2 +- include/configs/socfpga_stratix10_socdk.h | 2 +- scripts/config_whitelist.txt | 2 +- 6 files changed, 5 insertions(+), 5 deletions(-) rename drivers/watchdog/{designware_wdt.c => dw_wdt.c} (100%) diff --git a/common/board_f.c b/common/board_f.c index 4760d728f3..79efef0792 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -95,7 +95,7 @@ static int init_func_watchdog_init(void) # if defined(CONFIG_HW_WATCHDOG) && \ (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ defined(CONFIG_SH) || \ - defined(CONFIG_DESIGNWARE_WATCHDOG) || \ + defined(CONFIG_WDT_DW) || \ defined(CONFIG_IMX_WATCHDOG)) hw_watchdog_init(); puts(" Watchdog enabled\n"); diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 68c989aa0b..a14fdabf8d 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -13,7 +13,6 @@ endif obj-$(CONFIG_S5P) += s5p_wdt.o obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o -obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o obj-$(CONFIG_WDT) += wdt-uclass.o obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o @@ -23,6 +22,7 @@ obj-$(CONFIG_WDT_BCM6345) += bcm6345_wdt.o obj-$(CONFIG_BCM2835_WDT) += bcm2835_wdt.o obj-$(CONFIG_WDT_ORION) += orion_wdt.o obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o +obj-$(CONFIG_WDT_DW) += dw_wdt.o obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o obj-$(CONFIG_WDT_MTK) += mtk_wdt.o diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/dw_wdt.c similarity index 100% rename from drivers/watchdog/designware_wdt.c rename to drivers/watchdog/dw_wdt.c diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index d1034ac280..65f02eca2e 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -105,7 +105,7 @@ * L4 Watchdog */ #ifdef CONFIG_HW_WATCHDOG -#define CONFIG_DESIGNWARE_WATCHDOG +#define CONFIG_WDT_DW #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #define CONFIG_DW_WDT_CLOCK_KHZ 25000 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 30000 diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h index 8d2971c6e2..3582aec822 100644 --- a/include/configs/socfpga_stratix10_socdk.h +++ b/include/configs/socfpga_stratix10_socdk.h @@ -161,7 +161,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); */ #ifdef CONFIG_SPL_BUILD #define CONFIG_HW_WATCHDOG -#define CONFIG_DESIGNWARE_WATCHDOG +#define CONFIG_WDT_DW #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #ifndef __ASSEMBLY__ unsigned int cm_get_l4_sys_free_clk_hz(void); diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index e616f7229b..f2453728c6 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -323,7 +323,7 @@ CONFIG_DEFAULT_IMMR CONFIG_DEF_HWCONFIG CONFIG_DELAY_ENVIRONMENT CONFIG_DESIGNWARE_ETH -CONFIG_DESIGNWARE_WATCHDOG +CONFIG_WDT_DW CONFIG_DEVELOP CONFIG_DEVICE_TREE_LIST CONFIG_DFU_ALT From patchwork Mon Jul 29 07:47:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 819 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pg1-f198.google.com (mail-pg1-f198.google.com [209.85.215.198]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 938EB3F0E1 for ; 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[209.85.220.65]) by mx.google.com with SMTPS id h71sor38598164pge.80.2019.07.29.00.48.03 for (Google Transport Security); Mon, 29 Jul 2019 00:48:03 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:544d:: with SMTP id e13mr13856042pgm.143.1564386482744; Mon, 29 Jul 2019 00:48:02 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.47.59 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:48:02 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 10/15] rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for watchdog Date: Mon, 29 Jul 2019 13:17:06 +0530 Message-Id: <20190729074711.16988-11-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=K4BETp5c; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add u-boot,dm-pre-reloc property for watchdog in rk3399-u-boot.dtsi so-that SPL can access watchdog. Signed-off-by: Jagan Teki --- arch/arm/dts/rk3399-u-boot.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index 2738a3889e..54286b585b 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -3,6 +3,12 @@ * Copyright (C) 2019 Jagan Teki */ +/ { + watchdog@ff848000 { + u-boot,dm-pre-reloc; + }; +}; + &pmu { u-boot,dm-pre-reloc; }; From patchwork Mon Jul 29 07:47:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 820 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 221853F0E1 for ; Mon, 29 Jul 2019 09:48:08 +0200 (CEST) Received: by mail-pf1-f200.google.com with SMTP id 6sf37968139pfz.10 for ; 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[209.85.220.65]) by mx.google.com with SMTPS id o70sor72564848pje.2.2019.07.29.00.48.06 for (Google Transport Security); Mon, 29 Jul 2019 00:48:06 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90a:ac14:: with SMTP id o20mr112030960pjq.114.1564386486303; Mon, 29 Jul 2019 00:48:06 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.48.03 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:48:05 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 11/15] wdt: Kconfig: Add WDT_DW entry Date: Mon, 29 Jul 2019 13:17:07 +0530 Message-Id: <20190729074711.16988-12-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=hNnQNwS+; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add Kconfig entry for CONFIG_WDT_DW, and it indeed depends on DM WDT. So, it can be avialable on particular board defconfig only if they switch to use DW driver model code. Signed-off-by: Jagan Teki --- drivers/watchdog/Kconfig | 9 +++++++++ scripts/config_whitelist.txt | 1 - 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index ee0ddffe73..0b64298016 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -100,6 +100,15 @@ config WDT_CDNS Select this to enable Cadence watchdog timer, which can be found on some Xilinx Microzed Platform. +config WDT_DW + bool "Synopsys DesignWare watchdog" + depends on WDT + default y if ROCKCHIP_RK3399 + imply WATCHDOG + help + Say Y here if to include support for the Synopsys DesignWare + watchdog timer found in many chips. + config WDT_MPC8xx bool "MPC8xx watchdog timer support" depends on WDT && MPC8xx diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index f2453728c6..47e42e680a 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -323,7 +323,6 @@ CONFIG_DEFAULT_IMMR CONFIG_DEF_HWCONFIG CONFIG_DELAY_ENVIRONMENT CONFIG_DESIGNWARE_ETH -CONFIG_WDT_DW CONFIG_DEVELOP CONFIG_DEVICE_TREE_LIST CONFIG_DFU_ALT From patchwork Mon Jul 29 07:47:08 2019 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id m10sor72173097pje.25.2019.07.29.00.48.10 for (Google Transport Security); Mon, 29 Jul 2019 00:48:10 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90a:b903:: with SMTP id p3mr108891521pjr.79.1564386490275; Mon, 29 Jul 2019 00:48:10 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.48.06 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:48:09 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 12/15] include: rk3399: Disable watchdog in TPL Date: Mon, 29 Jul 2019 13:17:08 +0530 Message-Id: <20190729074711.16988-13-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=JES5mUdc; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Disable watchdog for TPL, since there is no support it. Signed-off-by: Jagan Teki --- include/configs/rk3399_common.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 8df0180284..67b48e03ba 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -46,6 +46,11 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf8000000 +#ifdef CONFIG_TPL_BUILD +# undef CONFIG_WDT +# undef CONFIG_WATCHDOG +#endif + #ifndef CONFIG_SPL_BUILD #define ENV_MEM_LAYOUT_SETTINGS \ From patchwork Mon Jul 29 07:47:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 822 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pg1-f198.google.com (mail-pg1-f198.google.com [209.85.215.198]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 948AD3F0E1 for ; Mon, 29 Jul 2019 09:48:15 +0200 (CEST) Received: by mail-pg1-f198.google.com with SMTP id u1sf37705739pgr.13 for ; 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Signed-off-by: Jagan Teki --- configs/rockpro64-rk3399_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 32d8415b23..f604ccc1ec 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -55,3 +55,5 @@ CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USE_TINY_PRINTF=y CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y +CONFIG_WDT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y From patchwork Mon Jul 29 07:47:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 823 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pl1-f200.google.com (mail-pl1-f200.google.com [209.85.214.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 714AA3F0E1 for ; Mon, 29 Jul 2019 09:48:19 +0200 (CEST) Received: by mail-pl1-f200.google.com with SMTP id r7sf32659258plo.6 for ; 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[209.85.220.65]) by mx.google.com with SMTPS id q8sor32574344pgn.1.2019.07.29.00.48.17 for (Google Transport Security); Mon, 29 Jul 2019 00:48:17 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a65:5a44:: with SMTP id z4mr103285588pgs.41.1564386497542; Mon, 29 Jul 2019 00:48:17 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.48.14 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:48:17 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 14/15] rockchip: rk3399: Add bootcount support Date: Mon, 29 Jul 2019 13:17:10 +0530 Message-Id: <20190729074711.16988-15-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=c7WwARmC; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add bootcount support for Rockchip rk3399. The bootcount value is preserved in PMU_SYS_REG0 register, this would help to support redundent boot. Once the redundant boot triggers, the altboot command will look for extlinux-rollback.conf on particular bootable partition which supposed to be a recovery partition where redundant boot required. Signed-off-by: Jagan Teki --- arch/arm/mach-rockchip/Kconfig | 2 ++ arch/arm/mach-rockchip/rk3399/Kconfig | 10 ++++++++++ include/configs/rk3399_common.h | 5 ++++- 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 17f31e89f3..dd5055ed69 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -184,6 +184,8 @@ config ROCKCHIP_RK3399 imply TPL_CLK imply TPL_TINY_MEMSET imply TPL_ROCKCHIP_COMMON_BOARD + imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT + imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT help The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 and quad-core Cortex-A53. diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index 6660d05349..68ac913bcb 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -91,6 +91,16 @@ config TPL_STACK config TPL_TEXT_BASE default 0xff8c2000 +if BOOTCOUNT_LIMIT + +config BOOTCOUNT_BOOTLIMIT + default 3 + +config SYS_BOOTCOUNT_ADDR + default 0xff3100f0 # PMU_SYS_REG0 + +endif # BOOTCOUNT_LIMIT + source "board/rockchip/evb_rk3399/Kconfig" source "board/theobroma-systems/puma_rk3399/Kconfig" source "board/vamrs/rock960_rk3399/Kconfig" diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 67b48e03ba..ace82928d1 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -70,7 +70,10 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \ ROCKCHIP_DEVICE_SETTINGS \ - BOOTENV + BOOTENV \ + "altbootcmd=" \ + "setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \ + "run distro_bootcmd\0" #endif From patchwork Mon Jul 29 07:47:11 2019 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id j1sor38820586pgp.68.2019.07.29.00.48.21 for (Google Transport Security); Mon, 29 Jul 2019 00:48:21 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:e54:: with SMTP id 20mr100694932pgo.244.1564386501085; Mon, 29 Jul 2019 00:48:21 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.41]) by smtp.gmail.com with ESMTPSA id h14sm75723348pfq.22.2019.07.29.00.48.17 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 29 Jul 2019 00:48:20 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: Akash Gajjar , u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [DO NOT MERGE] [PATCH 15/15] rk3399: rockpro64: Enable bootcount Date: Mon, 29 Jul 2019 13:17:11 +0530 Message-Id: <20190729074711.16988-16-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com> References: <20190729074711.16988-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=GhGoqUkt; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Enable bootcount support for Rockpro64 boards, this would help to use it for redundent boot. Signed-off-by: Jagan Teki --- configs/rockpro64-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index f604ccc1ec..3f1cf21ca0 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -57,3 +57,4 @@ CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y CONFIG_WDT=y CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_BOOTCOUNT_LIMIT=y