From patchwork Thu Sep 19 05:28:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 843 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id D707D3F08B for ; Thu, 19 Sep 2019 07:28:48 +0200 (CEST) Received: by mail-pf1-f200.google.com with SMTP id m25sf1445241pfa.23 for ; Wed, 18 Sep 2019 22:28:48 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1568870927; cv=pass; d=google.com; s=arc-20160816; b=vWyCGGU7ASuXBYlmcHvZnonu7l52lwksLJ31eg8CVgvwJAggSe6hENPvQ045EmlmUz tDRZZGUFnN3QhKVSYyr7c6rDXjZi/upaYhFsuLWot8qgIFjzjhMVwWWE9dAyUD9s7IWg 3r+zBzsWsfaZ/Uo3MTtVFdAPxIayyci+N/9B832JGdkhFojqlpV2uEw757U+//hNXw/I HoamiKfWYUM5RS0mRZyqdU8JWibSpiES6AMbegFMvwofS6SeqNAdJVVWa2UxpXVodhos mbrH9U1PitLXxUjTVPdzOdh7Eshg0DLQ9VCe9FLPsjPAzdx6udlVbC8pL5++SQ/VaKoI tLpw== ARC-Message-Signature: i=2; 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[209.85.220.65]) by mx.google.com with SMTPS id w18sor6739119pge.65.2019.09.18.22.28.47 for (Google Transport Security); Wed, 18 Sep 2019 22:28:47 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:5fcf:: with SMTP id t198mr7340060pgb.270.1568870926501; Wed, 18 Sep 2019 22:28:46 -0700 (PDT) Received: from localhost.localdomain ([49.206.200.127]) by smtp.gmail.com with ESMTPSA id z20sm5051930pjn.12.2019.09.18.22.28.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Sep 2019 22:28:46 -0700 (PDT) From: Jagan Teki To: Heiko Stuebner , Levin Du , Akash Gajjar , Rob Herring , Mark Rutland Cc: Da Xue , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 1/6] arm64: dts: rockchip: Fix rk3399-roc-pc pwm2 pin Date: Thu, 19 Sep 2019 10:58:17 +0530 Message-Id: <20190919052822.10403-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190919052822.10403-1-jagan@amarulasolutions.com> References: <20190919052822.10403-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=CVrhIqzE; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , ROC-PC is not able to boot linux console if PWM2_d is unattached to any pinctrl logic. To be precise the linux boot hang with last logs as, ... ..... [ 0.003367] Console: colour dummy device 80x25 [ 0.003788] printk: console [tty0] enabled [ 0.004178] printk: bootconsole [uart8250] disabled In ROC-PC the PWM2_d pin is connected to LOG_DVS_PWM of VDD_LOG. So, for normal working operations this needs to active and pull-down. This patch fix, by attaching pinctrl active and pull-down the pwm2. Signed-off-by: Jagan Teki --- arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts index 19f7732d728c..c53f3d571620 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts @@ -548,6 +548,8 @@ }; &pwm2 { + pinctrl-names = "active"; + pinctrl-0 = <&pwm2_pin_pull_down>; status = "okay"; }; From patchwork Thu Sep 19 05:28:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 844 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pg1-f197.google.com (mail-pg1-f197.google.com [209.85.215.197]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 57DE83F08B for ; Thu, 19 Sep 2019 07:28:53 +0200 (CEST) Received: by mail-pg1-f197.google.com with SMTP id m17sf1487116pgh.21 for ; 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[209.85.220.65]) by mx.google.com with SMTPS id w8sor6785289pgr.42.2019.09.18.22.28.51 for (Google Transport Security); Wed, 18 Sep 2019 22:28:51 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:3c08:: with SMTP id j8mr7251129pga.72.1568870931289; Wed, 18 Sep 2019 22:28:51 -0700 (PDT) Received: from localhost.localdomain ([49.206.200.127]) by smtp.gmail.com with ESMTPSA id z20sm5051930pjn.12.2019.09.18.22.28.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Sep 2019 22:28:50 -0700 (PDT) From: Jagan Teki To: Heiko Stuebner , Levin Du , Akash Gajjar , Rob Herring , Mark Rutland Cc: Da Xue , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 2/6] dt-bindings: arm: rockchip: Use libretech for roc-pc binding Date: Thu, 19 Sep 2019 10:58:18 +0530 Message-Id: <20190919052822.10403-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190919052822.10403-1-jagan@amarulasolutions.com> References: <20190919052822.10403-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=gQ8TI7kz; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Though the ROC-PC is manufactured by firefly, it is co-designed by libretch like other Libretech computer boards from allwinner, amlogic does. So, it is always meaningful to keep maintain those vendors who are part of design participation so-that the linux mainline code will expose outside world who are the makers of such hardware prototypes. So, update the dt-bindings of ROC-PC with libretch notation like other libretech computer boards does. Signed-off-by: Jagan Teki --- Documentation/devicetree/bindings/arm/rockchip.yaml | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 110fcca1a94e..bb65a10e85ce 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -87,11 +87,6 @@ properties: - const: firefly,roc-rk3328-cc - const: rockchip,rk3328 - - description: Firefly ROC-RK3399-PC - items: - - const: firefly,roc-rk3399-pc - - const: rockchip,rk3399 - - description: FriendlyElec NanoPi4 series boards items: - enum: @@ -364,6 +359,12 @@ properties: - const: leez,p710 - const: rockchip,rk3399 + - description: Libre Computer Board ROC-RK3399-PC + items: + - const: libretech,roc-rk3399-pc + - const: firefly,roc-rk3399-pc + - const: rockchip,rk3399 + - description: Mecer Xtreme Mini S6 items: - const: mecer,xms6 From patchwork Thu Sep 19 05:28:19 2019 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id s4sor9992698plr.35.2019.09.18.22.28.56 for (Google Transport Security); Wed, 18 Sep 2019 22:28:56 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:902:9896:: with SMTP id s22mr7836198plp.207.1568870935949; Wed, 18 Sep 2019 22:28:55 -0700 (PDT) Received: from localhost.localdomain ([49.206.200.127]) by smtp.gmail.com with ESMTPSA id z20sm5051930pjn.12.2019.09.18.22.28.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Sep 2019 22:28:55 -0700 (PDT) From: Jagan Teki To: Heiko Stuebner , Levin Du , Akash Gajjar , Rob Herring , Mark Rutland Cc: Da Xue , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 3/6] arm64: dts: rockchip: Use libretech model, compatible for ROC-PC Date: Thu, 19 Sep 2019 10:58:19 +0530 Message-Id: <20190919052822.10403-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190919052822.10403-1-jagan@amarulasolutions.com> References: <20190919052822.10403-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=RRpsPIui; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Though the ROC-PC is manufactured by firefly, it is co-designed by libretch like other Libretech computer boards from allwinner, amlogic does. So, it is always meaningful to keep maintain those vendors who are part of design participation so-that the linux mainline code will expose outside world who are the makers of such hardware prototypes. So, - append the compatible to "libretech,roc-rk3399-pc" and - update the model to "Libre Computer Board ROC-RK3399-PC" like other libretech computer boards does. Signed-off-by: Jagan Teki --- arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts index c53f3d571620..e09bcbdd92f5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts @@ -9,8 +9,8 @@ #include "rk3399-opp.dtsi" / { - model = "Firefly ROC-RK3399-PC Board"; - compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399"; + model = "Libre Computer Board ROC-RK3399-PC"; + compatible = "libretech,roc-rk3399-pc", "firefly,roc-rk3399-pc", "rockchip,rk3399"; chosen { stdout-path = "serial2:1500000n8"; From patchwork Thu Sep 19 05:28:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 846 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 9AEB73F08B for ; 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[209.85.220.65]) by mx.google.com with SMTPS id d18sor6874092pgp.48.2019.09.18.22.29.00 for (Google Transport Security); Wed, 18 Sep 2019 22:29:00 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:1c22:: with SMTP id c34mr7195695pgc.435.1568870940513; Wed, 18 Sep 2019 22:29:00 -0700 (PDT) Received: from localhost.localdomain ([49.206.200.127]) by smtp.gmail.com with ESMTPSA id z20sm5051930pjn.12.2019.09.18.22.28.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Sep 2019 22:29:00 -0700 (PDT) From: Jagan Teki To: Heiko Stuebner , Levin Du , Akash Gajjar , Rob Herring , Mark Rutland Cc: Da Xue , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 4/6] arm64: dts: rockchip: Rename roc-pc with libretech notation Date: Thu, 19 Sep 2019 10:58:20 +0530 Message-Id: <20190919052822.10403-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190919052822.10403-1-jagan@amarulasolutions.com> References: <20190919052822.10403-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=ma2szWh3; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Though the ROC-PC is manufactured by firefly, it is co-designed by libretch like other Libretech computer boards from allwinner, amlogic does. So, it is always meaningful to keep maintain those vendors who are part of design participation so-that the linux mainline code will expose outside world who are the makers of such hardware prototypes. So, rename the existing rk3399-roc-pc.dts with libretch notation, rk3399-libretech-roc-rk3399-pc.dts Signed-off-by: Jagan Teki --- arch/arm64/boot/dts/rockchip/Makefile | 2 +- .../{rk3399-roc-pc.dts => rk3399-libretech-roc-rk3399-pc.dts} | 0 2 files changed, 1 insertion(+), 1 deletion(-) rename arch/arm64/boot/dts/rockchip/{rk3399-roc-pc.dts => rk3399-libretech-roc-rk3399-pc.dts} (100%) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 1f18a9392d15..73c10ddb4300 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -21,12 +21,12 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-captain.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-v.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-leez-p710.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-libretech-roc-rk3399-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb -dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts similarity index 100% rename from arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts rename to arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts From patchwork Thu Sep 19 05:28:21 2019 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id h30sor8338722pfk.43.2019.09.18.22.29.05 for (Google Transport Security); Wed, 18 Sep 2019 22:29:05 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a62:fb06:: with SMTP id x6mr724333pfm.186.1568870945159; Wed, 18 Sep 2019 22:29:05 -0700 (PDT) Received: from localhost.localdomain ([49.206.200.127]) by smtp.gmail.com with ESMTPSA id z20sm5051930pjn.12.2019.09.18.22.29.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Sep 2019 22:29:04 -0700 (PDT) From: Jagan Teki To: Heiko Stuebner , Levin Du , Akash Gajjar , Rob Herring , Mark Rutland Cc: Da Xue , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 5/6] arm64: dts: rockchip: Rename vcc12v_sys into dc_12v for roc-rk3399-pc Date: Thu, 19 Sep 2019 10:58:21 +0530 Message-Id: <20190919052822.10403-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190919052822.10403-1-jagan@amarulasolutions.com> References: <20190919052822.10403-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Y7HZPUIU; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , It is always better practice to follow regulator naming conventions as per the schematics for future references. This would indeed helpful to review and check the naming convention directly on schematics, both for the code reviewers and the developers. So, rename vcc12v_sys into dc_12v as per rk3399 power tree as per roc-rk3399-pc schematics. Signed-off-by: Jagan Teki --- .../boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts b/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts index e09bcbdd92f5..51242ea5447d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts @@ -57,9 +57,9 @@ * should be placed inside mp8859, but not until mp8859 has * its own dt-binding. */ - vcc12v_sys: mp8859-dcdc1 { + dc_12v: mp8859-dcdc1 { compatible = "regulator-fixed"; - regulator-name = "vcc12v_sys"; + regulator-name = "dc_12v"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <12000000>; @@ -85,7 +85,7 @@ regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - vin-supply = <&vcc12v_sys>; + vin-supply = <&dc_12v>; }; /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ @@ -118,7 +118,7 @@ regulator-boot-on; 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[209.85.220.65]) by mx.google.com with SMTPS id f7sor6759575pgc.20.2019.09.18.22.29.09 for (Google Transport Security); Wed, 18 Sep 2019 22:29:09 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a65:4782:: with SMTP id e2mr6861393pgs.402.1568870949591; Wed, 18 Sep 2019 22:29:09 -0700 (PDT) Received: from localhost.localdomain ([49.206.200.127]) by smtp.gmail.com with ESMTPSA id z20sm5051930pjn.12.2019.09.18.22.29.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Sep 2019 22:29:09 -0700 (PDT) From: Jagan Teki To: Heiko Stuebner , Levin Du , Akash Gajjar , Rob Herring , Mark Rutland Cc: Da Xue , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 6/6] arm64: dts: rockchip: Fix roc-rk3399-pc regulator input rails Date: Thu, 19 Sep 2019 10:58:22 +0530 Message-Id: <20190919052822.10403-7-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190919052822.10403-1-jagan@amarulasolutions.com> References: <20190919052822.10403-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=fd6AiriF; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Few, know rk808 pmic regulators VCC[1-4], VCC[6-7], VCC[9-11], VDD_LOG, VDD_GPU, VDD_CPU_B, VCC3V3_SYS are inputting with vcc_sys which is 5V power rail from dc_12v. So, replace the vin-supply of above mentioned regulators with vcc_sys as per the PMIC-RK808-D page of roc-rk3399-pc schematics. Signed-off-by: Jagan Teki --- .../rk3399-libretech-roc-rk3399-pc.dts | 26 +++++++++---------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts b/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts index 51242ea5447d..1eddb2e00809 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts @@ -85,7 +85,7 @@ regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; + vin-supply = <&vcc_sys>; }; /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ @@ -129,7 +129,7 @@ regulator-boot-on; regulator-min-microvolt = <800000>; regulator-max-microvolt = <1400000>; - vin-supply = <&vcc3v3_sys>; + vin-supply = <&vcc_sys>; }; }; @@ -202,16 +202,16 @@ rockchip,system-power-controller; wakeup-source; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - vcc10-supply = <&vcc3v3_sys>; - vcc11-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc_sys>; + vcc10-supply = <&vcc_sys>; + vcc11-supply = <&vcc_sys>; vcc12-supply = <&vcc3v3_sys>; vddio-supply = <&vcc1v8_pmu>; @@ -385,7 +385,7 @@ regulator-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; - vin-supply = <&vcc3v3_sys>; + vin-supply = <&vcc_sys>; regulator-state-mem { regulator-off-in-suspend; @@ -404,7 +404,7 @@ regulator-ramp-delay = <1000>; regulator-always-on; regulator-boot-on; - vin-supply = <&vcc3v3_sys>; + vin-supply = <&vcc_sys>; regulator-state-mem { regulator-off-in-suspend;