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[209.85.220.41]) by mx.google.com with SMTPS id ffacd0b85a97d-48e5e2e20a8sor273695f8f.13.2026.10.28.03.58.12 for (Google Transport Security); Wed, 28 Oct 2026 03:58:12 -0700 (PDT) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Gm-Gg: AYBFou290Iu1HNPi2rTNNQblGGybwQCZey36u4jVIWFRRNACn+FusohBL4MauPPcIuu UqQYgb+OxRHqFKq06Uy1gdtsV8vW9osteHVGPKU4PaRftbi06GF/Zvuw0ICWThsrVjNO1sj7kgG gASV2cep6pWKEUzZKO6rOpMQEbyglLJsWiBDTyEQg1zwCLMjK5NDWUQszFKpSWU2Dmaksjwgqgf 5kk9nd2t0r3v0rHDR7CBt2ZJ3G9wHkqa+KPTfxief+/lYDDVlHeof+z/HSiIHDHbXettEbkzjBt h6kEwEze/QohUjQhrG4xDfg/R4sCvwc9RZ/wL4R0vLNhA/EZc9WLczFkotU6Q+gh1ChmKLlBdIF qLrAyaCP8y0sZFucSJixDo7KQwhO6pvjwZFToHMOv1uVBSNcP9SBeW393oi8CWB3EfbEM5LObES 7ahohb0JQsE5h17J21BMJIK40s+my5q7tEefHdJcy8RO7OzIuudaf4FoEu8htdxFw8ZDE7h30+w cTbYtgCjfWeQzwBxMdaQU+oWR42VNfs2gbzAERFJzR9WUrqIvCV3xLN+5/7Cc8aw7QSIqUf/YSl ikBYkgSkTfZkJ5BZFJ6su7F2j4MSWCGZdPMKj+3AiNtsZGvO9vq7B0zp56w7g67SYftt274Evj8 zElG788qlbx707/QEMlgsyIDgbHdI1hLN1QuzDo+srv+LG+wj+4C2gWaiVI+3IeXbbZxwB84= X-Received: by 2002:a05:600c:4e03:b0:4a1:e7ce:107b with SMTP id 5b1f17b1804b1-4a9640f217amr38505965e9.2.1793185092065; Wed, 28 Oct 2026 03:58:12 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.42.39]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a97c42ca77sm35782785e9.8.2026.10.28.03.58.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Oct 2026 03:58:11 -0700 (PDT) From: Dario Binacchi To: Alexandre Torgue Cc: linux-amarula@amarulasolutions.com, michael@amarulasolutions.com, Dario Binacchi , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH] arm64: dts: st: add firmware reserved memory to Engicam MicroGEA-STM32MP257 Date: Wed, 28 Oct 2026 11:57:40 +0100 Message-ID: <20261028105807.2567225-1-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=pf5Daqj0; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=neutral header.i=@amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The first 64 MiB of the DDR are used by the secure firmware (TF-M, Cortex-M33 firmware, BL31 and OP-TEE) and are protected by the RISAF firewall. Without a reserved-memory node Linux allocates pages there, and the first access triggers an IAC exception and an OP-TEE panic: E/TC:0 stm32_iac_itr:197 IAC exception ID: 137 Faulty address (IADDR0): 0x80000060 E/TC:0 Panic at core/drivers/firewall/stm32_iac.c:212 Reserve the region, as done for the stm32mp257f-ev1 board. Fixes: c5ce8d7bcc78 ("arm64: dts: st: support Engicam MicroGEA-STM32MP257 SoM") Signed-off-by: Dario Binacchi --- .../boot/dts/st/stm32mp257-engicam-microgea.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) --- base-commit: 65ba8f34ec886ec72b2c07ddc8cf3d815c32869d branch: stm32mp257-engicam-microgea-fw-reserved-memory diff --git a/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi b/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi index 5b4287e86def..6cd64587ecdc 100644 --- a/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi @@ -19,6 +19,18 @@ memory@80000000 { device_type = "memory"; reg = <0x0 0x80000000 0x0 0x80000000>; }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + fw@80000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x80000000 0x0 0x4000000>; + no-map; + }; + }; }; &scmi_regu {