From patchwork Tue May 26 03:32:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1229 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ot1-f72.google.com (mail-ot1-f72.google.com [209.85.210.72]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id E3F9B3F1EE for ; Tue, 26 May 2020 05:32:59 +0200 (CEST) Received: by mail-ot1-f72.google.com with SMTP id 99sf9240021oty.6 for ; Mon, 25 May 2020 20:32:59 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590463978; cv=pass; d=google.com; s=arc-20160816; b=jRzM7WvSI94UXPfRBv1ZmZ36AQmhRI5rBbal7hbaa2PINjMVGh2ba8eB4b2OblnAjP pLbfJNuWGlNBHdemQWSRS1p7ZKD/mm5ye6qG7x128ajNrQIORxHIqGkYHdOB+CBUvFv1 Qss4oY4/nnH+wtDgovfv6J2tfuQCc/QwAMlJFLP7vlbtpGJtN160zNBo6jtySlyCWQ2P 6mIja5ja4c4+nWjq/hN71yWfqpnNl6QB8D+Fb30X9pn31czAeS8EZmSR5KNkS2VtvWvF ddUm8phv6FqgXG+lwJHLKcGD93sVKdAJq+U908STuKnG2Cs6THqBb8tcDbQc/+W9bG6w YRow== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=3RNK9c+pdw8k80cUOgJHHmOjE5XBoFD75seXwiXfUEU=; b=EEzhPkO1vW9FwRN/bxALS4eQCiIQ+S78WTh38OzS+25bDxaLSJtvc6InzRfIw/3B0p hoYekcQgMYGkPKhqtTH+phlavChWe7hOEd4AXNVcaIEJvavfkBJG3BnepK9oJ0bomxUp 0e0erepQGiCwg34barYSe7aJ+xZpMFw7zEmeSVHe9Nl9bbMwQ9uEtBSnjMD5FtNjwp9n kDEgk/PDpABCnPIv00U0PHe7M0cue1PyOIDhvh+tWgpCjAz6h5rBzOfN7Jdr3LSys6TT NN6vW/8BEZ+kU42FJAtB3xvhgsYRGyxTHwX+GuEgOeSz/Vtvp2mpDwPktsH6Ss+mMZQD ak+g== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=3RNK9c+pdw8k80cUOgJHHmOjE5XBoFD75seXwiXfUEU=; b=MIM2l+GTwHONbJ6ccL1uyEBQLWLpSjAC33RCMECC+6XsAS7BEE42kupIQg7Zl9gYZ4 HEe6AzZ16v3+qfD3AtYqhvSQMzmjA46JORW2G887lCgeFEa6bzOhCEo/rnSA4M+7i1PR R0pGd9WLccRzUaFXv22Y+A0532kPS+Y2sdwHA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=3RNK9c+pdw8k80cUOgJHHmOjE5XBoFD75seXwiXfUEU=; b=AXaA+gKkr+6Ohg6bUKPLFYQpdkQwW70TaqRMgdYICOaEskN1O+85cn65KzAbA2Pi2o N7diedSY5S/7ey3uQx+7CLxwWIPzLjSCnb2wBNYSs6wPZQJux53nIvQxE79O6LLt3aU5 BTPcnO1PdBScXiIUj4pP/qL6pBTx8ga024K2Yne3+lqXtVxTDlMjFGoljjgjiJT8vHL/ hXGt2nEzsI2jW8DEFRa76uZxj6ZLz6yBliHec3fuYKN50TBIUZRmgARwDPQwUT3O2Fkb i3ObjaQpcbNOzDWqhWlPrxZ8PImBcnzbYHaSO4ANUHR77wxSJM8O4BuZBXFpnIi3UUJU DaKg== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM531FHJYf2CAqf8ZItXDBZkUpv7/bDHDl73q6pnOzHjzTN5Zb42zG 8PTMGWya6HOUWsUD/lfbXZvCy8rw X-Google-Smtp-Source: ABdhPJxq9KM9YcZxNbNreRAZ46jvVGYn2MDyzhSsAwLSO82S/EpLQnryzI5O5V0iRDGHo6UEU4df/Q== X-Received: by 2002:a05:6830:1455:: with SMTP id w21mr21948769otp.169.1590463978301; Mon, 25 May 2020 20:32:58 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:aca:c7d2:: with SMTP id x201ls1811972oif.8.gmail; Mon, 25 May 2020 20:32:58 -0700 (PDT) X-Received: by 2002:aca:4715:: with SMTP id u21mr13373768oia.25.1590463977900; Mon, 25 May 2020 20:32:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590463977; cv=none; d=google.com; s=arc-20160816; b=tIi5gGCzoIH5mlpgnLmG8qWYLVuTwwoIqrJHmNiXQYld+LxxlMKQelT14e+ZRTuPM+ yhoCmNd2MuoKbnzzsrw1WUsyXjvdKOix0Aqf3ea/wo/XCbfbNAb4OIVH83lbuNixGQcG +tePnWZo2K40sm+26ugrVX4cvZ7H07PJA8kv5AYhIKCkZKfLlsBWSPwuzMq0IkGOtbRn oBqVgjl5uGHeMF75EgHNbfDBNAH2t932NlQseKv9e1nAOb8179a6Y6BupkyuFbBWkRVD qv37DguP7Ih9BiJMh1fhRZRl6UtQd3ab0fNRfRCm4p/bNt/AcIzjorkN5IFN4A1QkUVc aWaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=caGHEc8U8Nqqd4TG7hcNM8/nxnliNnG4H5WbxdNMKGw=; b=wwqTi5pxyXPuw00aBFc52ai1fBVoc5NKl+g394cG+ZuhrmAIRNXQNN8ohSsJKJfLai LbK5nvJsaBT4nAE3oZhZGW2ox/pZmAPOH4mSBgeBcNyAxJrcN3MjLwbi+blQEqsYscax 8Z230UD0zN3132WbDyzGM+tseY9jKXkg1di9Zcc0V0mfritAQdfjaj6vGhZzsxPwGijU +knQkLlKJVuZZojfY6VZdzPSD2fJqi4ulX5lli+NeXRgaAZ0ekFLYVMaYK9IhGNRr+Fi CR/6J4IiBbUhUpqXbETuIOo6+jlaauBqII5edKopG/bo9ZHzU3NhvBdpllngXVAYa14O z/VA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.131]) by mx.google.com with ESMTPS id p4si2272410oti.315.2020.05.25.20.32.57 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:32:57 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) client-ip=211.157.147.131; Received: from localhost (unknown [192.168.167.8]) by lucky1.263xmail.com (Postfix) with ESMTP id 2E220A72BA; Tue, 26 May 2020 11:32:24 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P21206T140696379496192S1590463941416434_; Tue, 26 May 2020 11:32:23 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <477ef20d92f1293979b75290065dd7e2> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com Subject: [PATCH v6 01/16] clk: rk3399: Enable/Disable the USB2PHY clk Date: Tue, 26 May 2020 11:32:05 +0800 Message-Id: <20200526033220.20047-2-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033220.20047-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Jagan Teki Enable/Disable the USB2PHY clk for rk3399. CLK is clear in enable and set in disable functionality. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3399.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 5fb72d83c2..b53f2f984e 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -1091,6 +1091,12 @@ static int rk3399_clk_enable(struct clk *clk) case SCLK_MACREF_OUT: rk_clrreg(&priv->cru->clkgate_con[5], BIT(6)); break; + case SCLK_USB2PHY0_REF: + rk_clrreg(&priv->cru->clkgate_con[6], BIT(5)); + break; + case SCLK_USB2PHY1_REF: + rk_clrreg(&priv->cru->clkgate_con[6], BIT(6)); + break; case ACLK_GMAC: rk_clrreg(&priv->cru->clkgate_con[32], BIT(0)); break; @@ -1167,6 +1173,12 @@ static int rk3399_clk_disable(struct clk *clk) case SCLK_MACREF_OUT: rk_setreg(&priv->cru->clkgate_con[5], BIT(6)); break; + case SCLK_USB2PHY0_REF: + rk_setreg(&priv->cru->clkgate_con[6], BIT(5)); + break; + case SCLK_USB2PHY1_REF: + rk_setreg(&priv->cru->clkgate_con[6], BIT(6)); + break; case ACLK_GMAC: rk_setreg(&priv->cru->clkgate_con[32], BIT(0)); break; From patchwork Tue May 26 03:32:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1228 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id DB3CD3F08B for ; Tue, 26 May 2020 05:32:59 +0200 (CEST) Received: by mail-pl1-f198.google.com with SMTP id s7sf1602163plp.13 for ; Mon, 25 May 2020 20:32:59 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590463978; cv=pass; d=google.com; s=arc-20160816; b=x3lFnSH5nuzBny/pdU1L0Moj3y+wm18JtDghq/HZhH+VRo3ycIRv6xdfghUAy9rKUG Qc+eOYty+cHVQl1lXi3Ka/b/K+eVvQF1O8rI48chMfkiT0rQf8QDS+xWqsVUczHQkG8C fjTH430M8YsLSQbWFBcsrtkvjaJaAugmGI5jJ6vv2IwHbZ42WBOcamy5waEunomr/Evj S1QlOVy4wI6qqxiRYBsdGPHOPhAOLR4H8SsiIyc4Gf3hUD73rT+ehxUEqe5TorUTeoMK q/Ssv7fhalMZha4CwO+Hb8Gdlu5e3mTIHRnxI3Ju+kkhZdDXz3OQerzk2L2+cbp6qu2h 0GkQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=ioUW2axSrtd5PfJ6HMRh5+JRUPh5U/qAl/1bbZ8E1AM=; b=Au8tmXYWOKhWGPa/bCqo34Y0bQSA9sSOX2JPQD3hj2hRSc3QkMHzU0Q3mCfRLv1Mvn +pCviZpk0Vnq2TXbviJeGl5w0t3x33r2k+yAuFTO+UFV7pQ5xL3Zj045aMtrmtERkN/B mGeCDAIFsnUxcbzKwlfXvPYTkLMv/bucvT0cK3U71yyR9cHUcLMie3d+F9SsETen5LhH 3suzJAlYr8Pu5LO1YfOIvOWo1BpWZIihHLumJL0fMl2HcDF6r+z7TRMKlR+0h6hGIPWd 3cKr4Cjm3nZMZA/+pL+u3cmux3ZlGJ5YsabRgMPCDgeNfb2d4BpzFr47c4hY2yL39a6v NfCg== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=ioUW2axSrtd5PfJ6HMRh5+JRUPh5U/qAl/1bbZ8E1AM=; b=YaFAgv/3nifkzIyxQ6LClnePsqlSwmXeRaGFDTjWu7otjVVTrLT5btLB/mz3KgdIch ulm/KSJfjqqSzGVxcvqnMeK14o/+yHR3GWmLanI1L/q2AoGju6Db69+Ycix4WbBUhEBI gPxTvRY6bTj76q+QOEEkJGX5Ew9sca1QbNrEk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=ioUW2axSrtd5PfJ6HMRh5+JRUPh5U/qAl/1bbZ8E1AM=; b=b9fLB6y254YoTMkY+oLVL842411OPt6XyWrjfw1wOH9gx+j0VH8a9XGlBYyT7YeKLv 7NUCHPyZbv65qFGJ2VGWf2oua4hcNadLc/3ZxZL1CICnOV67mFg09aCOf3/rC7XgenDC J2of4LngtOHnJFVlgNEij26gXT8Ta3qKW3M8H5i/Pb3ku9TQ/tG1uD+5R8M9Vr0aSozS 6ORuQvqmlE408qK8b6+dmGJhVMpGRfLXcTtQPXFrDRLrxjOdQ1jmuTN0cRGtnonpAd8z eveCnoGofb77aRSnVFEPWXNh/0hwACk1qmG9fYHutfYUrCVDOi/EGxxT96oY7iZs4RM+ S5qQ== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM532QSURL5jShyumCkJ058YVaqti9m0lZZt1MNFFHgRD5vc4qoYJ/ 2r1As7Q71Qn8ifXMKa9WeZMPffH/ X-Google-Smtp-Source: ABdhPJzQvG+fpYvbNkA2GIcnrnLs5kVKIG00n7LTl0TDhdHrUchk1lIKyt/qqacMR1Xz3TWL5zWwiQ== X-Received: by 2002:a17:90a:4802:: with SMTP id a2mr24893021pjh.66.1590463977952; Mon, 25 May 2020 20:32:57 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:902:7298:: with SMTP id d24ls4412400pll.5.gmail; Mon, 25 May 2020 20:32:57 -0700 (PDT) X-Received: by 2002:a17:90a:a62:: with SMTP id o89mr24410000pjo.217.1590463977335; Mon, 25 May 2020 20:32:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590463977; cv=none; d=google.com; s=arc-20160816; b=NKpo9XWsE2WDiUVbVXDiLHavpQZu97WUTVthZcBNEyK4mWjl4bvpwLCZLlstS7jgcE TgKYaffeTfe1p9L/WZnu4v426d+fQr6CjqE9pnoDPHkMd8VYU49Cke+hhB/ONxk7FMkc RWF4UmyimoYCFyx4/0a08FhCKa1HjtWffKCp+qAmfVzcutFANfLyR9enQS3uIUPUtRJX Fgi54pNEmsxRSqcF+Uo9BCegmTIHha4JNn5fe05XLSj0p9gv7rtVRPsGh8pxBSacHst6 bc8MroVBRG8UoCVkOdmKoKoNsF5POSxbCmJ09uuLfkEi+md5kaRd5bJGKt+19Yapk4J1 qsrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=O0uYliqwYN+S2uYsZ9mnQm48TqltndKmSLlrsH1j/lc=; b=SfA9bCPyorupfrID9mqT9e9hF3Pjb5bKSUVusME+xx1npInorBFyCcF4kdY1sZN64P o1ZUKcPvDRFKJK6oECG0fEL8Ucjl4ifXSlvUXhLE4k5KKUmyU77/dOIhrOSHIr/mJMvm STfY2Y5POFzSdyABVhzvUlGbWhrN4dmTJGsl+bjbpv9iH27SDihkblbA3IplNR7KHRjT iRfo6zML921ZuhYz4ZE5DTB4q/b6hUowNIQRb3NUZVc5JNObDO+V3CUMzgWTbHW7VQ7X zyoEpewWN8Gm6q7dDSyQSRfPcH9Kv0Y41OvKZ6J/ZsB46K5V90n300fSwxHHSX8UaGpE m/vw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.131]) by mx.google.com with ESMTPS id h19si15442850pjt.149.2020.05.25.20.32.57 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:32:57 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) client-ip=211.157.147.131; Received: from localhost (unknown [192.168.167.8]) by lucky1.263xmail.com (Postfix) with ESMTP id 09548A72C9; Tue, 26 May 2020 11:32:25 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P21206T140696379496192S1590463941416434_; Tue, 26 May 2020 11:32:24 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <510c3d685bf73d271eda1519850485d4> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com Subject: [PATCH v6 02/16] clk: rk3399: Set empty for TCPHY assigned-clocks Date: Tue, 26 May 2020 11:32:06 +0800 Message-Id: <20200526033220.20047-3-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033220.20047-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Jagan Teki Due to v5.7-rc1 sync the SD controller nodes in rk3399.dtsi have SCLK_UPHY0_TCPDCORE, SCLK_UPHY1_TCPDCORE assigned-clocks which are usually required for Linux and don't require to handle them in U-Boot. assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>; assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>; So, mark them as empty in clock otherwise device probe on those typec phy driver would fail. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3399.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index b53f2f984e..98fc6a3267 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -997,6 +997,8 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) case ACLK_VOP1: case HCLK_VOP1: case HCLK_SD: + case SCLK_UPHY0_TCPDCORE: + case SCLK_UPHY1_TCPDCORE: /** * assigned-clocks handling won't require for vopl, so * return 0 to satisfy clk_set_defaults during device probe. From patchwork Tue May 26 03:32:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1230 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ot1-f72.google.com (mail-ot1-f72.google.com [209.85.210.72]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 2C06B3FA5A for ; Tue, 26 May 2020 05:33:00 +0200 (CEST) Received: by mail-ot1-f72.google.com with SMTP id k91sf8948509otc.10 for ; Mon, 25 May 2020 20:33:00 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590463979; cv=pass; d=google.com; s=arc-20160816; b=ocOrhP+qQo5UsAVegsg1GBlUO2R51JbXWTNDuH6LbnD1sHiTqA3IzfKcek9AfRgaxU jWvNCd/HEFWEme/fv4rbm7kd5CG5Lcc98T3ez336DZPYnJzwXMI3VKgsZE6XJUp+n+XJ GRaFNb0xtpLnz/4wclTBSu2ls92/6VjTfJqblYNh7upsz/75skgVlzBLd/HRZpdsTfkN 0u2SZ0RxnV+TAsFPiItMYgFZZPxoXvXP8UlX5Y2QDp05gZTL8uxAozy7V7tBRq33ywTm aFkLpkTapyuX19KSZOzUXO1cgYpz4NnMmbZ+lQLAqTA25VJsQTwehdiPyRWyzTVDIAn7 pPhA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=/JPPznrSOpATE9p0xk72an2LHyFDMN5jk7SIbYddKho=; b=xe5lR0keEeIEV+zyNnYv9VzFaoeukcqAvtB8LJeBr4VudVfggtqMa7DvuaWXuiNNri YjBJRNaWB3XYkJRLaRvDTVltb1eLBCZzbOFGFpZoGgFwuiCWblIpxcRbzt4r86c5x5y0 xg2hIC3ningSOpGVxmlddvdBbep6+aJkRjZwVsh8dwoMvYMQJzFWSvHaPMCxKzqlyKGq F5duwngwZSlKMWLi3tNBbekfEj24Lf1hUscjfRSxSoTucNitCCEZBf/5oXJNgN5fjIl2 FpLTDjOH6GnLPjavnAtSPzlXDsjtQ/4ZTM600RSfRlh179RGo1m31UQM3v1OQdHlXywq Zvaw== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.130 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=/JPPznrSOpATE9p0xk72an2LHyFDMN5jk7SIbYddKho=; b=GfcySfTSuH83BHxhOj98/GwTczR6zS8mdoI0f+uq3f6Nn/bAv7mBI9Oe1JxDQV+fKm LNG+2aA7xQ7frKYVwFvtRRhBsPkUZ9qSWu3Ry+CAZXUktXH7SmtHOKgJ2qyZ33PEV1hI EM8VdZNeLm0OFltvIio/OFm3l6BCbDq4tMSEI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=/JPPznrSOpATE9p0xk72an2LHyFDMN5jk7SIbYddKho=; b=JdDBbPMKQxCuC1HQACgxHC0aEkGftlB1zT+U+fiTXdLqqGUqi7Avr/oRvxfjTs6EUl UMXFOjuUDb3YMEw4W8jUd7S0iz9gP35vIQLAsUv+FPSFBsgGr2/jW+YuKsJyJrclMYlw mBy9K8abNbPfdFHwfE2/OQx780nGjFiSsg20Ska3cCB5G5CB1iQLHYIjgR1wPL9LH1gt 2GVeCABt+FOyaAY7twOiS7G48SKaTIoah8D4C9/dGZtAPig3auS5b0syp+V+iSJUEhfx yIz/5/pb6bZT3bl5b0KB1TAyqvCcBnnKpdoobH40h3UxWh+XVARkNMJK+bnCp3eoiLJn zyIg== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM532ci+Fidao4TU92dlExjRNWfPOEGHGraBDTibJXjivRvwyabQuR hdhxwbs96YRlbUGEk1hTwkgmydCR X-Google-Smtp-Source: ABdhPJwBY3YYjIig7YFG4TnIAYN3lrEjZ9rZHTTVFoz9+pColee5Daug1DZEY/wrGjVXVZsPKve4LQ== X-Received: by 2002:a54:408e:: with SMTP id i14mr12764196oii.93.1590463978996; Mon, 25 May 2020 20:32:58 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a05:6830:148c:: with SMTP id s12ls576809otq.5.gmail; Mon, 25 May 2020 20:32:58 -0700 (PDT) X-Received: by 2002:a05:6830:1292:: with SMTP id z18mr22709336otp.333.1590463978262; Mon, 25 May 2020 20:32:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590463978; cv=none; d=google.com; s=arc-20160816; b=0caO1cVrIcPlPnFvric0IhFIlhKB1hmOwziy7KRF01geObYK0zEdGIKTvIwXwNBjqo kviwwItp6X5zlPY1rEBE2icTq94HATZHC3/eREk7EkhFxqcnHKFrHkl+H6oMZ/CrCCMn tJug+ZiTS9C7UGrr/t6cQh7ZEvCkkofAlwx4zX1IXQ6A7yzoZMuw7vC7AQAKG8nCk/Db ETRKRbhAsujp8tOfVP1gdiNh10jW4OGdRN8U7WbVPfKWSK+VsVZUaQv5TzKoKnbUu02Q h3ayyDhmqFMGqfMYnk2fjslSc/3g4LEhQgVLCqiK5bXKCZUeV1BWBYbYKQxhgeTMeB93 Zbgw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=jFnqTCBLGkM0WkVnqeoyGo4k9eM5eR8X2FkCOAkJO0I=; b=R3e0QjeIiKeUchH/sCsxuFhoWAF1x/dtL3B30PQDD/kFXUFmv9sxoSxM6i+oGcqNIs bJh2qPAS9A0SNAbjsRXSoZ5pIs27x+OKcaHZ9CdfY+e4mmVw647wFZSo8/q1MEv/P9XG 50+lPiVCcvO27RxDTOvYwQxtSi4+4C7BK10q8FfYd5opkbXvkWeeKE/zxo1nP7O1zPYe 0TAubxXlJCS9i4XFfwFvwSY9yZAFc4XcIwgEdUblK06iK9xAfn+f4DrGH0Wp3N8IVTbM xwGyjcVi3EGutpzOItpfvhzqZ8QNHFfyQa0l08VLrSKrHQ0sbHVFqDJH36G6U/WodzOx R2zw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.130 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.130]) by mx.google.com with ESMTPS id v64si8870045oib.238.2020.05.25.20.32.58 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:32:58 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.130 as permitted sender) client-ip=211.157.147.130; Received: from localhost (unknown [192.168.167.8]) by lucky1.263xmail.com (Postfix) with ESMTP id 6F31DBB702; Tue, 26 May 2020 11:32:26 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P21206T140696379496192S1590463941416434_; Tue, 26 May 2020 11:32:25 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <60f496585bcc327a52fb97a3068a3f8a> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com Subject: [PATCH v6 03/16] clk: rk3399: Enable/Disable TCPHY clocks Date: Tue, 26 May 2020 11:32:07 +0800 Message-Id: <20200526033220.20047-4-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033220.20047-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.130 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Jagan Teki Enable/Disable TCPHY clock for rk3399 platform. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3399.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 98fc6a3267..06232f1903 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -1144,6 +1144,18 @@ static int rk3399_clk_enable(struct clk *clk) case HCLK_HOST1_ARB: rk_clrreg(&priv->cru->clksel_con[20], BIT(8)); break; + case SCLK_UPHY0_TCPDPHY_REF: + rk_clrreg(&priv->cru->clkgate_con[13], BIT(4)); + break; + case SCLK_UPHY0_TCPDCORE: + rk_clrreg(&priv->cru->clkgate_con[13], BIT(5)); + break; + case SCLK_UPHY1_TCPDPHY_REF: + rk_clrreg(&priv->cru->clkgate_con[13], BIT(6)); + break; + case SCLK_UPHY1_TCPDCORE: + rk_clrreg(&priv->cru->clkgate_con[13], BIT(7)); + break; case SCLK_PCIEPHY_REF: rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); break; @@ -1226,6 +1238,18 @@ static int rk3399_clk_disable(struct clk *clk) case HCLK_HOST1_ARB: rk_setreg(&priv->cru->clksel_con[20], BIT(8)); break; + case SCLK_UPHY0_TCPDPHY_REF: + rk_setreg(&priv->cru->clkgate_con[13], BIT(4)); + break; + case SCLK_UPHY0_TCPDCORE: + rk_setreg(&priv->cru->clkgate_con[13], BIT(5)); + break; + case SCLK_UPHY1_TCPDPHY_REF: + rk_setreg(&priv->cru->clkgate_con[13], BIT(6)); + break; + case SCLK_UPHY1_TCPDCORE: + rk_setreg(&priv->cru->clkgate_con[13], BIT(7)); + break; case SCLK_PCIEPHY_REF: rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); break; From patchwork Tue May 26 03:32:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1227 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f197.google.com (mail-pf1-f197.google.com [209.85.210.197]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id D8E7A3F08B for ; Tue, 26 May 2020 05:32:30 +0200 (CEST) Received: by mail-pf1-f197.google.com with SMTP id m17sf15808339pfh.1 for ; Mon, 25 May 2020 20:32:30 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590463949; cv=pass; d=google.com; s=arc-20160816; b=eFi8tfboYoyrn/6fdw7HIcsGBTATR1DRhZYAnzUYorBT6DkfvnBIYJxQHb3oTznHk5 Pfn7V2/URLDMa/WgP93b/6rXOGL1prd8FofW5iRNyo8343UVRV2gkFgQYdbbAW8CFkJR L3ReSOID70+Jr8Uj7G3IKyCQoquUJHjEWbaobAera7e4MB0XzMeY5DPHIayfn0cIqISJ PUXDJJeQe+bDMRWV5nN7PhMaYKPTeoC7Z7LOCGs0UuCcuZK7nDmM3mox66CyaRrGWii6 Faryv3DPfw/LOTd8bix333e1EWpgZLiZsIgJV2IN2fyVZwwZE7K0mqcjeCsqPCou8dmb Akfw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=sWnNcWtuLpjyYoahCjaOItJvKbeIWUQeXWsW9HtmTGI=; b=qUzBU5kwnvJIDJlq3Ii9uXBJow2xAVkwEbsbKL4+8tEIBv98zVOavO2/gbfSFzjIX+ kr/iC2tLI8Olw9KY1dZV/aNuqCKKftUtVjkR4Po3BMIUO80stoa4XCAVdgdysezxLaf/ dDp1A8bjJ3p7h/7pTYIYLwH7WHQsZAbNxCEjevdl9YG9RYK+pSVsUxksFEHKmOS89hWs n0mdM1fs9gozbu8uDz1Z+1ZYbEhyKLxpYM285iTYcLyYrLSsUibcTGohjPgkxHq9/Kf1 H88nVUjc63mAlAeWXIGVgLHEsGtULRkijIYCuWST2TI3862WM7BQVkeymJVYPH9q67Aq GjDQ== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=sWnNcWtuLpjyYoahCjaOItJvKbeIWUQeXWsW9HtmTGI=; b=qoCWMqez0FqZLcBTe4xx+RpsOs7qFLTSrFNdRacERqbt1J0qzYS+aPSJhVs6h/vwh1 RnY2wM9nU47U0CxIQoazyVrSaPLHd/JxyapWzkFNTQwshWowizK7rE0IT6ssB5W7YSz6 Zuee1RhKmArzpd5yFH6AFS+PjqBIWg4lGcx3o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=sWnNcWtuLpjyYoahCjaOItJvKbeIWUQeXWsW9HtmTGI=; b=l5ep3dl9O+2AihkWJ7si5oqa+xFmb5BNQ/MgA8p4vg4sMKOWGmKa6sw8tWxsjRUazb F0xD+QoNy+l8cAQp1vJr4/8xuASJ5++CVM6GUR78YFCDik9xXU8/719lyI2dhZsvcO2k KTSkFnPkaHqFGr489m9xALd4xc7c3OJoHHAVV1622CG5CaDLb3WWkTm6j4pbsatnZI/F S5JjPrhXoWIZhDL77lUQxO0dEChDOP5mKfMFdIR8OvKkaugOGmoEF7ihvwyY4xYXwKP1 03h9PmAEDsjrmtcUefxvSTs02HjdGOvG41ayHfAvZbqxghVgUlU37WgUFW1NZAMrKxZu R0hw== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM532GsCbS1jT4brm8MFAFK2FNGPsbvlRZ5DxUNqp3EvgIz1xJJvSN w0oMHKZlbfB5RxYyu42igIWG1+71 X-Google-Smtp-Source: ABdhPJxH3Jy4fj4adLcoxvLnjs83dXIhMuTYSOCL2L3KH6EnnCXMxegsEuzZ1URFJa4k47U9bsRfSw== X-Received: by 2002:a63:7d53:: with SMTP id m19mr30936556pgn.168.1590463948671; Mon, 25 May 2020 20:32:28 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:902:d90e:: with SMTP id c14ls4425527plz.0.gmail; Mon, 25 May 2020 20:32:28 -0700 (PDT) X-Received: by 2002:a17:90a:e30e:: with SMTP id x14mr23514033pjy.235.1590463948006; Mon, 25 May 2020 20:32:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590463948; cv=none; d=google.com; s=arc-20160816; b=KlvZXhIZmOiLmm1uUnhBR5W6h1zWewjgi1GkC+++bj/dM01fUbzR5677Kbw2f+Q38B 6MsUJEqsU1rawU8DdkzTsvu6ELUwlewFeU+kbiTKT/uTZOQ2rviQdmLIXLJ1mAJIGU8l hwRdy9XkL5Q6NZru5co7HKLBU+wJ2a6cR1fCoWUiEAaKn2xlX5OXE40AWSdEMCkhcaeq ACOWnyGBrsB8noS8P0G52W4L87Q/FbKbTNUoogs8ohbyOyDL6/zMh9l/r1eFouqWAGJl 4kuJ3Vv9ou6VIHCM5ukZ7x1WoxBM1lEpl1R6YR+DJ90NqSbuvGbeLuuFRjKtuVHzaEAX vxBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=MSvf1uNErb106xGyDDuXYHbt5rmsu0OfIzXf2ZqylYs=; b=PArPeQEZUDNLXKYgnY1/rrnj1hH+pOJZSqgelK0DHCHpAAyxiIkU1rNSdbKv6a8oWk zIagaQvfpLG7l5YJTbrCu1Ys9kBMTARSDSm5AxRjKimUBKl2/J1Nz+f9EGqf5Wvpdh6a XeDZj1kiilyevI8XVawgl1eFGEjvfAlqipkNv7aEcqrIYh2FRcTtZVsSC1rFKAKSUPp4 G4d1OsMDW7uGisP/ocJVh4epaM4VHC1svCTgqWTOm+I5gWa6xK1cVB3cag0wA+mVAZSL uodpYZCLYLRCzkNZfL6f5VF5uh/kmMvthCJNQiFwz8XZeX3bTzdIdyVP+tRRlpASkFGS gzaQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.133]) by mx.google.com with ESMTPS id w12si15811272pjn.67.2020.05.25.20.32.27 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:32:27 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) client-ip=211.157.147.133; Received: from localhost (unknown [192.168.167.8]) by lucky1.263xmail.com (Postfix) with ESMTP id B170DB73A0; Tue, 26 May 2020 11:32:26 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P21206T140696379496192S1590463941416434_; Tue, 26 May 2020 11:32:26 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com, Frank Wang Subject: [PATCH v6 04/16] arm: mach-rockchip: bind sub-nodes for rk3399_syscon Date: Tue, 26 May 2020 11:32:08 +0800 Message-Id: <20200526033220.20047-5-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033220.20047-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , There are some sub-nodes under the grf DT, so add bind callback function in rk3399 syscon driver to scan them recursively. Signed-off-by: Frank Wang Reviewed-by: Jagan Teki Tested-by: Jagan Teki # roc-rk3399-pc Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c index 259ca44d68..f27b0ced82 100644 --- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c @@ -20,6 +20,9 @@ static const struct udevice_id rk3399_syscon_ids[] = { U_BOOT_DRIVER(syscon_rk3399) = { .name = "rk3399_syscon", .id = UCLASS_SYSCON, +#if !CONFIG_IS_ENABLED(OF_PLATDATA) + .bind = dm_scan_fdt_dev, +#endif .of_match = rk3399_syscon_ids, }; From patchwork Tue May 26 03:33:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1234 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pg1-f197.google.com (mail-pg1-f197.google.com [209.85.215.197]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id CCC7D3F08B for ; Tue, 26 May 2020 05:34:32 +0200 (CEST) Received: by mail-pg1-f197.google.com with SMTP id b131sf15574558pga.9 for ; Mon, 25 May 2020 20:34:32 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590464071; cv=pass; d=google.com; s=arc-20160816; b=HGstTO0PNcAi4rQZeBeOqVS0YGsz0kPgch2FkdhNNr4HTCTX6QIRiJH7CyhuErYdpd dkrnTa71cYTXB5oEIx9fep0nXJ9Z/VEwjdEkqhtW8ML2LB728t9NZSwe+/vnbvJIxkXd 37rlgFLF7TdY0LdEucg3bhfyJHb+HZBxjulR15DfCI5cdEnb3LDfcSTdE2GHpST+lqzr 9TpDowap4WKYPE1o5s2iTCcCSA9NXX7g8HhMzYoNAW0EiiV1Br0IsLfw2+AMLaW4NATS Ov+DVPDdnt+K95p+g3hZuo8stuiyCbucZs/aY/oKS17hsb5yyXBYbjwvYemPd4cumj3l lqqg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=5TUqAJgeha8/v5lRC2L+bKWQtKEc3HHXPdef5JBPsvc=; b=H3CrS7s1fJaAo8iHqN/ugi4TCGOpLmmWNDwvklhS2dDtHBFrFZgMIMtNsLonBy2w3i 3H/behapBVp82tFzLnhjoQPFGrcsL+tihj9xzKc95YtkhaqduwPwHLY8/xxihBgFWb/u AC/1F0oK8CBXJwPkuasufx4g5AHjLWUty40A4xTDm9joebwbuKnd4aUuf6M57E4PXOCM YMV311jZCqNNKZIXJPPUqe+e1Tmo/w/xpVGEMeP8bVPmUc/OjGCNEApGcyQDsihewjs/ M8K88/3a3ifyrybWEwMFbTkJXx9VMxW8OlTnqo1b1ZdclxepRNIXpvesQg/77hgPVxEA 7dUg== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=5TUqAJgeha8/v5lRC2L+bKWQtKEc3HHXPdef5JBPsvc=; b=o6fjWPOx1h60XpnYFN5mdIa9mGxwtyEouSi/vTcalHq/dpndylufh1VyoygSBbWdBh +g+irq47Okaut6jnSPx7KwsxID9FkudRSxNJfmof/tYJvSorK5iD17Zczx6z/sT3jtPy Xt7IfgGXxX6HV27Tec9BCN85yHexewZDh3SBU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=5TUqAJgeha8/v5lRC2L+bKWQtKEc3HHXPdef5JBPsvc=; b=YiNE4YNKRbkijV+mlaPexJFd39Hah7hg7IVLhYwMJYyhqTiz3u4ndWZeNkmYbsd9Ep CtoxgWpDJQH3NL3pAV25UzouQj3Y/c6buWtIfvLp+OROzGReIIOzL4h1DSVsf1JrWbBq 5ZKoN9iBH3mpJ56Z9lW5m0dztoKlvKnpExbl6br3BFy+5lq8vogRjfFdtJEKgQS/ijPP 1BeGalRwhxnoCQk0A1phIh4UpXvcHRoW47YNuzuq4MukoA+1izuiqwgAbbjon6L9vCG/ 2SgweL420u7BgTrIq6DaZUyBAyL6UOjHxW868BLt8zwqtPyen150F3FOHUkRUcyR9c4S r+zw== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM532NWhTnBUttGqn/opW1X+JCoMaECm/TXjL8Q+cgxqHLT3W2yYci +QGbT2SsEXE4kdjGrAEveo+o7nM1 X-Google-Smtp-Source: ABdhPJwLGK3T2B/dT97UFGBVXkKiHeiE6A8esDMBQbrmkx+d3T2H40aW862IUpy4/MtLAy9yxyJDXg== X-Received: by 2002:a17:90a:f0d8:: with SMTP id fa24mr23372073pjb.93.1590464071647; Mon, 25 May 2020 20:34:31 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:902:a717:: with SMTP id w23ls4410071plq.7.gmail; Mon, 25 May 2020 20:34:31 -0700 (PDT) X-Received: by 2002:a17:90a:344c:: with SMTP id o70mr24991004pjb.23.1590464070962; Mon, 25 May 2020 20:34:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590464070; cv=none; d=google.com; s=arc-20160816; b=dTxk83TpqmEbFlFEBH055ahFz/pfaOvGstdWML65i0pe3xy9GtNi0WrUn8o8YR2P4H gwWOS0XvevuG+UFEGBgRJKZ35mTiRnCoGYYVAnPx0Nlmt4Vr/CO5XjC6+T9KmnkVa2Q5 PvOu0xT4InlA9jR1pdJIyihemMSNFIeDahqk5jC1W8LsVxw5WhkTxOF6KrSMNWSgUYvx 99ukh4/TaMk8/BgKDhZKbrPKnGyA/kypb1pTNApaHgsD502UyJpoVkDfSTYwX2qLMnGg /RC+X74YGT263AgF5t4vyi/ZTGx3mpvAcJe9cekkE7mR4KlJxs9ph/uOtIgPyrjWaFeD edUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=Wh8zwjfFC0HsvpBCJSTi6ZUn/PRhD7KwgM3+Ww0etng=; b=uHEzC4c6Wr9mYuMfxIDjTeEEtbrgNUuh66FV0dYLlwNgGA0+RqHvr1cVpMmkPBGG9F 0J9xPZFnHUk/3DkUHrxJqG343xpbY2CxrQrqnfLw08ZRvItuA0awwXWN2IZ7LZQa1/rl Q1K+ZYjyXfva8NVA8YZq0ZaZ8c3lza7x8OuXPvmGVMufLlcVseChfRxPA7z5UJaHbgIU 4s4YKOouJGKQzECnGjWCqt+ML37ohqPoxeFFnzzubzoBnHtTGY/k0niRw9uq1FOdtUTi 616Ui70ZXKthdyjTMjnx+0qiFesf80MACCWLeBptuPxkdqqBcTE2qsjAjxVGO9EOf22d Fk5A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.131]) by mx.google.com with ESMTPS id d8si15969608pll.43.2020.05.25.20.34.30 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:34:30 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) client-ip=211.157.147.131; Received: from localhost (unknown [192.168.167.8]) by lucky1.263xmail.com (Postfix) with ESMTP id 26C9AA7556; Tue, 26 May 2020 11:33:59 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P21206T140696195421952S1590464037437993_; Tue, 26 May 2020 11:33:59 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <727fcfa8ca40f3f2fd2d8a63cec33c78> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com, Frank Wang Subject: [PATCH v6 05/16] phy: rockchip: Add Rockchip USB2PHY driver Date: Tue, 26 May 2020 11:33:44 +0800 Message-Id: <20200526033355.20147-1-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033220.20047-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Jagan Teki Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki Signed-off-by: Frank Wang Reviewed-by: Kever Yang --- drivers/Makefile | 1 + drivers/phy/Kconfig | 1 + drivers/phy/rockchip/Kconfig | 14 + drivers/phy/rockchip/Makefile | 6 + drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 312 ++++++++++++++++++ 5 files changed, 334 insertions(+) create mode 100644 drivers/phy/rockchip/Kconfig create mode 100644 drivers/phy/rockchip/Makefile create mode 100644 drivers/phy/rockchip/phy-rockchip-inno-usb2.c diff --git a/drivers/Makefile b/drivers/Makefile index 4208750428..94e8c5da17 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -91,6 +91,7 @@ obj-y += dfu/ obj-$(CONFIG_PCH) += pch/ obj-y += phy/allwinner/ obj-y += phy/marvell/ +obj-y += phy/rockchip/ obj-y += rtc/ obj-y += scsi/ obj-y += sound/ diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 1e38c8741f..9c775107e9 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -225,4 +225,5 @@ config PHY_MTK_TPHY multi-ports is first version, otherwise is second veriosn, so you can easily distinguish them by banks layout. +source "drivers/phy/rockchip/Kconfig" endmenu diff --git a/drivers/phy/rockchip/Kconfig b/drivers/phy/rockchip/Kconfig new file mode 100644 index 0000000000..d73ac695e1 --- /dev/null +++ b/drivers/phy/rockchip/Kconfig @@ -0,0 +1,14 @@ +# +# Phy drivers for Rockchip platforms +# + +menu "Rockchip PHY driver" + +config PHY_ROCKCHIP_INNO_USB2 + bool "Rockchip INNO USB2PHY Driver" + depends on ARCH_ROCKCHIP + select PHY + help + Support for Rockchip USB2.0 PHY with Innosilicon IP block. + +endmenu diff --git a/drivers/phy/rockchip/Makefile b/drivers/phy/rockchip/Makefile new file mode 100644 index 0000000000..9b0cbc6acf --- /dev/null +++ b/drivers/phy/rockchip/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2020 Amarula Solutions(India) +# + +obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c new file mode 100644 index 0000000000..c5ea6ca31f --- /dev/null +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -0,0 +1,312 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Rockchip USB2.0 PHY with Innosilicon IP block driver + * + * Copyright (C) 2016 Fuzhou Rockchip Electronics Co., Ltd + * Copyright (C) 2020 Amarula Solutions(India) + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define usleep_range(a, b) udelay((b)) +#define BIT_WRITEABLE_SHIFT 16 + +enum rockchip_usb2phy_port_id { + USB2PHY_PORT_OTG, + USB2PHY_PORT_HOST, + USB2PHY_NUM_PORTS, +}; + +struct usb2phy_reg { + unsigned int offset; + unsigned int bitend; + unsigned int bitstart; + unsigned int disable; + unsigned int enable; +}; + +struct rockchip_usb2phy_port_cfg { + struct usb2phy_reg phy_sus; + struct usb2phy_reg bvalid_det_en; + struct usb2phy_reg bvalid_det_st; + struct usb2phy_reg bvalid_det_clr; + struct usb2phy_reg ls_det_en; + struct usb2phy_reg ls_det_st; + struct usb2phy_reg ls_det_clr; + struct usb2phy_reg utmi_avalid; + struct usb2phy_reg utmi_bvalid; + struct usb2phy_reg utmi_ls; + struct usb2phy_reg utmi_hstdet; +}; + +struct rockchip_usb2phy_cfg { + unsigned int reg; + const struct rockchip_usb2phy_port_cfg port_cfgs[USB2PHY_NUM_PORTS]; +}; + +struct rockchip_usb2phy { + void *reg_base; + struct clk phyclk; + const struct rockchip_usb2phy_cfg *phy_cfg; +}; + +static inline int property_enable(void *reg_base, + const struct usb2phy_reg *reg, bool en) +{ + unsigned int val, mask, tmp; + + tmp = en ? reg->enable : reg->disable; + mask = GENMASK(reg->bitend, reg->bitstart); + val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); + + return writel(val, reg_base + reg->offset); +} + +static const +struct rockchip_usb2phy_port_cfg *us2phy_get_port(struct phy *phy) +{ + struct udevice *parent = dev_get_parent(phy->dev); + struct rockchip_usb2phy *priv = dev_get_priv(parent); + const struct rockchip_usb2phy_cfg *phy_cfg = priv->phy_cfg; + + return &phy_cfg->port_cfgs[phy->id]; +} + +static int rockchip_usb2phy_power_on(struct phy *phy) +{ + struct udevice *parent = dev_get_parent(phy->dev); + struct rockchip_usb2phy *priv = dev_get_priv(parent); + const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); + + property_enable(priv->reg_base, &port_cfg->phy_sus, false); + + /* waiting for the utmi_clk to become stable */ + usleep_range(1500, 2000); + + return 0; +} + +static int rockchip_usb2phy_power_off(struct phy *phy) +{ + struct udevice *parent = dev_get_parent(phy->dev); + struct rockchip_usb2phy *priv = dev_get_priv(parent); + const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); + + property_enable(priv->reg_base, &port_cfg->phy_sus, true); + + return 0; +} + +static int rockchip_usb2phy_init(struct phy *phy) +{ + struct udevice *parent = dev_get_parent(phy->dev); + struct rockchip_usb2phy *priv = dev_get_priv(parent); + const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); + int ret; + + ret = clk_enable(&priv->phyclk); + if (ret) { + dev_err(phy->dev, "failed to enable phyclk (ret=%d)\n", ret); + return ret; + } + + if (phy->id == USB2PHY_PORT_OTG) { + property_enable(priv->reg_base, &port_cfg->bvalid_det_clr, true); + property_enable(priv->reg_base, &port_cfg->bvalid_det_en, true); + } else if (phy->id == USB2PHY_PORT_HOST) { + property_enable(priv->reg_base, &port_cfg->bvalid_det_clr, true); + property_enable(priv->reg_base, &port_cfg->bvalid_det_en, true); + } + + return 0; +} + +static int rockchip_usb2phy_exit(struct phy *phy) +{ + struct udevice *parent = dev_get_parent(phy->dev); + struct rockchip_usb2phy *priv = dev_get_priv(parent); + + clk_disable(&priv->phyclk); + + return 0; +} + +static int rockchip_usb2phy_of_xlate(struct phy *phy, + struct ofnode_phandle_args *args) +{ + const char *name = phy->dev->name; + + if (!strcasecmp(name, "host-port")) + phy->id = USB2PHY_PORT_HOST; + else if (!strcasecmp(name, "otg-port")) + phy->id = USB2PHY_PORT_OTG; + else + dev_err(phy->dev, "improper %s device\n", name); + + return 0; +} + +static struct phy_ops rockchip_usb2phy_ops = { + .init = rockchip_usb2phy_init, + .exit = rockchip_usb2phy_exit, + .power_on = rockchip_usb2phy_power_on, + .power_off = rockchip_usb2phy_power_off, + .of_xlate = rockchip_usb2phy_of_xlate, +}; + +static int rockchip_usb2phy_probe(struct udevice *dev) +{ + struct rockchip_usb2phy *priv = dev_get_priv(dev); + const struct rockchip_usb2phy_cfg *phy_cfgs; + unsigned int reg; + int index, ret; + + priv->reg_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + if (IS_ERR(priv->reg_base)) + return PTR_ERR(priv->reg_base); + + ret = ofnode_read_u32(dev_ofnode(dev), "reg", ®); + if (ret) { + dev_err(dev, "failed to read reg property (ret = %d)\n", ret); + return ret; + } + + phy_cfgs = (const struct rockchip_usb2phy_cfg *) + dev_get_driver_data(dev); + if (!phy_cfgs) + return -EINVAL; + + /* find out a proper config which can be matched with dt. */ + index = 0; + while (phy_cfgs[index].reg) { + if (phy_cfgs[index].reg == reg) { + priv->phy_cfg = &phy_cfgs[index]; + break; + } + + ++index; + } + + if (!priv->phy_cfg) { + dev_err(dev, "failed find proper phy-cfg\n"); + return -EINVAL; + } + + ret = clk_get_by_name(dev, "phyclk", &priv->phyclk); + if (ret) { + dev_err(dev, "failed to get the phyclk (ret=%d)\n", ret); + return ret; + } + + return 0; +} + +static int rockchip_usb2phy_bind(struct udevice *dev) +{ + struct udevice *usb2phy_dev; + ofnode node; + const char *name; + int ret = 0; + + dev_for_each_subnode(node, dev) { + if (!ofnode_valid(node)) { + dev_info(dev, "subnode %s not found\n", dev->name); + return -ENXIO; + } + + name = ofnode_get_name(node); + dev_dbg(dev, "subnode %s\n", name); + + ret = device_bind_driver_to_node(dev, "rockchip_usb2phy_port", + name, node, &usb2phy_dev); + if (ret) { + dev_err(dev, + "'%s' cannot bind 'rockchip_usb2phy_port'\n", name); + return ret; + } + } + + return ret; +} + +static const struct rockchip_usb2phy_cfg rk3399_usb2phy_cfgs[] = { + { + .reg = 0xe450, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0xe454, 1, 0, 2, 1 }, + .bvalid_det_en = { 0xe3c0, 3, 3, 0, 1 }, + .bvalid_det_st = { 0xe3e0, 3, 3, 0, 1 }, + .bvalid_det_clr = { 0xe3d0, 3, 3, 0, 1 }, + .utmi_avalid = { 0xe2ac, 7, 7, 0, 1 }, + .utmi_bvalid = { 0xe2ac, 12, 12, 0, 1 }, + }, + [USB2PHY_PORT_HOST] = { + .phy_sus = { 0xe458, 1, 0, 0x2, 0x1 }, + .ls_det_en = { 0xe3c0, 6, 6, 0, 1 }, + .ls_det_st = { 0xe3e0, 6, 6, 0, 1 }, + .ls_det_clr = { 0xe3d0, 6, 6, 0, 1 }, + .utmi_ls = { 0xe2ac, 22, 21, 0, 1 }, + .utmi_hstdet = { 0xe2ac, 23, 23, 0, 1 } + } + }, + }, + { + .reg = 0xe460, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0xe464, 1, 0, 2, 1 }, + .bvalid_det_en = { 0xe3c0, 8, 8, 0, 1 }, + .bvalid_det_st = { 0xe3e0, 8, 8, 0, 1 }, + .bvalid_det_clr = { 0xe3d0, 8, 8, 0, 1 }, + .utmi_avalid = { 0xe2ac, 10, 10, 0, 1 }, + .utmi_bvalid = { 0xe2ac, 16, 16, 0, 1 }, + }, + [USB2PHY_PORT_HOST] = { + .phy_sus = { 0xe468, 1, 0, 0x2, 0x1 }, + .ls_det_en = { 0xe3c0, 11, 11, 0, 1 }, + .ls_det_st = { 0xe3e0, 11, 11, 0, 1 }, + .ls_det_clr = { 0xe3d0, 11, 11, 0, 1 }, + .utmi_ls = { 0xe2ac, 26, 25, 0, 1 }, + .utmi_hstdet = { 0xe2ac, 27, 27, 0, 1 } + } + }, + }, + { /* sentinel */ } +}; + +static const struct udevice_id rockchip_usb2phy_ids[] = { + { + .compatible = "rockchip,rk3399-usb2phy", + .data = (ulong)&rk3399_usb2phy_cfgs, + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(rockchip_usb2phy_port) = { + .name = "rockchip_usb2phy_port", + .id = UCLASS_PHY, + .ops = &rockchip_usb2phy_ops, +}; + +U_BOOT_DRIVER(rockchip_usb2phy) = { + .name = "rockchip_usb2phy", + .id = UCLASS_PHY, + .of_match = rockchip_usb2phy_ids, + .probe = rockchip_usb2phy_probe, + .bind = rockchip_usb2phy_bind, + .priv_auto_alloc_size = sizeof(struct rockchip_usb2phy), +}; From patchwork Tue May 26 03:33:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1233 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pg1-f197.google.com (mail-pg1-f197.google.com [209.85.215.197]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 38C793F08B for ; Tue, 26 May 2020 05:34:05 +0200 (CEST) Received: by mail-pg1-f197.google.com with SMTP id x132sf15484730pgx.22 for ; Mon, 25 May 2020 20:34:05 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590464043; cv=pass; d=google.com; s=arc-20160816; b=etbdjoqNVP8Imy3ceDX88RCvRAyu3a4XOQzfZA2qOiKzjXIu+g/Wq7aJHrWZ+PqGsZ 00ZgZm7HD2IdbhcBWon0YxgXJmyLMYFTtb2uSZ7skFRudV3z34hQJjWy/37rzKHYvzQF 0bMEZOtabXZ2xFgWG39bme1JRZwDHt4bChlzW32qknMbpgDwan4f8RIACOzcMGEaf46j zx3VVl/OcCo1nx175tYxY5+HFupEK8u5aXOeRbhJmt5X7adWLsCNuQqsAVrYcaW5qfOP vveKrL+11p15Eku4JL0jwqQQR5o3UefGD/3+Gs0sQk5aUTR7Ro0B5v3Ff3VMsWdW1qgV QjvA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=kjBgegJmdHw7M+nuIOiOADS9u1XfecEZKlGmVEcKXTo=; b=XAfdyyWBOYB6QMb3YapMZU0pMnQhU6hGIH9vYu7scQATr5mNe9cx2IZ+FToDZx5482 b1OoV1dAGjsAU7B5bsPyt8lffDiF9d6fZb88kCQ5ttLp6yKbQF3yn3/ekLsMw6Xiny/e f9wNI1ZGdFirphTAOF+8plbS0oujHY9rWQrfG3Ufz8o1gdr2RKIxgZk21JXeFeKUAt4v K/zn0mT5nS1HYXyPFdGQSG5L1KjDYsoZmtfabM06KIBH3klPkF9DXYn7OnjhUnQ/2nMb S4Tti5zXv5dR0hTmDh7/sFaOsbEVnh4npXRfTv9BaXHk5kXkMyWWZlM3R0pyeuATLnoX CFdA== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=kjBgegJmdHw7M+nuIOiOADS9u1XfecEZKlGmVEcKXTo=; b=N4G2IYJf/+5s0FPh20Hsy3bFP4qFlJYfRgOnIdFNaPBdCXpvvKx3A1gZvTReZir7RD 97lvV5Y1XYT+4lX1ujCIlA/WLmtYLEfpogG8QMZZG7lEXGBfK/saNouRsJY5yGAnttFS a030hdzOwcXg6CwTfvKKBub6aLpLgJYbJ5pOM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=kjBgegJmdHw7M+nuIOiOADS9u1XfecEZKlGmVEcKXTo=; b=HO/uPYF/NBHR91fqq9tikwSgPDgXQ3Y46KXomTT62mVNpj7x2XlRas1QiZxXvgOYUN lUY0RjxcGpltrGD49R8+8TyTBm2Pl5zOhDo3baaxTxq53QGg6WYdn8+qhO7X94bAfiTs MJWCp3ni9bsCNvf0SBgecceXZMf16174EPlZI72Sdl3nqdxvfPHVkcpwlB8JPwzkLYN9 fLmXsvHi4ZvCv2lqtzSSDBDAMSdYGNSKidXsdiEKaDpu7ADGcFrn8duElqOdPJb64g+V GapiVOZ6qqNZyc02FKPrOESdrxbgSmn+wmH6RevL4uSQY3qId10Nrsmh7gsPilpz+cIB 01SA== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM533lQn39seI3yqhzT27k8MNzS8LpWeq6PkfNDmNkaCOmKvrSNycl YAatpotK0tQAApAlCAXM3zYUGs2O X-Google-Smtp-Source: ABdhPJyGXjMR2wxb8DPjjyuY5QU1w2MpHYHkR6nGHVyCgXv5qq9EA5zki5yDCaFcmUcuw+vx2/vx0Q== X-Received: by 2002:a63:cf03:: with SMTP id j3mr28946634pgg.24.1590464043555; Mon, 25 May 2020 20:34:03 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:902:b702:: with SMTP id d2ls4410995pls.6.gmail; Mon, 25 May 2020 20:34:03 -0700 (PDT) X-Received: by 2002:a17:90a:7d07:: with SMTP id g7mr25659452pjl.216.1590464042360; Mon, 25 May 2020 20:34:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590464042; cv=none; d=google.com; s=arc-20160816; b=dgDYMEZUOudjk6BMLPdIwJSJNx/cnseQgsmjCNpc9dv6h6NWP+WBv95tPLSkR8Rw6c 0x/NaEn2SkWocIeL1T4P2JIeB5yXadokzyXRg4TN/7bIW6dckI3Em3zpgDOO9Ygr5bTf 2OCTo8uOpvf5QzdAZA9I53yS2mOTud5PWZaGNkk/QngKQrsyMYQR9sG2OjXVOuL8+HnW r1M5ciAuKPK0+qSxMRJ5XgOJrm42VyV4MqN6Yq1tUGsY9FvLys2er+mFaQVIzqtqmK86 M0UdamOo42TjM586jSw0fF1rv5YitwAr7tjxymzvpRNPHiFut7Rbwrxsrjo9GfPeafg4 4iAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=yWWjhQk9KNPdnR1bYUGvcaaZgGINuy8YhLa1GsXRjQU=; b=KcA6ruPbdMs6Hmq3ZXlV/usyxUeevgNwhsmkQ84lyFRRIB86OFXQprRWsOTZidB+Jh 3BN1CHhxXsnBbE5uYM2cX8GH7rp4Fa1wvAMFCE9X8OPJUSU/xjAx4GeA7USkHisS6LlP kDzsJqNURdq4JE/XjhpLV1ZamGqWf1odL3gtnFPISBhh9LZgqTzQLmOQgUUBp3AVcLN4 tcJeynD5arVE0LjvleSKsgblU50zVvX923ko2r7NBfsZFWQY/lMwdHLq9kMXbJrx90+V /37j6MQ5Ucck98f+ImfCBdFGjonN9CEUJoCpUlmJZOy+icAcedYMKzFJLQKmzx6gHAkj 2Njw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.131]) by mx.google.com with ESMTPS id x18si15226441pfa.242.2020.05.25.20.34.01 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:34:02 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) client-ip=211.157.147.131; Received: from localhost (unknown [192.168.167.8]) by lucky1.263xmail.com (Postfix) with ESMTP id 22A15A7084; Tue, 26 May 2020 11:34:00 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P21206T140696195421952S1590464037437993_; Tue, 26 May 2020 11:34:00 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <046aa731a8a7f07658875df67a1cb7ca> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com, Frank Wang Subject: [PATCH v6 06/16] phy: rockchip: Add Rockchip USB TypeC PHY driver Date: Tue, 26 May 2020 11:33:45 +0800 Message-Id: <20200526033355.20147-2-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033355.20147-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> <20200526033355.20147-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.131 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Jagan Teki Add USB TYPEC PHY driver for rockchip platform. Referenced from Linux TypeC PHY driver, currently supporting usb3-port and dp-port need to add it in the future. Signed-off-by: Frank Wang Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- drivers/phy/rockchip/Kconfig | 7 + drivers/phy/rockchip/Makefile | 1 + drivers/phy/rockchip/phy-rockchip-typec.c | 796 ++++++++++++++++++++++ 3 files changed, 804 insertions(+) create mode 100644 drivers/phy/rockchip/phy-rockchip-typec.c diff --git a/drivers/phy/rockchip/Kconfig b/drivers/phy/rockchip/Kconfig index d73ac695e1..84cc7c876d 100644 --- a/drivers/phy/rockchip/Kconfig +++ b/drivers/phy/rockchip/Kconfig @@ -11,4 +11,11 @@ config PHY_ROCKCHIP_INNO_USB2 help Support for Rockchip USB2.0 PHY with Innosilicon IP block. +config PHY_ROCKCHIP_TYPEC + bool "Rockchip TYPEC PHY Driver" + depends on ARCH_ROCKCHIP + select PHY + help + Enable this to support the Rockchip USB TYPEC PHY. + endmenu diff --git a/drivers/phy/rockchip/Makefile b/drivers/phy/rockchip/Makefile index 9b0cbc6acf..95b2f8a3c0 100644 --- a/drivers/phy/rockchip/Makefile +++ b/drivers/phy/rockchip/Makefile @@ -4,3 +4,4 @@ # obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o +obj-$(CONFIG_PHY_ROCKCHIP_TYPEC) += phy-rockchip-typec.o diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c new file mode 100644 index 0000000000..c9c8e1c542 --- /dev/null +++ b/drivers/phy/rockchip/phy-rockchip-typec.c @@ -0,0 +1,796 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * ROCKCHIP Type-C PHY driver. + * + * Copyright (C) 2020 Amarula Solutions(India) + * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd + * Author: Chris Zhong + * Kever Yang + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define usleep_range(a, b) udelay((b)) + +#define CMN_SSM_BANDGAP (0x21 << 2) +#define CMN_SSM_BIAS (0x22 << 2) +#define CMN_PLLSM0_PLLEN (0x29 << 2) +#define CMN_PLLSM0_PLLPRE (0x2a << 2) +#define CMN_PLLSM0_PLLVREF (0x2b << 2) +#define CMN_PLLSM0_PLLLOCK (0x2c << 2) +#define CMN_PLLSM1_PLLEN (0x31 << 2) +#define CMN_PLLSM1_PLLPRE (0x32 << 2) +#define CMN_PLLSM1_PLLVREF (0x33 << 2) +#define CMN_PLLSM1_PLLLOCK (0x34 << 2) +#define CMN_PLLSM1_USER_DEF_CTRL (0x37 << 2) +#define CMN_ICAL_OVRD (0xc1 << 2) +#define CMN_PLL0_VCOCAL_OVRD (0x83 << 2) +#define CMN_PLL0_VCOCAL_INIT (0x84 << 2) +#define CMN_PLL0_VCOCAL_ITER (0x85 << 2) +#define CMN_PLL0_LOCK_REFCNT_START (0x90 << 2) +#define CMN_PLL0_LOCK_PLLCNT_START (0x92 << 2) +#define CMN_PLL0_LOCK_PLLCNT_THR (0x93 << 2) +#define CMN_PLL0_INTDIV (0x94 << 2) +#define CMN_PLL0_FRACDIV (0x95 << 2) +#define CMN_PLL0_HIGH_THR (0x96 << 2) +#define CMN_PLL0_DSM_DIAG (0x97 << 2) +#define CMN_PLL0_SS_CTRL1 (0x98 << 2) +#define CMN_PLL0_SS_CTRL2 (0x99 << 2) +#define CMN_PLL1_VCOCAL_START (0xa1 << 2) +#define CMN_PLL1_VCOCAL_OVRD (0xa3 << 2) +#define CMN_PLL1_VCOCAL_INIT (0xa4 << 2) +#define CMN_PLL1_VCOCAL_ITER (0xa5 << 2) +#define CMN_PLL1_LOCK_REFCNT_START (0xb0 << 2) +#define CMN_PLL1_LOCK_PLLCNT_START (0xb2 << 2) +#define CMN_PLL1_LOCK_PLLCNT_THR (0xb3 << 2) +#define CMN_PLL1_INTDIV (0xb4 << 2) +#define CMN_PLL1_FRACDIV (0xb5 << 2) +#define CMN_PLL1_HIGH_THR (0xb6 << 2) +#define CMN_PLL1_DSM_DIAG (0xb7 << 2) +#define CMN_PLL1_SS_CTRL1 (0xb8 << 2) +#define CMN_PLL1_SS_CTRL2 (0xb9 << 2) +#define CMN_RXCAL_OVRD (0xd1 << 2) + +#define CMN_TXPUCAL_CTRL (0xe0 << 2) +#define CMN_TXPUCAL_OVRD (0xe1 << 2) +#define CMN_TXPDCAL_CTRL (0xf0 << 2) +#define CMN_TXPDCAL_OVRD (0xf1 << 2) + +/* For CMN_TXPUCAL_CTRL, CMN_TXPDCAL_CTRL */ +#define CMN_TXPXCAL_START BIT(15) +#define CMN_TXPXCAL_DONE BIT(14) +#define CMN_TXPXCAL_NO_RESPONSE BIT(13) +#define CMN_TXPXCAL_CURRENT_RESPONSE BIT(12) + +#define CMN_TXPU_ADJ_CTRL (0x108 << 2) +#define CMN_TXPD_ADJ_CTRL (0x10c << 2) + +/* + * For CMN_TXPUCAL_CTRL, CMN_TXPDCAL_CTRL, + * CMN_TXPU_ADJ_CTRL, CMN_TXPDCAL_CTRL + * + * NOTE: some of these registers are documented to be 2's complement + * signed numbers, but then documented to be always positive. Weird. + * In such a case, using CMN_CALIB_CODE_POS() avoids the unnecessary + * sign extension. + */ +#define CMN_CALIB_CODE_WIDTH 7 +#define CMN_CALIB_CODE_OFFSET 0 +#define CMN_CALIB_CODE_MASK GENMASK(CMN_CALIB_CODE_WIDTH, 0) +#define CMN_CALIB_CODE(x) \ + sign_extend32((x) >> CMN_CALIB_CODE_OFFSET, CMN_CALIB_CODE_WIDTH) + +#define CMN_CALIB_CODE_POS_MASK GENMASK(CMN_CALIB_CODE_WIDTH - 1, 0) +#define CMN_CALIB_CODE_POS(x) \ + (((x) >> CMN_CALIB_CODE_OFFSET) & CMN_CALIB_CODE_POS_MASK) + +#define CMN_DIAG_PLL0_FBH_OVRD (0x1c0 << 2) +#define CMN_DIAG_PLL0_FBL_OVRD (0x1c1 << 2) +#define CMN_DIAG_PLL0_OVRD (0x1c2 << 2) +#define CMN_DIAG_PLL0_V2I_TUNE (0x1c5 << 2) +#define CMN_DIAG_PLL0_CP_TUNE (0x1c6 << 2) +#define CMN_DIAG_PLL0_LF_PROG (0x1c7 << 2) +#define CMN_DIAG_PLL1_FBH_OVRD (0x1d0 << 2) +#define CMN_DIAG_PLL1_FBL_OVRD (0x1d1 << 2) +#define CMN_DIAG_PLL1_OVRD (0x1d2 << 2) +#define CMN_DIAG_PLL1_V2I_TUNE (0x1d5 << 2) +#define CMN_DIAG_PLL1_CP_TUNE (0x1d6 << 2) +#define CMN_DIAG_PLL1_LF_PROG (0x1d7 << 2) +#define CMN_DIAG_PLL1_PTATIS_TUNE1 (0x1d8 << 2) +#define CMN_DIAG_PLL1_PTATIS_TUNE2 (0x1d9 << 2) +#define CMN_DIAG_PLL1_INCLK_CTRL (0x1da << 2) +#define CMN_DIAG_HSCLK_SEL (0x1e0 << 2) + +#define XCVR_PSM_RCTRL(n) ((0x4001 | ((n) << 9)) << 2) +#define XCVR_PSM_CAL_TMR(n) ((0x4002 | ((n) << 9)) << 2) +#define XCVR_PSM_A0IN_TMR(n) ((0x4003 | ((n) << 9)) << 2) +#define TX_TXCC_CAL_SCLR_MULT(n) ((0x4047 | ((n) << 9)) << 2) +#define TX_TXCC_CPOST_MULT_00(n) ((0x404c | ((n) << 9)) << 2) +#define TX_TXCC_CPOST_MULT_01(n) ((0x404d | ((n) << 9)) << 2) +#define TX_TXCC_CPOST_MULT_10(n) ((0x404e | ((n) << 9)) << 2) +#define TX_TXCC_CPOST_MULT_11(n) ((0x404f | ((n) << 9)) << 2) +#define TX_TXCC_MGNFS_MULT_000(n) ((0x4050 | ((n) << 9)) << 2) +#define TX_TXCC_MGNFS_MULT_001(n) ((0x4051 | ((n) << 9)) << 2) +#define TX_TXCC_MGNFS_MULT_010(n) ((0x4052 | ((n) << 9)) << 2) +#define TX_TXCC_MGNFS_MULT_011(n) ((0x4053 | ((n) << 9)) << 2) +#define TX_TXCC_MGNFS_MULT_100(n) ((0x4054 | ((n) << 9)) << 2) +#define TX_TXCC_MGNFS_MULT_101(n) ((0x4055 | ((n) << 9)) << 2) +#define TX_TXCC_MGNFS_MULT_110(n) ((0x4056 | ((n) << 9)) << 2) +#define TX_TXCC_MGNFS_MULT_111(n) ((0x4057 | ((n) << 9)) << 2) +#define TX_TXCC_MGNLS_MULT_000(n) ((0x4058 | ((n) << 9)) << 2) +#define TX_TXCC_MGNLS_MULT_001(n) ((0x4059 | ((n) << 9)) << 2) +#define TX_TXCC_MGNLS_MULT_010(n) ((0x405a | ((n) << 9)) << 2) +#define TX_TXCC_MGNLS_MULT_011(n) ((0x405b | ((n) << 9)) << 2) +#define TX_TXCC_MGNLS_MULT_100(n) ((0x405c | ((n) << 9)) << 2) +#define TX_TXCC_MGNLS_MULT_101(n) ((0x405d | ((n) << 9)) << 2) +#define TX_TXCC_MGNLS_MULT_110(n) ((0x405e | ((n) << 9)) << 2) +#define TX_TXCC_MGNLS_MULT_111(n) ((0x405f | ((n) << 9)) << 2) + +#define XCVR_DIAG_PLLDRC_CTRL(n) ((0x40e0 | ((n) << 9)) << 2) +#define XCVR_DIAG_BIDI_CTRL(n) ((0x40e8 | ((n) << 9)) << 2) +#define XCVR_DIAG_LANE_FCM_EN_MGN(n) ((0x40f2 | ((n) << 9)) << 2) +#define TX_PSC_A0(n) ((0x4100 | ((n) << 9)) << 2) +#define TX_PSC_A1(n) ((0x4101 | ((n) << 9)) << 2) +#define TX_PSC_A2(n) ((0x4102 | ((n) << 9)) << 2) +#define TX_PSC_A3(n) ((0x4103 | ((n) << 9)) << 2) +#define TX_RCVDET_CTRL(n) ((0x4120 | ((n) << 9)) << 2) +#define TX_RCVDET_EN_TMR(n) ((0x4122 | ((n) << 9)) << 2) +#define TX_RCVDET_ST_TMR(n) ((0x4123 | ((n) << 9)) << 2) +#define TX_DIAG_TX_DRV(n) ((0x41e1 | ((n) << 9)) << 2) +#define TX_DIAG_BGREF_PREDRV_DELAY (0x41e7 << 2) + +/* Use this for "n" in macros like "_MULT_XXX" to target the aux channel */ +#define AUX_CH_LANE 8 + +#define TX_ANA_CTRL_REG_1 (0x5020 << 2) + +#define TXDA_DP_AUX_EN BIT(15) +#define AUXDA_SE_EN BIT(14) +#define TXDA_CAL_LATCH_EN BIT(13) +#define AUXDA_POLARITY BIT(12) +#define TXDA_DRV_POWER_ISOLATION_EN BIT(11) +#define TXDA_DRV_POWER_EN_PH_2_N BIT(10) +#define TXDA_DRV_POWER_EN_PH_1_N BIT(9) +#define TXDA_BGREF_EN BIT(8) +#define TXDA_DRV_LDO_EN BIT(7) +#define TXDA_DECAP_EN_DEL BIT(6) +#define TXDA_DECAP_EN BIT(5) +#define TXDA_UPHY_SUPPLY_EN_DEL BIT(4) +#define TXDA_UPHY_SUPPLY_EN BIT(3) +#define TXDA_LOW_LEAKAGE_EN BIT(2) +#define TXDA_DRV_IDLE_LOWI_EN BIT(1) +#define TXDA_DRV_CMN_MODE_EN BIT(0) + +#define TX_ANA_CTRL_REG_2 (0x5021 << 2) + +#define AUXDA_DEBOUNCING_CLK BIT(15) +#define TXDA_LPBK_RECOVERED_CLK_EN BIT(14) +#define TXDA_LPBK_ISI_GEN_EN BIT(13) +#define TXDA_LPBK_SERIAL_EN BIT(12) +#define TXDA_LPBK_LINE_EN BIT(11) +#define TXDA_DRV_LDO_REDC_SINKIQ BIT(10) +#define XCVR_DECAP_EN_DEL BIT(9) +#define XCVR_DECAP_EN BIT(8) +#define TXDA_MPHY_ENABLE_HS_NT BIT(7) +#define TXDA_MPHY_SA_MODE BIT(6) +#define TXDA_DRV_LDO_RBYR_FB_EN BIT(5) +#define TXDA_DRV_RST_PULL_DOWN BIT(4) +#define TXDA_DRV_LDO_BG_FB_EN BIT(3) +#define TXDA_DRV_LDO_BG_REF_EN BIT(2) +#define TXDA_DRV_PREDRV_EN_DEL BIT(1) +#define TXDA_DRV_PREDRV_EN BIT(0) + +#define TXDA_COEFF_CALC_CTRL (0x5022 << 2) + +#define TX_HIGH_Z BIT(6) +#define TX_VMARGIN_OFFSET 3 +#define TX_VMARGIN_MASK 0x7 +#define LOW_POWER_SWING_EN BIT(2) +#define TX_FCM_DRV_MAIN_EN BIT(1) +#define TX_FCM_FULL_MARGIN BIT(0) + +#define TX_DIG_CTRL_REG_2 (0x5024 << 2) + +#define TX_HIGH_Z_TM_EN BIT(15) +#define TX_RESCAL_CODE_OFFSET 0 +#define TX_RESCAL_CODE_MASK 0x3f + +#define TXDA_CYA_AUXDA_CYA (0x5025 << 2) +#define TX_ANA_CTRL_REG_3 (0x5026 << 2) +#define TX_ANA_CTRL_REG_4 (0x5027 << 2) +#define TX_ANA_CTRL_REG_5 (0x5029 << 2) + +#define RX_PSC_A0(n) ((0x8000 | ((n) << 9)) << 2) +#define RX_PSC_A1(n) ((0x8001 | ((n) << 9)) << 2) +#define RX_PSC_A2(n) ((0x8002 | ((n) << 9)) << 2) +#define RX_PSC_A3(n) ((0x8003 | ((n) << 9)) << 2) +#define RX_PSC_CAL(n) ((0x8006 | ((n) << 9)) << 2) +#define RX_PSC_RDY(n) ((0x8007 | ((n) << 9)) << 2) +#define RX_IQPI_ILL_CAL_OVRD (0x8023 << 2) +#define RX_EPI_ILL_CAL_OVRD (0x8033 << 2) +#define RX_SDCAL0_OVRD (0x8041 << 2) +#define RX_SDCAL1_OVRD (0x8049 << 2) +#define RX_SLC_INIT (0x806d << 2) +#define RX_SLC_RUN (0x806e << 2) +#define RX_CDRLF_CNFG2 (0x8081 << 2) +#define RX_SIGDET_HL_FILT_TMR(n) ((0x8090 | ((n) << 9)) << 2) +#define RX_SLC_IOP0_OVRD (0x8101 << 2) +#define RX_SLC_IOP1_OVRD (0x8105 << 2) +#define RX_SLC_QOP0_OVRD (0x8109 << 2) +#define RX_SLC_QOP1_OVRD (0x810d << 2) +#define RX_SLC_EOP0_OVRD (0x8111 << 2) +#define RX_SLC_EOP1_OVRD (0x8115 << 2) +#define RX_SLC_ION0_OVRD (0x8119 << 2) +#define RX_SLC_ION1_OVRD (0x811d << 2) +#define RX_SLC_QON0_OVRD (0x8121 << 2) +#define RX_SLC_QON1_OVRD (0x8125 << 2) +#define RX_SLC_EON0_OVRD (0x8129 << 2) +#define RX_SLC_EON1_OVRD (0x812d << 2) +#define RX_SLC_IEP0_OVRD (0x8131 << 2) +#define RX_SLC_IEP1_OVRD (0x8135 << 2) +#define RX_SLC_QEP0_OVRD (0x8139 << 2) +#define RX_SLC_QEP1_OVRD (0x813d << 2) +#define RX_SLC_EEP0_OVRD (0x8141 << 2) +#define RX_SLC_EEP1_OVRD (0x8145 << 2) +#define RX_SLC_IEN0_OVRD (0x8149 << 2) +#define RX_SLC_IEN1_OVRD (0x814d << 2) +#define RX_SLC_QEN0_OVRD (0x8151 << 2) +#define RX_SLC_QEN1_OVRD (0x8155 << 2) +#define RX_SLC_EEN0_OVRD (0x8159 << 2) +#define RX_SLC_EEN1_OVRD (0x815d << 2) +#define RX_REE_CTRL_DATA_MASK(n) ((0x81bb | ((n) << 9)) << 2) +#define RX_DIAG_SIGDET_TUNE(n) ((0x81dc | ((n) << 9)) << 2) +#define RX_DIAG_SC2C_DELAY (0x81e1 << 2) + +#define PMA_LANE_CFG (0xc000 << 2) +#define PIPE_CMN_CTRL1 (0xc001 << 2) +#define PIPE_CMN_CTRL2 (0xc002 << 2) +#define PIPE_COM_LOCK_CFG1 (0xc003 << 2) +#define PIPE_COM_LOCK_CFG2 (0xc004 << 2) +#define PIPE_RCV_DET_INH (0xc005 << 2) +#define DP_MODE_CTL (0xc008 << 2) +#define DP_CLK_CTL (0xc009 << 2) +#define STS (0xc00F << 2) +#define PHY_ISO_CMN_CTRL (0xc010 << 2) +#define PHY_DP_TX_CTL (0xc408 << 2) +#define PMA_CMN_CTRL1 (0xc800 << 2) +#define PHY_PMA_ISO_CMN_CTRL (0xc810 << 2) +#define PHY_ISOLATION_CTRL (0xc81f << 2) +#define PHY_PMA_ISO_XCVR_CTRL(n) ((0xcc11 | ((n) << 6)) << 2) +#define PHY_PMA_ISO_LINK_MODE(n) ((0xcc12 | ((n) << 6)) << 2) +#define PHY_PMA_ISO_PWRST_CTRL(n) ((0xcc13 | ((n) << 6)) << 2) +#define PHY_PMA_ISO_TX_DATA_LO(n) ((0xcc14 | ((n) << 6)) << 2) +#define PHY_PMA_ISO_TX_DATA_HI(n) ((0xcc15 | ((n) << 6)) << 2) +#define PHY_PMA_ISO_RX_DATA_LO(n) ((0xcc16 | ((n) << 6)) << 2) +#define PHY_PMA_ISO_RX_DATA_HI(n) ((0xcc17 | ((n) << 6)) << 2) +#define TX_BIST_CTRL(n) ((0x4140 | ((n) << 9)) << 2) +#define TX_BIST_UDDWR(n) ((0x4141 | ((n) << 9)) << 2) + +/* + * Selects which PLL clock will be driven on the analog high speed + * clock 0: PLL 0 div 1 + * clock 1: PLL 1 div 2 + */ +#define CLK_PLL_CONFIG 0X30 +#define CLK_PLL_MASK 0x33 + +#define CMN_READY BIT(0) + +#define DP_PLL_CLOCK_ENABLE BIT(2) +#define DP_PLL_ENABLE BIT(0) +#define DP_PLL_DATA_RATE_RBR ((2 << 12) | (4 << 8)) +#define DP_PLL_DATA_RATE_HBR ((2 << 12) | (4 << 8)) +#define DP_PLL_DATA_RATE_HBR2 ((1 << 12) | (2 << 8)) + +#define DP_MODE_A0 BIT(4) +#define DP_MODE_A2 BIT(6) +#define DP_MODE_ENTER_A0 0xc101 +#define DP_MODE_ENTER_A2 0xc104 + +#define PHY_MODE_SET_TIMEOUT 100000 + +#define PIN_ASSIGN_C_E 0x51d9 +#define PIN_ASSIGN_D_F 0x5100 + +#define MODE_DISCONNECT 0 +#define MODE_UFP_USB BIT(0) +#define MODE_DFP_USB BIT(1) +#define MODE_DFP_DP BIT(2) + +struct usb3phy_reg { + u32 offset; + u32 enable_bit; + u32 write_enable; +}; + +/** + * struct rockchip_usb3phy_port_cfg: usb3-phy port configuration. + * @reg: the base address for usb3-phy config. + * @typec_conn_dir: the register of type-c connector direction. + * @usb3tousb2_en: the register of type-c force usb2 to usb2 enable. + * @external_psm: the register of type-c phy external psm clock. + * @pipe_status: the register of type-c phy pipe status. + * @usb3_host_disable: the register of type-c usb3 host disable. + * @usb3_host_port: the register of type-c usb3 host port. + * @uphy_dp_sel: the register of type-c phy DP select control. + */ +struct rockchip_usb3phy_port_cfg { + unsigned int reg; + struct usb3phy_reg typec_conn_dir; + struct usb3phy_reg usb3tousb2_en; + struct usb3phy_reg external_psm; + struct usb3phy_reg pipe_status; + struct usb3phy_reg usb3_host_disable; + struct usb3phy_reg usb3_host_port; + struct usb3phy_reg uphy_dp_sel; +}; + +struct rockchip_tcphy { + void __iomem *reg_base; + void __iomem *grf_base; + struct clk clk_core; + struct clk clk_ref; + struct reset_ctl uphy_rst; + struct reset_ctl pipe_rst; + struct reset_ctl tcphy_rst; + const struct rockchip_usb3phy_port_cfg *port_cfgs; + u8 mode; +}; + +struct phy_reg { + u16 value; + u32 addr; +}; + +static struct phy_reg usb3_pll_cfg[] = { + { 0xf0, CMN_PLL0_VCOCAL_INIT }, + { 0x18, CMN_PLL0_VCOCAL_ITER }, + { 0xd0, CMN_PLL0_INTDIV }, + { 0x4a4a, CMN_PLL0_FRACDIV }, + { 0x34, CMN_PLL0_HIGH_THR }, + { 0x1ee, CMN_PLL0_SS_CTRL1 }, + { 0x7f03, CMN_PLL0_SS_CTRL2 }, + { 0x20, CMN_PLL0_DSM_DIAG }, + { 0, CMN_DIAG_PLL0_OVRD }, + { 0, CMN_DIAG_PLL0_FBH_OVRD }, + { 0, CMN_DIAG_PLL0_FBL_OVRD }, + { 0x7, CMN_DIAG_PLL0_V2I_TUNE }, + { 0x45, CMN_DIAG_PLL0_CP_TUNE }, + { 0x8, CMN_DIAG_PLL0_LF_PROG }, +}; + +static inline int property_enable(struct rockchip_tcphy *priv, + const struct usb3phy_reg *reg, bool en) +{ + u32 mask = 1 << reg->write_enable; + u32 val = en << reg->enable_bit; + + return writel(val | mask, priv->grf_base + reg->offset); +} + +static int rockchip_tcphy_get_mode(struct rockchip_tcphy *priv) +{ + /* TODO: Add proper logic to find DP or USB3 mode */ + return MODE_DFP_USB | MODE_UFP_USB; +} + +static void rockchip_tcphy_cfg_24m(struct rockchip_tcphy *priv) +{ + u32 i, rdata; + + /* + * cmn_ref_clk_sel = 3, select the 24Mhz for clk parent + * cmn_psm_clk_dig_div = 2, set the clk division to 2 + */ + writel(0x830, priv->reg_base + PMA_CMN_CTRL1); + for (i = 0; i < 4; i++) { + /* + * The following PHY configuration assumes a 24 MHz reference + * clock. + */ + writel(0x90, priv->reg_base + XCVR_DIAG_LANE_FCM_EN_MGN(i)); + writel(0x960, priv->reg_base + TX_RCVDET_EN_TMR(i)); + writel(0x30, priv->reg_base + TX_RCVDET_ST_TMR(i)); + } + + rdata = readl(priv->reg_base + CMN_DIAG_HSCLK_SEL); + rdata &= ~CLK_PLL_MASK; + rdata |= CLK_PLL_CONFIG; + writel(rdata, priv->reg_base + CMN_DIAG_HSCLK_SEL); +} + +static void rockchip_tcphy_cfg_usb3_pll(struct rockchip_tcphy *priv) +{ + u32 i; + + /* load the configuration of PLL0 */ + for (i = 0; i < ARRAY_SIZE(usb3_pll_cfg); i++) + writel(usb3_pll_cfg[i].value, + priv->reg_base + usb3_pll_cfg[i].addr); +} + +static void rockchip_tcphy_tx_usb3_cfg_lane(struct rockchip_tcphy *priv, + u32 lane) +{ + writel(0x7799, priv->reg_base + TX_PSC_A0(lane)); + writel(0x7798, priv->reg_base + TX_PSC_A1(lane)); + writel(0x5098, priv->reg_base + TX_PSC_A2(lane)); + writel(0x5098, priv->reg_base + TX_PSC_A3(lane)); + writel(0, priv->reg_base + TX_TXCC_MGNFS_MULT_000(lane)); + writel(0xbf, priv->reg_base + XCVR_DIAG_BIDI_CTRL(lane)); +} + +static void rockchip_tcphy_rx_usb3_cfg_lane(struct rockchip_tcphy *priv, + u32 lane) +{ + writel(0xa6fd, priv->reg_base + RX_PSC_A0(lane)); + writel(0xa6fd, priv->reg_base + RX_PSC_A1(lane)); + writel(0xa410, priv->reg_base + RX_PSC_A2(lane)); + writel(0x2410, priv->reg_base + RX_PSC_A3(lane)); + writel(0x23ff, priv->reg_base + RX_PSC_CAL(lane)); + writel(0x13, priv->reg_base + RX_SIGDET_HL_FILT_TMR(lane)); + writel(0x03e7, priv->reg_base + RX_REE_CTRL_DATA_MASK(lane)); + writel(0x1004, priv->reg_base + RX_DIAG_SIGDET_TUNE(lane)); + writel(0x2010, priv->reg_base + RX_PSC_RDY(lane)); + writel(0xfb, priv->reg_base + XCVR_DIAG_BIDI_CTRL(lane)); +} + +static int rockchip_tcphy_init(struct rockchip_tcphy *priv) +{ + const struct rockchip_usb3phy_port_cfg *cfg = priv->port_cfgs; + u32 val; + int ret; + + ret = clk_enable(&priv->clk_core); + if (ret) { + dev_err(phy->dev, "failed to enable core clk (ret=%d)\n", ret); + return ret; + } + + ret = clk_enable(&priv->clk_ref); + if (ret) { + dev_err(phy->dev, "failed to enable ref clk (ret=%d)\n", ret); + goto err_clk_core; + } + + ret = reset_deassert(&priv->tcphy_rst); + if (ret) { + dev_err(phy->dev, "failed to deassert uphy-tcphy reset (ret=%d)\n", + ret); + goto err_clk_ref; + } + + property_enable(priv, &cfg->typec_conn_dir, 0); + + rockchip_tcphy_cfg_24m(priv); + + rockchip_tcphy_cfg_usb3_pll(priv); + + rockchip_tcphy_tx_usb3_cfg_lane(priv, 0); + rockchip_tcphy_rx_usb3_cfg_lane(priv, 1); + + ret = reset_deassert(&priv->uphy_rst); + if (ret) { + dev_err(phy->dev, "failed to deassert uphy rst (ret=%d)\n", + ret); + goto err_tcphy_rst; + } + + ret = readl_poll_sleep_timeout(priv->reg_base + PMA_CMN_CTRL1, + val, val & CMN_READY, 10, + PHY_MODE_SET_TIMEOUT); + if (ret < 0) { + dev_err(phy->dev, "PMA Timeout!\n"); + ret = -ETIMEDOUT; + goto err_uphy_rst; + } + + ret = reset_deassert(&priv->pipe_rst); + if (ret) { + dev_err(phy->dev, "failed to deassert pipe rst (ret=%d)\n", + ret); + goto err_uphy_rst; + } + + return 0; + +err_uphy_rst: + reset_assert(&priv->uphy_rst); +err_tcphy_rst: + reset_assert(&priv->tcphy_rst); +err_clk_ref: + clk_disable(&priv->clk_ref); +err_clk_core: + clk_disable(&priv->clk_core); + return ret; +} + +static void rockchip_tcphy_exit(struct rockchip_tcphy *priv) +{ + reset_assert(&priv->tcphy_rst); + reset_assert(&priv->uphy_rst); + reset_assert(&priv->pipe_rst); + clk_disable(&priv->clk_core); + clk_disable(&priv->clk_ref); +} + +static int tcphy_cfg_usb3_to_usb2_only(struct rockchip_tcphy *priv, + bool value) +{ + const struct rockchip_usb3phy_port_cfg *cfg = priv->port_cfgs; + + property_enable(priv, &cfg->usb3tousb2_en, value); + property_enable(priv, &cfg->usb3_host_disable, value); + property_enable(priv, &cfg->usb3_host_port, !value); + + return 0; +} + +static int rockchip_usb3_phy_power_on(struct phy *phy) +{ + struct udevice *parent = dev_get_parent(phy->dev); + struct rockchip_tcphy *priv = dev_get_priv(parent); + const struct rockchip_usb3phy_port_cfg *cfg = priv->port_cfgs; + const struct usb3phy_reg *reg = &cfg->pipe_status; + int timeout, new_mode; + u32 val; + int ret; + + new_mode = rockchip_tcphy_get_mode(priv); + if (new_mode < 0) { + dev_err(phy->dev, "invalid mode %d\n", new_mode); + return new_mode; + } + + if (priv->mode == new_mode) + return 0; + + if (priv->mode == MODE_DISCONNECT) { + ret = rockchip_tcphy_init(priv); + if (ret) { + dev_err(dev, "failed to init tcphy (ret=%d)\n", ret); + return ret; + } + } + + /* wait TCPHY for pipe ready */ + for (timeout = 0; timeout < 100; timeout++) { + val = readl(priv->grf_base + reg->offset); + if (!(val & BIT(reg->enable_bit))) { + priv->mode |= new_mode & (MODE_DFP_USB | MODE_UFP_USB); + + /* enable usb3 host */ + tcphy_cfg_usb3_to_usb2_only(priv, false); + return 0; + } + usleep_range(10, 20); + } + + if (priv->mode == MODE_DISCONNECT) + rockchip_tcphy_exit(priv); + + return -ETIMEDOUT; +} + +static int rockchip_usb3_phy_power_off(struct phy *phy) +{ + struct udevice *parent = dev_get_parent(phy->dev); + struct rockchip_tcphy *priv = dev_get_priv(parent); + + tcphy_cfg_usb3_to_usb2_only(priv, false); + + if (priv->mode == MODE_DISCONNECT) + goto exit; + + priv->mode &= ~(MODE_UFP_USB | MODE_DFP_USB); + if (priv->mode == MODE_DISCONNECT) + rockchip_tcphy_exit(priv); + +exit: + return 0; +} + +static struct phy_ops rockchip_tcphy_usb3_ops = { + .power_on = rockchip_usb3_phy_power_on, + .power_off = rockchip_usb3_phy_power_off, +}; + +static void rockchip_tcphy_pre_init(struct udevice *dev) +{ + struct rockchip_tcphy *priv = dev_get_priv(dev); + const struct rockchip_usb3phy_port_cfg *cfg = priv->port_cfgs; + + reset_assert(&priv->tcphy_rst); + reset_assert(&priv->uphy_rst); + reset_assert(&priv->pipe_rst); + + /* select external psm clock */ + property_enable(priv, &cfg->external_psm, 1); + property_enable(priv, &cfg->usb3tousb2_en, 0); + + priv->mode = MODE_DISCONNECT; +} + +static int rockchip_tcphy_parse_dt(struct udevice *dev) +{ + struct rockchip_tcphy *priv = dev_get_priv(dev); + int ret; + + priv->grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + if (IS_ERR(priv->grf_base)) + return PTR_ERR(priv->grf_base); + + ret = clk_get_by_name(dev, "tcpdcore", &priv->clk_core); + if (ret) { + dev_err(dev, "failed to get tcpdcore clk (ret=%d)\n", ret); + return ret; + } + + ret = clk_get_by_name(dev, "tcpdphy-ref", &priv->clk_ref); + if (ret) { + dev_err(dev, "failed to get tcpdphy-ref clk (ret=%d)\n", ret); + return ret; + } + + ret = reset_get_by_name(dev, "uphy", &priv->uphy_rst); + if (ret) { + dev_err(dev, "failed to get uphy reset (ret=%d)\n", ret); + return ret; + } + + ret = reset_get_by_name(dev, "uphy-pipe", &priv->pipe_rst); + if (ret) { + dev_err(dev, "failed to get uphy-pipe reset (ret=%d)\n", ret); + return ret; + } + + ret = reset_get_by_name(dev, "uphy-tcphy", &priv->tcphy_rst); + if (ret) { + dev_err(dev, "failed to get uphy-tcphy reset (ret=%d)\n", ret); + return ret; + } + + return 0; +} + +static int rockchip_tcphy_probe(struct udevice *dev) +{ + struct rockchip_tcphy *priv = dev_get_priv(dev); + const struct rockchip_usb3phy_port_cfg *phy_cfgs; + unsigned int reg; + int index, ret; + + priv->reg_base = (void __iomem *)dev_read_addr(dev); + if (IS_ERR(priv->reg_base)) + return PTR_ERR(priv->reg_base); + + ret = dev_read_u32_index(dev, "reg", 1, ®); + if (ret) { + dev_err(dev, "failed to read reg property (ret = %d)\n", ret); + return ret; + } + + phy_cfgs = (const struct rockchip_usb3phy_port_cfg *) + dev_get_driver_data(dev); + if (!phy_cfgs) + return -EINVAL; + + /* find out a proper config which can be matched with dt. */ + index = 0; + while (phy_cfgs[index].reg) { + if (phy_cfgs[index].reg == reg) { + priv->port_cfgs = &phy_cfgs[index]; + break; + } + + ++index; + } + + if (!priv->port_cfgs) { + dev_err(dev, "failed find proper phy-cfg\n"); + return -EINVAL; + } + + ret = rockchip_tcphy_parse_dt(dev); + if (ret) + return ret; + + rockchip_tcphy_pre_init(dev); + + return 0; +} + +static int rockchip_tcphy_bind(struct udevice *dev) +{ + struct udevice *tcphy_dev; + ofnode node; + const char *name; + int ret = 0; + + dev_for_each_subnode(node, dev) { + if (!ofnode_valid(node)) { + dev_info(dev, "subnode %s not found\n", dev->name); + return -ENXIO; + } + + name = ofnode_get_name(node); + dev_dbg(dev, "subnode %s\n", name); + + if (!strcasecmp(name, "dp-port")) { + dev_dbg(dev, "Warning: dp-port not supported yet!\n"); + continue; + } else if (!strcasecmp(name, "usb3-port")) { + ret = device_bind_driver_to_node(dev, + "rockchip_tcphy_usb3_port", + name, node, &tcphy_dev); + if (ret) { + dev_err(dev, + "'%s' cannot bind 'rockchip_tcphy_usb3_port'\n", + name); + return ret; + } + } + } + + return ret; +} + +static const struct rockchip_usb3phy_port_cfg rk3399_typec_phy_cfgs[] = { + { + .reg = 0xff7c0000, + .typec_conn_dir = { 0xe580, 0, 16 }, + .usb3tousb2_en = { 0xe580, 3, 19 }, + .external_psm = { 0xe588, 14, 30 }, + .pipe_status = { 0xe5c0, 0, 0 }, + .usb3_host_disable = { 0x2434, 0, 16 }, + .usb3_host_port = { 0x2434, 12, 28 }, + .uphy_dp_sel = { 0x6268, 19, 19 }, + }, + { + .reg = 0xff800000, + .typec_conn_dir = { 0xe58c, 0, 16 }, + .usb3tousb2_en = { 0xe58c, 3, 19 }, + .external_psm = { 0xe594, 14, 30 }, + .pipe_status = { 0xe5c0, 16, 16 }, + .usb3_host_disable = { 0x2444, 0, 16 }, + .usb3_host_port = { 0x2444, 12, 28 }, + .uphy_dp_sel = { 0x6268, 3, 19 }, + }, + { /* sentinel */ } +}; + +static const struct udevice_id rockchip_typec_phy_ids[] = { + { + .compatible = "rockchip,rk3399-typec-phy", + .data = (ulong)&rk3399_typec_phy_cfgs, + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(rockchip_tcphy_usb3_port) = { + .name = "rockchip_tcphy_usb3_port", + .id = UCLASS_PHY, + .ops = &rockchip_tcphy_usb3_ops, +}; + +U_BOOT_DRIVER(rockchip_typec_phy) = { + .name = "rockchip_typec_phy", + .id = UCLASS_PHY, + .of_match = rockchip_typec_phy_ids, + .probe = rockchip_tcphy_probe, + .bind = rockchip_tcphy_bind, + .priv_auto_alloc_size = sizeof(struct rockchip_tcphy), +}; From patchwork Tue May 26 03:33:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1238 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 4902B3F06D for ; Tue, 26 May 2020 05:35:07 +0200 (CEST) Received: by mail-pj1-f69.google.com with SMTP id mt16sf1468902pjb.5 for ; Mon, 25 May 2020 20:35:07 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590464106; cv=pass; d=google.com; s=arc-20160816; b=W0gBFPb+URC7I1tCnnMSdBmEnowEm8Z/de78vSU91oedW3Od3TsDd+LMy6cvygRXxo gsqPup5VD5AXCnejuHQU50M2ko8uX3vfVjWPM9ffmQBHbkLNvBkNt9nwt71rorMbmIqs 7i6wczVtynYWmZWaHCE20hYsimxZ5e0Fdb1GrbLw/HZfelpE0PK57b7xefN6zgtAuafL QSmOQwg5LBFC1LO/07H7HIZKYxZFqhJT/mQQqFDAAGlZzGC+zwH+GTgqh5suIgu9WtdH r3ggEKT8bh+76JUVNowjajq39BoCKGenC5MJKiEJ+2eGNHk89nW7PayunXcYZBTXDyEc xg9Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=zQ7jV0vB5KgTwwOQY7c1thExU7kqIESeQ3qHlzGqRVg=; b=huCuFDWzsmlnqVUiY6v58GCj0uQD/X8fyguVE4mdIlEYHqg4Z1a+UdoY8khS38e6AZ Hn9qdqx5wmpKieGEHJW15ggL/WvOG2n7wLxPNvawZbaYz+CETukmKef/PsF82sBA97OX 3yCvhuilybtlCRZXOWyS/JjgWvz0zPeLwrXYO/CFRJwyFsKCoxU1AtGSGGAScwWUIFVt SNe90NotHdEocHHnfGC4tXJM5kVjTq98e6AQELhM4jf4+Qz1SiTzSxj50OJWl943JmVJ NzOEIYfMHYsOWuutgMnaESqUOfDWUe7HgWxVfiopUPAkC73p+CwXHlrDy9nSAxrelw70 8EJw== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.134 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=zQ7jV0vB5KgTwwOQY7c1thExU7kqIESeQ3qHlzGqRVg=; b=CPEkM6F/WvkaJifgjDTOeKJ1Mx04GlqO3TOHRY8lk6iIjLyTRLRYq7lziDrVRtg6Oo iDIMGeAIzF0rsbkNNQSx3l1OqUYTFnnkbR48alWMe08L6ztC+rO2KJVcHWw03Fh9ZHxg dpV+GNBCkOz5mh7CN/FWaYECJhn9Pf9tp5CWE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=zQ7jV0vB5KgTwwOQY7c1thExU7kqIESeQ3qHlzGqRVg=; b=j7BQmHGEwZi2akrm1oyrIg9LXAm8jAXeihfZreRqbJJkjjtecmut6FrHqgHloJBFrL MTbGh+7GBIAh/0VM7G/uK+l+bdjexxwfhzI+Hpxk8PLrkkKIg9Bb/WNC1XMsirUYm9Rz y0z1Ckp84oLNpRtaoC7vuVmP+EPhiT0opaDtNIQOfheepLN1WRJU4FVM0Xp/RDPwu6f4 OQU1lVolPdZdRLYONdtzOoZ7l7MM1DHOK4LUsmbM7kMniIVT4U5+iGND/qtnnlwjqeXj qc0RsGFMqAM8XgBJUCWYTmn3l6vPrTw/p0wmqMUqOMNARzk1V//AIuZcCkUNquMJjP42 HUKw== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM531MMc851BIWNGwSJVFBaLQHM8NVzEE7O9kKFfflaE5Bd8OLlXkg mL37hB9giS0f8e43bf5uDi36rUlk X-Google-Smtp-Source: ABdhPJx6xxszi3QV2X8b6bnbceXBVtZ/qSnmIplIsuCj0OzvBTTOZvQHbtjexbApsqzloKru9ox5Ow== X-Received: by 2002:a17:902:dc86:: with SMTP id n6mr31050083pld.17.1590464106056; Mon, 25 May 2020 20:35:06 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a65:63d0:: with SMTP id n16ls179596pgv.6.gmail; Mon, 25 May 2020 20:35:05 -0700 (PDT) X-Received: by 2002:a63:4d5a:: with SMTP id n26mr6323101pgl.85.1590464105377; Mon, 25 May 2020 20:35:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590464105; cv=none; d=google.com; s=arc-20160816; b=vgefGMh9jrunsbSghPnHG/b76Efb0q85zrMXNQRYwhLMZa8pjXA3LQWWfHd3SP8l2a 2c/Mg1RSLwhGYYU/Qv2Bq1TIjtiA3/C9rnTjwlORyjVbh1FoB9MqkyYA/4setggRndlJ QXOWLCcnP0aSDMu8/MPnGDf799eefOSuV72TsRNAOfRkdZF8c5QwI3Z6pH/abbrKygAr 1DqC5mcYwN3zjjkat3J95KLj8JeQ9IdFbwHORrU5DlUNj+8hnkTenI4faGc2eV6A0u86 Fg9W29FUwd7/9VGYO07+isQn7qgKQFHye06o2DeiOor9Ek0iEP70J4+ExZKC9I7x90fD MK3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=2Fzx52TZfLBERSuL4keI2pH1V2y3+3NjowmcHy9G9BE=; b=Lj9ES9YSSZcGMGHJt78jTbwAfJygzS2AV1xYE5WbEzqkwOCSG24AbJQpE2BX4dYoSo l5Gwd2eKPP79tKX9VTLcmn7fxcJ06uHq0WrcqyA9nU0BwoQD2jzFlx81dyC1/sQ7jHvm BOmX9XWAUt25iG4NnaMJiE6efkAykHu/xxz8cY+Nzk5wu/d/nYoQBHbpN2TDB6ZF6xF1 4HkZQ6525AoJ63SMM1nXaUv/0kSMPJL3xg4r9Wgy4ID3T/GRzS19poH8gsrhLYWrCFxA 0kXT6OC9aS7jXmNbVN8aBZ0FN3MTbwIrgih2glHfuNKIF3XRvn8fb3pmkxfcyl0xHFSP 8X4g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.134 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.134]) by mx.google.com with ESMTPS id bj11si15203860pjb.23.2020.05.25.20.35.04 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:35:05 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.134 as permitted sender) client-ip=211.157.147.134; Received: from localhost (unknown [192.168.167.8]) by lucky1.263xmail.com (Postfix) with ESMTP id 81A0EB0F18; Tue, 26 May 2020 11:34:02 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P21206T140696195421952S1590464037437993_; Tue, 26 May 2020 11:34:00 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <6485659e323b6519f276a53a7fa13101> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com, Frank Wang Subject: [PATCH v6 07/16] usb: dwc3: add dis_enblslpm_quirk Date: Tue, 26 May 2020 11:33:46 +0800 Message-Id: <20200526033355.20147-3-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033355.20147-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> <20200526033355.20147-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.134 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add a quirk to clear the GUSB2PHYCFG.ENBLSLPM bit, which controls whether the PHY receives the suspend signal from the controller. Refer to commit ec791d149bca("usb: dwc3: Add dis_enblslpm_quirk") in Linux Kernel. Signed-off-by: Frank Wang Reviewed-by: Kever Yang Reviewed-by: Jagan Teki Tested-by: Jagan Teki --- drivers/usb/dwc3/core.c | 6 ++++++ drivers/usb/dwc3/core.h | 2 ++ include/dwc3-uboot.h | 1 + 3 files changed, 9 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 0972e458eb..20be617fd4 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -398,6 +398,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc) if (dwc->dis_u2_susphy_quirk) reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; + if (dwc->dis_enblslpm_quirk) + reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); mdelay(100); @@ -719,6 +722,7 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev) dwc->dis_u3_susphy_quirk = dwc3_dev->dis_u3_susphy_quirk; dwc->dis_u2_susphy_quirk = dwc3_dev->dis_u2_susphy_quirk; dwc->dis_del_phy_power_chg_quirk = dwc3_dev->dis_del_phy_power_chg_quirk; + dwc->dis_enblslpm_quirk = dwc3_dev->dis_enblslpm_quirk; dwc->tx_de_emphasis_quirk = dwc3_dev->tx_de_emphasis_quirk; if (dwc3_dev->tx_de_emphasis) @@ -926,6 +930,8 @@ void dwc3_of_parse(struct dwc3 *dwc) "snps,dis_u2_susphy_quirk"); dwc->dis_del_phy_power_chg_quirk = dev_read_bool(dev, "snps,dis-del-phy-power-chg-quirk"); + dwc->dis_enblslpm_quirk = dev_read_bool(dev, + "snps,dis_enblslpm_quirk"); dwc->tx_de_emphasis_quirk = dev_read_bool(dev, "snps,tx_de_emphasis_quirk"); tmp = dev_read_u8_array_ptr(dev, "snps,tx_de_emphasis", 1); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 7f45a9c459..e76e357f1e 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -162,6 +162,7 @@ /* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) +#define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8) #define DWC3_GUSB2PHYCFG_PHYIF(n) ((n) << 3) #define DWC3_GUSB2PHYCFG_PHYIF_MASK DWC3_GUSB2PHYCFG_PHYIF(1) #define DWC3_GUSB2PHYCFG_USBTRDTIM(n) ((n) << 10) @@ -822,6 +823,7 @@ struct dwc3 { unsigned dis_u3_susphy_quirk:1; unsigned dis_u2_susphy_quirk:1; unsigned dis_del_phy_power_chg_quirk:1; + unsigned dis_enblslpm_quirk:1; unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2; diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h index ecae34bf06..98d51e05e1 100644 --- a/include/dwc3-uboot.h +++ b/include/dwc3-uboot.h @@ -34,6 +34,7 @@ struct dwc3_device { unsigned dis_u3_susphy_quirk; unsigned dis_u2_susphy_quirk; unsigned dis_del_phy_power_chg_quirk; + unsigned dis_enblslpm_quirk; unsigned tx_de_emphasis_quirk; unsigned tx_de_emphasis; int index; From patchwork Tue May 26 03:33:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1232 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pl1-f200.google.com (mail-pl1-f200.google.com [209.85.214.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 605793F1EE for ; Tue, 26 May 2020 05:34:05 +0200 (CEST) Received: by mail-pl1-f200.google.com with SMTP id s7sf1604051plp.13 for ; Mon, 25 May 2020 20:34:05 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590464044; cv=pass; d=google.com; s=arc-20160816; b=zEpZch68pb7yvmKnF0I9JXtDR0YmuCRNfkAhcMQiYXj7fBptVenXLHn04/sjkOLTR6 8VAEy2xtGJ/srvTKGTLaF+xh06fY2HpWS7MI991oBjdz4LOLyp7lSyOBlDmVNeEnp69g g0G9BAmOISzP8MB+o0UOkd5mzgofxREe5ZjaGU/JtU1wAaLAzxxz/k8GT0gAQ0PNdjpF HlBRYkr7uFfwTxaOSwz5iFZ5B4SjH+lblbiuIWQbx0eYTvBdam+RlGu5KgKPwQ79rjeZ lX4DO7nZyLfn8lKWq7vNgPqerH9JxYOnISwxAbQ6iJa316xxiU8A47MR45p2C7fa7MZg vIIA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=4AOiEItqNQBMBaG5MJlym4sDbASnhFe3lZDElJulYKI=; b=0FMlPqAv8O5PYCzT4C1rFOjw4Kwyp6HwsHUdd68zTFTqoMc8cKhSFkAdT+hF4lHF/e m4Ows+RpNsQt6FZhdU9/6BDW01yxA3U3T+rRrXfpsn28Qea+iKbAiPiMWz4hsyO/TUD4 c0RdiQeVstE9A5vkzzYeAfwP4MLkSMZfUeDoPDPVslLn0kSHZZ/u01cCG9hpxIkkaGGi guH8/FzsFu5eonnPEecl0V7b8HYgMl/WMV6UXgttg/bmpPiDY84GZBwewPMs7uZ6IvTV kyJfqKPZQRrY3nNQWWLydRSJQDB5TQfqRaUwkwP1XnwNB0qM8MYLFQv0/8pOMIlNYrfR Mx4g== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=4AOiEItqNQBMBaG5MJlym4sDbASnhFe3lZDElJulYKI=; b=E5+OnQ3X4EhmrGLiytqwzPQbQEmADL2P1R7rbqI0KzJ6IBetblxrurYPni6yToGNPN wUt0dt0N0gIWVHB9gGp8yn3Z6nzzxcgwJ29po4aFMXpP3vrNRDBiMtUZ/JLK1X4FDGwR JXwqGow/SOdBALmBY690BEnSv+R2Nj1jeRuiw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=4AOiEItqNQBMBaG5MJlym4sDbASnhFe3lZDElJulYKI=; b=JKmc5Dc1/Ps2mNOalrOEaytjJrl/g91lhONApCWQPzN54G73RwCwmvCvgvsk9jJRJW aAwxWJK04mzPoZ82A8OOEXZnekmJr2WFPTW353v3fZJoG8JMROVU+fGlVVRnN3kiqsg0 Rn4kkF+4h2F1ylCspJTLNl/GBZBksNSL9scURhRmnVlvy6h7MZxe0SDIMKp8ejJFGyj8 JJA53/1xgNzcYco+xc93fBbD8tkHpRWYdn5Viu0EZvdTnypVWNRcFE7RJhOWdbcQB69u Xlzw6H9JSaSXRLDNdrWTgIwiJa8alkqr8BGtxrievHEd3IaSYGvt82EsD2y94r8kftbK cJDg== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM532VAiYzX9xmzMI6wil7Z6E6xzUV1iY1459Rw4/aHzC7otCRaqpT aWmoyBPIBGGXvB61HsnD1npri5hI X-Google-Smtp-Source: ABdhPJxqQvaPC28ljFbMZIHR2c9jatepwD7F7S6kfM0GKHwifktds3g0IBHqyMDdRAMAKOCjUBrGHA== X-Received: by 2002:a17:90a:6a4a:: with SMTP id d10mr24478447pjm.199.1590464044156; Mon, 25 May 2020 20:34:04 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:902:8d95:: with SMTP id v21ls4419847plo.3.gmail; Mon, 25 May 2020 20:34:03 -0700 (PDT) X-Received: by 2002:a17:902:6903:: with SMTP id j3mr9315932plk.110.1590464043452; Mon, 25 May 2020 20:34:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590464043; cv=none; d=google.com; s=arc-20160816; b=xtCC5m4mGMz9lgyWqI56ku8BSAHlMO2kjUAJW1rUS+MSdlNxJGMkdxX5aA16kTqDb8 nWRv4oBa437FkWCsIVtjdZSzBCz/t1divoX9IRr2//H7zgunAWf339XnfsiXY67+spdT d3CgZgCFoqIFt12Sj6QowOKu1NqL/1Xo3NkXC391D+vgnK+bFNTkx6SfxTAXV2SFbrOq wU48zaZsg1Sb9/ACVUXqkDNgy42M2FYuHU8tZCMMWXW/+MDS9qCAHsQVr5hxzZEk7K6b GoPEFHYoBoTPzQD5Zzo3BKgosoYWZu61CvSUOVHWpi2bNT0DqL1KQxIdVVuFzEN5etYi i7yA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=voR2mC0dTFw76/rCrO/CMjej4Bfdg0/gQJz9bWnsGIU=; b=atMc7WfMOgxz9IUwD0uWeZFd5dZv+y0VFjZu8vFbQ4pSCaNBxCIE0B6L1l+htN5IKh XkX3jWUq9gWJjzyngE2bjLyckc8an45kDLPLxaEHUpNL1XuwmyhfHJLooLajiYokbDUo jKxAo/S5hNakYus3zOVQxPi6Jvjmb8jGp/N3iePsIndk4YL+v2X87IMxH8KnUmsupXlc j4lGnzBamj2WfLHnwropMggHHY+6cWgYT0sc5R4ltk1Lu7GhcHsvkXH5FLZSozAcBUyL 5NbLuUws19N4R/AuheK25cPAFvxf9XI/Emau+FSfSHkhRXp9RTRRxvRM53/Pmjl8IUax HSug== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.133]) by mx.google.com with ESMTPS id 19si15239541pli.160.2020.05.25.20.34.03 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:34:03 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) client-ip=211.157.147.133; Received: from localhost (unknown [192.168.167.8]) by lucky1.263xmail.com (Postfix) with ESMTP id 06621B72B6; Tue, 26 May 2020 11:34:02 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P21206T140696195421952S1590464037437993_; Tue, 26 May 2020 11:34:01 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <5fd96fdf29328713779c9bbcfffb4aaf> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com, Frank Wang Subject: [PATCH v6 08/16] usb: dwc3: add dis_u2_freeclk_exists_quirk Date: Tue, 26 May 2020 11:33:47 +0800 Message-Id: <20200526033355.20147-4-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033355.20147-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> <20200526033355.20147-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit, which specifies whether the USB2.0 PHY provides a free-running PHY clock, which is active when the clock control input is active. Refer to commit 27f83eeb6b42("usb: dwc3: add dis_u2_freeclk_exists_quirk") in Linux Rockchip Kernel. Signed-off-by: Frank Wang Reviewed-by: Kever Yang Reviewed-by: Jagan Teki Tested-by: Jagan Teki --- drivers/usb/dwc3/core.c | 6 ++++++ drivers/usb/dwc3/core.h | 2 ++ include/dwc3-uboot.h | 1 + 3 files changed, 9 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 20be617fd4..3cb66515a2 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -401,6 +401,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc) if (dwc->dis_enblslpm_quirk) reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; + if (dwc->dis_u2_freeclk_exists_quirk) + reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); mdelay(100); @@ -723,6 +726,7 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev) dwc->dis_u2_susphy_quirk = dwc3_dev->dis_u2_susphy_quirk; dwc->dis_del_phy_power_chg_quirk = dwc3_dev->dis_del_phy_power_chg_quirk; dwc->dis_enblslpm_quirk = dwc3_dev->dis_enblslpm_quirk; + dwc->dis_u2_freeclk_exists_quirk = dwc3_dev->dis_u2_freeclk_exists_quirk; dwc->tx_de_emphasis_quirk = dwc3_dev->tx_de_emphasis_quirk; if (dwc3_dev->tx_de_emphasis) @@ -932,6 +936,8 @@ void dwc3_of_parse(struct dwc3 *dwc) "snps,dis-del-phy-power-chg-quirk"); dwc->dis_enblslpm_quirk = dev_read_bool(dev, "snps,dis_enblslpm_quirk"); + dwc->dis_u2_freeclk_exists_quirk = dev_read_bool(dev, + "snps,dis-u2-freeclk-exists-quirk"); dwc->tx_de_emphasis_quirk = dev_read_bool(dev, "snps,tx_de_emphasis_quirk"); tmp = dev_read_u8_array_ptr(dev, "snps,tx_de_emphasis", 1); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index e76e357f1e..c5e656885a 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -161,6 +161,7 @@ /* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) +#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30) #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) #define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8) #define DWC3_GUSB2PHYCFG_PHYIF(n) ((n) << 3) @@ -824,6 +825,7 @@ struct dwc3 { unsigned dis_u2_susphy_quirk:1; unsigned dis_del_phy_power_chg_quirk:1; unsigned dis_enblslpm_quirk:1; + unsigned dis_u2_freeclk_exists_quirk:1; unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2; diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h index 98d51e05e1..193d225d31 100644 --- a/include/dwc3-uboot.h +++ b/include/dwc3-uboot.h @@ -35,6 +35,7 @@ struct dwc3_device { unsigned dis_u2_susphy_quirk; unsigned dis_del_phy_power_chg_quirk; unsigned dis_enblslpm_quirk; + unsigned dis_u2_freeclk_exists_quirk; unsigned tx_de_emphasis_quirk; unsigned tx_de_emphasis; int index; From patchwork Tue May 26 03:33:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1235 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-oi1-f197.google.com (mail-oi1-f197.google.com [209.85.167.197]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 75D463F08B for ; Tue, 26 May 2020 05:34:37 +0200 (CEST) Received: by mail-oi1-f197.google.com with SMTP id j19sf10468937oie.18 for ; Mon, 25 May 2020 20:34:37 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590464076; cv=pass; d=google.com; s=arc-20160816; b=BCbaCYY0D+Kv7ZvcD+xFYkljDTH0IlFOVsWsUp/k4k5zjV/Ucbiz1AbLMbW5jK6iKA DNWfGUDY1nCL45+yJXfc/iBpky/jXdePr9yylPUV35GAfmSl61d1x8njKfIn73IEiuLK u5+lqxHyzS39rf9eJJbxpENVzxU2nAsGi2Nv1qtAUkGmxM4vDTu0VkUdhLX/VFYVfiHp NldbWkp2yOX5RGqL8za96bb36Xec3rstD5jIYQnaOgs/qulc5r9c7bwAeFDvFE9BqjVC 5Y7ap9fhnHFQjSBx1/rc3TyV7yxzgIL1ODUDHZZcg05y9HZ8+ZlZfmuEg6EWoWrBc6fd 8Y6w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=kClJgjr8bjDp5sHMvaITzAHaOpC+ipkC4vPrvkEm6Tk=; b=fosg5Kfe23PGCfTut6FRl7T3PBXRT1o+9hZSCZimeORs1gfynlfbWRMsMY004PbvSJ 0ZxcZBUt+ew2xggMtu2Gk/hYidW1D5bTEhkDk7CO/EuOVRnL6/2WgjbFjNrVHMia8x2V TzWwvN65UvLb6Cn6gIIk3KWWjlJqC/HxGbzsnE1onIFOrpz1rPW/+ZRQgTOrOOkpHIhA CyVqhfgG6Jcq6d7WUraplqXr1hiG3YLyOSz1zcmdVQizkmv/ehVgpZI6dvf22P/AfWu6 vZ2GKDD+Uo/7UbYYqzyIJdj3YCPfabmvPhnoLeMcdCo1Z4fd/3LTN2AoNfP3UMS4U+OG tnlg== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=kClJgjr8bjDp5sHMvaITzAHaOpC+ipkC4vPrvkEm6Tk=; b=bHZmf12pR487m7R64iYXMMperN2qAQj7Ura/sKZDne+6dRulTdpM7cQmFy9Ipn8wpn lbVjF70IFyDZVMp+kiWlvLDdbBWARgyJ6bzEe98DY5C6+5sxg4Vy4tORSIX0dQZ0uwMV 41UZyw0hpx5EXO6ncY/Wq62/jL8/Pv95lRe04= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=kClJgjr8bjDp5sHMvaITzAHaOpC+ipkC4vPrvkEm6Tk=; b=dqMp731IbJZL0KndEsc1H8ESTnoOl1GFplPPTRuU77DtPzAuJUAzc7M6RmZ2aSbqwR /iNwzuFY2c6KMHOwxOJUtRiYaPbknAycSlMWLZj7LkXo/3d39Wdif1OyAT/64MQzcNwU t1312H7o2hv2DPF6Dmp9Vy7B4RWNJmPg0KxUnQPWC4HIvzMUTeiUV4gVHJMY4LZyqXAP uqdMaKRPN6JJ0QRyvySZgjB0DY63wyAFfaS9uvy+u8aWSCnMG4UXf0nBO+QXw7fY7qCQ ew7RV5eppeX8msGIJwudIu6zn9LK7bbduZqmXMftCnNquipNY1PCndhY7mqDJpEAEjsF zUQA== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM533DoGfjk1nHToMTDwVLP50Q/O6n0WcgoJtxiyD9z8MvUsGORLrH FsQaIq4E6o2ZbwHFv5b4jz9kymh2 X-Google-Smtp-Source: ABdhPJx/3vuHYngmcMehhntqIjOBvgXBwe9l2NkEbrJ/V/xyiiNBjr+ubj3oHj/DhebafsVYdTO1qQ== X-Received: by 2002:a4a:3556:: with SMTP id w22mr15228246oog.20.1590464075806; Mon, 25 May 2020 20:34:35 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:aca:c7d2:: with SMTP id x201ls1812462oif.8.gmail; Mon, 25 May 2020 20:34:35 -0700 (PDT) X-Received: by 2002:aca:914:: with SMTP id 20mr12418645oij.50.1590464075423; Mon, 25 May 2020 20:34:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590464075; cv=none; d=google.com; s=arc-20160816; b=PVTTtRYy1zmvfvU9bvc/XFjSoPA0HaPKKN6OiUccXQRtDtfNGVSTg2jGqKA6v7esgt bSOIVKx3eLpmOAzCCA/ReF7J9O+VhL3DV2G3PNQudBVzTbErHXHKR9JABnhQ9FgI8D0L SST3f9GhFbktRNwAIHwEEMwoWH6ECkleR2lK4YOMndujzH960BFqlJZ/kQz4Jezi70QB U+PQbCxQQ12gxnp3dXWjwEQ0qd2c1vKX/wbZ8w6eENtwRqmqE4Dyn13txlIAm7zo72IT JH8c1I/xv/gl7VEX9aZ5Xh74sjztdDVcEYLy3fGoFzSEckqohnig29yaflbSlCl0Ma4V I6DQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=snZMI4/K4p7HjIIwqrL2hzmEz4B1zzx2T00UTmMIKRs=; b=YhdadIad6GMy5E+MCmM28LnZvp+SxK5d2ZVKaO8Oo+rTwhR9yFtvjf2nrB+DObbSrt B8Mo+MKDT4bRq/qEnkWVYByv8s3trBZp8UlmmdXUV5nO95L9dOdJas04YhL2zdgUR4cJ 4lBF5qeDfTuS0UQoLux2mPxox9tIxInkHVHtrI2WE6ippoKGm5PDUWv9EWVgh3T4BMzS n1LZUe26ZKG1OV+EiD5Id4in7nDXJCl5OasPB75SAcGgxXw2GrgYsvUHKRc/ouXFxyA4 dvTLFpPy2+3j5NMoTFkUuVefYbNF1xMJsITjzCQWV3+VQUmCuAi/ppZ7sL+/9dIA60Na XLkw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.133]) by mx.google.com with ESMTPS id c16si4091280oib.73.2020.05.25.20.34.34 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:34:35 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) client-ip=211.157.147.133; Received: from localhost (unknown [192.168.167.8]) by lucky1.263xmail.com (Postfix) with ESMTP id 102BEB71C1; Tue, 26 May 2020 11:34:03 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P21206T140696195421952S1590464037437993_; Tue, 26 May 2020 11:34:02 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <3dd4d80d440b51edeb3d49142fbb629b> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com Subject: [PATCH v6 09/16] usb: dwc3: Add disable u2mac linestate check quirk Date: Tue, 26 May 2020 11:33:48 +0800 Message-Id: <20200526033355.20147-5-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033355.20147-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> <20200526033355.20147-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Jagan Teki This patch adds a quirk to disable USB 2.0 MAC linestate check during HS transmit. Refer the dwc3 databook, we can use it for some special platforms if the linestate not reflect the expected line state(J) during transmission. When use this quirk, the controller implements a fixed 40-bit TxEndDelay after the packet is given on UTMI and ignores the linestate during the transmit of a token (during token-to-token and token-to-data IPGAP). On some rockchip platforms (e.g. rk3399), it requires to disable the u2mac linestate check to decrease the SSPLIT token to SETUP token inter-packet delay from 566ns to 466ns, and fix the issue that FS/LS devices not recognized if inserted through USB 3.0 HUB. Reference from below Linux commit, commit <65db7a0c9816> ("usb: dwc3: add disable u2mac linestate check quirk") Cc: Marek Vasut Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- drivers/usb/dwc3/core.c | 20 ++++++++++++++++++++ drivers/usb/dwc3/core.h | 7 +++++++ include/dwc3-uboot.h | 1 + 3 files changed, 28 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 3cb66515a2..dc92f471c1 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -725,6 +725,7 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev) dwc->dis_u3_susphy_quirk = dwc3_dev->dis_u3_susphy_quirk; dwc->dis_u2_susphy_quirk = dwc3_dev->dis_u2_susphy_quirk; dwc->dis_del_phy_power_chg_quirk = dwc3_dev->dis_del_phy_power_chg_quirk; + dwc->dis_tx_ipgap_linecheck_quirk = dwc3_dev->dis_tx_ipgap_linecheck_quirk; dwc->dis_enblslpm_quirk = dwc3_dev->dis_enblslpm_quirk; dwc->dis_u2_freeclk_exists_quirk = dwc3_dev->dis_u2_freeclk_exists_quirk; @@ -934,6 +935,8 @@ void dwc3_of_parse(struct dwc3 *dwc) "snps,dis_u2_susphy_quirk"); dwc->dis_del_phy_power_chg_quirk = dev_read_bool(dev, "snps,dis-del-phy-power-chg-quirk"); + dwc->dis_tx_ipgap_linecheck_quirk = dev_read_bool(dev, + "snps,dis-tx-ipgap-linecheck-quirk"); dwc->dis_enblslpm_quirk = dev_read_bool(dev, "snps,dis_enblslpm_quirk"); dwc->dis_u2_freeclk_exists_quirk = dev_read_bool(dev, @@ -954,6 +957,7 @@ void dwc3_of_parse(struct dwc3 *dwc) int dwc3_init(struct dwc3 *dwc) { int ret; + u32 reg; dwc3_cache_hwparams(dwc); @@ -975,6 +979,22 @@ int dwc3_init(struct dwc3 *dwc) goto event_fail; } + if (dwc->revision >= DWC3_REVISION_250A) { + reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); + + /* + * Enable hardware control of sending remote wakeup + * in HS when the device is in the L1 state. + */ + if (dwc->revision >= DWC3_REVISION_290A) + reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW; + + if (dwc->dis_tx_ipgap_linecheck_quirk) + reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS; + + dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); + } + ret = dwc3_core_init_mode(dwc); if (ret) goto mode_fail; diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index c5e656885a..b510d8a983 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -73,6 +73,7 @@ #define DWC3_GCTL 0xc110 #define DWC3_GEVTEN 0xc114 #define DWC3_GSTS 0xc118 +#define DWC3_GUCTL1 0xc11c #define DWC3_GSNPSID 0xc120 #define DWC3_GGPIO 0xc124 #define DWC3_GUID 0xc128 @@ -159,6 +160,10 @@ #define DWC3_GCTL_GBLHIBERNATIONEN (1 << 1) #define DWC3_GCTL_DSBLCLKGTNG (1 << 0) +/* Global User Control 1 Register */ +#define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28) +#define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW BIT(24) + /* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) #define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30) @@ -771,6 +776,7 @@ struct dwc3 { #define DWC3_REVISION_260A 0x5533260a #define DWC3_REVISION_270A 0x5533270a #define DWC3_REVISION_280A 0x5533280a +#define DWC3_REVISION_290A 0x5533290a enum dwc3_ep0_next ep0_next_event; enum dwc3_ep0_state ep0state; @@ -824,6 +830,7 @@ struct dwc3 { unsigned dis_u3_susphy_quirk:1; unsigned dis_u2_susphy_quirk:1; unsigned dis_del_phy_power_chg_quirk:1; + unsigned dis_tx_ipgap_linecheck_quirk:1; unsigned dis_enblslpm_quirk:1; unsigned dis_u2_freeclk_exists_quirk:1; diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h index 193d225d31..e08530ec4e 100644 --- a/include/dwc3-uboot.h +++ b/include/dwc3-uboot.h @@ -34,6 +34,7 @@ struct dwc3_device { unsigned dis_u3_susphy_quirk; unsigned dis_u2_susphy_quirk; unsigned dis_del_phy_power_chg_quirk; + unsigned dis_tx_ipgap_linecheck_quirk; unsigned dis_enblslpm_quirk; unsigned dis_u2_freeclk_exists_quirk; unsigned tx_de_emphasis_quirk; From patchwork Tue May 26 03:34:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1236 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f198.google.com (mail-pf1-f198.google.com [209.85.210.198]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 408583F08B for ; Tue, 26 May 2020 05:34:42 +0200 (CEST) Received: by mail-pf1-f198.google.com with SMTP id r23sf15817686pfc.3 for ; Mon, 25 May 2020 20:34:42 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590464081; cv=pass; d=google.com; s=arc-20160816; b=oUkZMxxAgPb7Z1Hw2JNUWUkn0973ThybO0hty9KFkobJW6gR6yDveK5ibGT2roWMwa imMQV8k3XjiIAs0EkRFOiWoKULAciM+CFIooaC0s0gtwq8dQT26CDbhu9c4QbmT45KWR YEVOQfpf1yoZmCP0P8vgAEWJzU01WABvFlJkcRrD5AKKKAmSgNedKbljnKys4exdNKcL I/WZ+fOmVB+zis79fxpluok/01i6busRtgv2E4Gp1rWkLczzR0lbaaZiMDhdVpkkaQzK hybSGvzbzFYAcesdMSfHYaqiENzIAicXdJ6LBJUM1CM2lLoV8hvHjMfTEI0+c71l7TDC 5CNw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=Zlo7QvV1kHhSXx3EE8qqugAVRt7klytA8rvkMUhc0w8=; b=ofyNzSBjo7jUpkViYg43+1L/aB8PF67mMGhXMCJR/8vxmPsQVN7Z9QWDMX+sf7ekWi cQCMUIrsnGVs3RevJiwBuDE4Y0SUOZY/DXKnqaKudnck2gUmjVhtHpaC2sLLzfhe6o2b FjMD7rxyyFdWheWPYVFDy+J+p5Z9/ZUjwl2D7BQKrfk3W0hEY0GQHIUFM+rlFCiTZ8Sl WxKQh3ZdmSiK7unNNp5+VBVp/Q37eb07Uf5E/OW6kzB4Y5eK0LdRKaDShO28E6PTA47V PmUPrB+wgK4yP/i0BkX29ZqzPNdvWPkZDSyTMsYY+97J2qQ0ILq5gBe8jnedSKddFLcm mpHg== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.130 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=Zlo7QvV1kHhSXx3EE8qqugAVRt7klytA8rvkMUhc0w8=; b=m4Dl2MROjf78vln980ToJm1opMSttva9pwnZcMBOY/ixyhU9FJ8sPRzAsJbLZ3SxH0 yFcHAro1f0/MZHr4dTiPfnrnjyfNmaX/2RD3Kj7ZkkfwQLs6BOUa6upDWQoBom6KGXsc Ui1sRj5yEdQmoNM6tK56oVJKmh9vuw4ZdUNTY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=Zlo7QvV1kHhSXx3EE8qqugAVRt7klytA8rvkMUhc0w8=; b=CJspawxr29mM2PPEYcdSMYW7Ce8SCmy+Ja8YHmvJvedGn/JeUizQ78etL4n/rr9smQ /+Ll2Q7BvLxVzWomqOYvt3oJTC7ujtZunMjqNyYpcvmDK2lOfFQAawVIj9HjYTy5v0WY yGwNblkUvPpkxOSMhe0DXJaf2BbJ6hlLHIWRozpb4KBGJDp2zosrSidchR5fPKaAjxjh CiBjKGPxuHXllXLKn0aob/m2VnbagzhqKr9+ZF4uphtbsu0BZyDIt19x561maEcRCzQm 0ttAbsD8Qsokf4bBcp0+L7Y+xLu8nIX6VLwTg4Ba2lvF/gaxrHQDQeRl0QTixgIYuH/g 0bYw== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM5338SkcL87IliswJA+Tvh++NlklEszEy/Lelp7u5zD5Ovn8OhXk9 qfN4F8c8qi4L6V0kC80VMIlvBSb9 X-Google-Smtp-Source: ABdhPJxowJs6zI6cRo3CoLSI7wqrFWNQ5O8hEh4AH5C9rcdwXQTMR3cqZAQRIxdXs4jhxk+qnUQYBQ== X-Received: by 2002:a17:90a:c78f:: with SMTP id gn15mr23822959pjb.103.1590464081070; Mon, 25 May 2020 20:34:41 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a65:5649:: with SMTP id m9ls3257935pgs.7.gmail; Mon, 25 May 2020 20:34:40 -0700 (PDT) X-Received: by 2002:aa7:84d8:: with SMTP id x24mr16614015pfn.104.1590464080387; Mon, 25 May 2020 20:34:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590464080; cv=none; d=google.com; s=arc-20160816; b=fcY6kTBDvZLZ3NuZMzxLnHYvOGZtdxSD8fNec6yRAo78i7llUPc8HuSr2gaPWYgTzG ZVBfgJi7q3rqg/cf24hMV+8rzABz/bJpdLz3EBUPKItSAtJ2ief+d/hAcF85R5y+wDNb QjAMiNfXEKb+r1jU6YDOEa7j1nyAmqOI0wBdqeFRt7Lrke+1F5JFVXQTxXLG2dn6vuAF /e8NSGI/O6Pk6XizYxYRrt1FUOZqyk9j3hnwDyCHvwUQzVo5mJkPzmT1R+/rKsvcZgxj eG2FWfBT3xuP5rTao7Nl8bVj0gYRbTKF48fPSzIlJHNDOfH6kH3kPdqQVIarE8QrdVdl dw4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=NcBR2203OCGCZzw/Awt+z1yvI16aF8IHG5nihiY7o8Q=; b=twd+fsLGE09K3M6FlNdmuAZnRekvoQ4CSsOqVXCLEtAIj/vYI3VSGLFYavjA7vJh4/ 1AKESniJ1h83fnlOcrvt4v/KXamEgKWIc2opZOJY5lBYEeKk0ITVcPajC0ttLQOQYnaA KZSUJtAkRbN6qTl5gQm6ixrWJuHZP4Prs4Vne9sktuxny+fZtgJhIcrGjrnLq6TJjjba nveckHvRRfutV6IjzKylqrX37hwmXg0hAVG0YIv2FyTFnagjoX5ZCKUXNtX29G7wuGVA 0JGY3azf5sBJpYJYackG9rv56Jf4sjZcbzdPhA46v86Jpf3hd2lsyQqmJXMfFmEw0e4g r9Eg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.130 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.130]) by mx.google.com with ESMTPS id y130si16058412pfg.71.2020.05.25.20.34.40 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:34:40 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.130 as permitted sender) client-ip=211.157.147.130; Received: from localhost (unknown [192.168.167.209]) by lucky1.263xmail.com (Postfix) with ESMTP id 1804CBB94C; Tue, 26 May 2020 11:34:39 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P10491T139788594689792S1590464077143166_; Tue, 26 May 2020 11:34:38 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com Subject: [PATCH v6 10/16] usb: dwc3: Enable AutoRetry feature in the controller Date: Tue, 26 May 2020 11:34:29 +0800 Message-Id: <20200526033435.20235-1-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033220.20047-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.130 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Jagan Teki By default when core sees any transaction error (CRC or overflow) it replies with terminating retry ACK (Retry=1 and Nump == 0). Enabling this Auto Retry feature in controller will make the core send a non-terminanting ACK upon such transaction errors. That is, ACK TP with Retry=1 and Nump != 0. Doing so will give controller a chance to recover from transient error conditions. Reference from below Linux commit, commit ("usb: dwc3: core: Enable AutoRetry feature in the controller") Cc: Marek Vasut Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- drivers/usb/dwc3/core.c | 9 +++++++++ drivers/usb/dwc3/core.h | 3 +++ 2 files changed, 12 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index dc92f471c1..aab6c34c2d 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -995,6 +995,15 @@ int dwc3_init(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); } + if (dwc->dr_mode == USB_DR_MODE_HOST || + dwc->dr_mode == USB_DR_MODE_OTG) { + reg = dwc3_readl(dwc->regs, DWC3_GUCTL); + + reg |= DWC3_GUCTL_HSTINAUTORETRY; + + dwc3_writel(dwc->regs, DWC3_GUCTL, reg); + } + ret = dwc3_core_init_mode(dwc); if (ret) goto mode_fail; diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index b510d8a983..2adcaf0029 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -160,6 +160,9 @@ #define DWC3_GCTL_GBLHIBERNATIONEN (1 << 1) #define DWC3_GCTL_DSBLCLKGTNG (1 << 0) +/* Global User Control Register */ +#define DWC3_GUCTL_HSTINAUTORETRY BIT(14) + /* Global User Control 1 Register */ #define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28) #define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW BIT(24) From patchwork Tue May 26 03:34:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1237 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pl1-f200.google.com (mail-pl1-f200.google.com [209.85.214.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id C8C0D3F08B for ; Tue, 26 May 2020 05:34:43 +0200 (CEST) Received: by mail-pl1-f200.google.com with SMTP id y1sf14721516plt.20 for ; Mon, 25 May 2020 20:34:43 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590464082; cv=pass; d=google.com; s=arc-20160816; b=NJOJpvPRQzjxbfpKAtlQ8ZPlEOtRHM+CRLJAMdPxP2B2XQ1ZLTA0gxm9sp0GA6eR7y 9kE2AjJs5t08BDNSuFmKtUJaLtTGmHVAo0LOqUWMpoyNxhzVLKXIZb3CmzKUXOg2sWOS n7/GPBcxJ8oaUnOhOzqCUalmpf5aozTSdrlx2TzWnF9qwqCHvUvZl51bFcWrYcmz5g1f 9RyLorfWTPVDblmC9c5HkKTGMDxk60spxWwy8874w6TmeHHK/2MaTQlcOUGgHl135Y8i kc1M22RAqey/Dtj3n53HzPR1ea5S/HbruYWc4eZrFc1srL4L05dT/ezB/J+0JLa8Fj5Z p/0w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=Y+t9WiIYNgMGLObOa5j65NZsgsFCAMB3iKOgw7HWQc0=; b=NLVM7rDdBBW0ngxWQnZuzFcLPTTSHZlZF7bI5vOzpERKKgc1Lge2wihMiowpua+PC1 o2/dVl1N3ifqm1w6OmTyCAEeUuMhgYMx5kNpwWycoCJHHTsJV0asCaqHi+eaVTBoi/iO sz+WV4tL/E/TeZfUVUTRWH2oNU2NK3CeytXDXgQqZ7IvJyGPbxAuX/sPbkLVs0WLyY8r 3YVv1z777gGiAuwVRxlvQNq42AJdxQvwaMIsUoIBTlfKxLPcJPFgmvMc3jBZ82Yh+Z8a N7wy9/EWWitCfdIqkTdtbKnmXpWxNBm/bArjn5uUXI611lRBNaIgTToJcVGKlhNT14rO 9Mqg== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.135 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=Y+t9WiIYNgMGLObOa5j65NZsgsFCAMB3iKOgw7HWQc0=; b=GEViGD2QworVNTPlm6pBO50FG/Iu/X3PYBk9ulQlETzChz9ljkt+UiySb0qqG9mXy9 X3N9Zo38ZpiQOLpQ5APiuTokGv4fJQMvWR5bMa9I3Xs+ELJqjJUhWAnpUxRT9MQJGzxW mcgQ8a63kJJRvj57i3+ZF4d3wZKExjkWv809w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=Y+t9WiIYNgMGLObOa5j65NZsgsFCAMB3iKOgw7HWQc0=; b=No2em6QSMRWHrHi9STtMVRu3LbA9vVPdW14mGu0d9QCVaZputRYWrfO3MzyYNTpFkE T4L3yLBWQDbDAvvwPI7N72ARw7IMUGwd2BEDjekGpq1qYjFVWw7rn1509jb89W3hvDQH 3W172x2XC1S6+F+T5f49gn1rfDqz58H/wNhyb2IKCK81myvlQLCqOYL4IUANlbp5lH20 oIIJZMbGtngrewWT5KGWiJ1vEQDf5IJxGRW9lDdAKWE8wxn15cOWl7StyjqYBXz+/sNZ 9T+X9ukCe7PrjffOj8Mi3VlAxsdSGyDJpV4RdBfquhnfi211kC23k9+hwLncXPltyz0N EUsw== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM533ToGgjawctwqZMdc06rnk1xTy3yRW8+XH7gha4c8eEwQ0R8MOj bAJnmiUmGyVJnVOqNrkYdG5NTfBL X-Google-Smtp-Source: ABdhPJxdu7JI5xMect2WGxaP7FBBv0MgwSc0bHtNU1scbVn/s1gOytAOHwzk4wKyZnXWLw9Pl3MT+g== X-Received: by 2002:a17:90a:c7c9:: with SMTP id gf9mr24498666pjb.19.1590464082286; Mon, 25 May 2020 20:34:42 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:90a:c086:: with SMTP id o6ls5337797pjs.0.canary-gmail; Mon, 25 May 2020 20:34:41 -0700 (PDT) X-Received: by 2002:a17:90a:aa8f:: with SMTP id l15mr19362562pjq.156.1590464081624; Mon, 25 May 2020 20:34:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590464081; cv=none; d=google.com; s=arc-20160816; b=RUR2MPoabCKxVFxfN69KYFEj2twCa5itRahPT5r5smNntuvEwebCJMRaqlQ/fTmIv7 fe5r9y+pz1qvYE1++qi9VMY09Jj1qIBoQIlZQVD4/qhOXNFOMj7UycXvB/+yeD4X42Xy en3mU+U6qBQx2RO3vOqV1QhuTSJCXzSUs96WKItF9I7Mb7G+hLjPbU/rcixnhJ5yvU4c qF4hW4cGEUu44KRsZTv93lfLH8RfoRQa4EJnaO4DCyk1YxdFsQeSF55Z+ylSlcceTcTh z9sUWgUVh+sVF5ij87uBCyzcMbHnazcMCmPfNTuMKKQMV+/NUq0NwJjdctyIwwow8s1l QSGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=DmO9DBjp+hKN7UwAEdLFRtwja++CTi65mocqrIvVcvg=; b=Yf4wqUTqgdytGhQUkemWGKz/ZI7gwqrZUcj8qXXdGuMS5mONZjh6z/XN987Dwl+4Tp zBJkXVvufX5bBwu653xTNR13hSmy4VT5aAUaGwXMTxvNhubK7s+ydJudILPZChodULmY OtUGie7lvRk4JTJL2VfpCv6apKpoMo+0GYCyB5UwPk461a5Ur5+DcSKkrvtPlyPoOgap K/XBqEiuqsA7oYrQxe8akzOxiysZDgbk2bVPyJNa/zGuHDYlT+tChruJxxVCMRDkCrI5 OmJRX3kvRM3U9sPo9IVz8MsqhCUTjRiEs+pCGVqj4Qp5AyUGYDUXAUnFiXzUBmtkshuF eLBw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.135 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.135]) by mx.google.com with ESMTPS id l18si14618978plk.26.2020.05.25.20.34.41 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:34:41 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.135 as permitted sender) client-ip=211.157.147.135; Received: from localhost (unknown [192.168.167.209]) by lucky1.263xmail.com (Postfix) with ESMTP id 89D6B900EA; Tue, 26 May 2020 11:34:39 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P10491T139788594689792S1590464077143166_; Tue, 26 May 2020 11:34:39 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <2e5546b18a99e6917f78081c8684dea3> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com, Frank Wang Subject: [PATCH v6 11/16] usb: dwc3: amend UTMI/UTMIW phy interface setup Date: Tue, 26 May 2020 11:34:30 +0800 Message-Id: <20200526033435.20235-2-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033435.20235-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> <20200526033435.20235-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.135 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Let move 8/16-bit UTMI+ interface initialization into DWC3 core init that is convenient for both DM_USB and u-boot traditional process. Signed-off-by: Frank Wang Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- drivers/usb/common/common.c | 25 ++++++++++++++ drivers/usb/dwc3/core.c | 65 +++++++++++++++++++------------------ drivers/usb/dwc3/core.h | 5 +++ include/linux/usb/phy.h | 18 ++++++++++ 4 files changed, 82 insertions(+), 31 deletions(-) diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c index 0db281b970..d4ae18693c 100644 --- a/drivers/usb/common/common.c +++ b/drivers/usb/common/common.c @@ -10,6 +10,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -64,3 +65,27 @@ enum usb_device_speed usb_get_maximum_speed(ofnode node) return USB_SPEED_UNKNOWN; } + +#if CONFIG_IS_ENABLED(DM_USB) +static const char *const usbphy_modes[] = { + [USBPHY_INTERFACE_MODE_UNKNOWN] = "", + [USBPHY_INTERFACE_MODE_UTMI] = "utmi", + [USBPHY_INTERFACE_MODE_UTMIW] = "utmi_wide", +}; + +enum usb_phy_interface usb_get_phy_mode(ofnode node) +{ + const char *phy_type; + int i; + + phy_type = ofnode_get_property(node, "phy_type", NULL); + if (!phy_type) + return USBPHY_INTERFACE_MODE_UNKNOWN; + + for (i = 0; i < ARRAY_SIZE(usbphy_modes); i++) + if (!strcmp(phy_type, usbphy_modes[i])) + return i; + + return USBPHY_INTERFACE_MODE_UNKNOWN; +} +#endif diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index aab6c34c2d..c8cb9e13b2 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -334,6 +334,34 @@ static void dwc3_cache_hwparams(struct dwc3 *dwc) parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8); } +static void dwc3_hsphy_mode_setup(struct dwc3 *dwc) +{ + enum usb_phy_interface hsphy_mode = dwc->hsphy_mode; + u32 reg; + + /* Set dwc3 usb2 phy config */ + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); + + switch (hsphy_mode) { + case USBPHY_INTERFACE_MODE_UTMI: + reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | + DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); + reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) | + DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT); + break; + case USBPHY_INTERFACE_MODE_UTMIW: + reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | + DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); + reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) | + DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT); + break; + default: + break; + } + + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); +} + /** * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core * @dwc: Pointer to our controller context structure @@ -382,6 +410,8 @@ static void dwc3_phy_setup(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); + dwc3_hsphy_mode_setup(dwc); + mdelay(100); reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); @@ -626,35 +656,6 @@ static void dwc3_core_exit_mode(struct dwc3 *dwc) dwc3_gadget_run(dwc); } -static void dwc3_uboot_hsphy_mode(struct dwc3_device *dwc3_dev, - struct dwc3 *dwc) -{ - enum usb_phy_interface hsphy_mode = dwc3_dev->hsphy_mode; - u32 reg; - - /* Set dwc3 usb2 phy config */ - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); - - switch (hsphy_mode) { - case USBPHY_INTERFACE_MODE_UTMI: - reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | - DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); - reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) | - DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT); - break; - case USBPHY_INTERFACE_MODE_UTMIW: - reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | - DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); - reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) | - DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT); - break; - default: - break; - } - - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); -} - #define DWC3_ALIGN_MASK (16 - 1) /** @@ -743,6 +744,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev) dwc->hird_threshold = hird_threshold | (dwc->is_utmi_l1_suspend << 4); + dwc->hsphy_mode = dwc3_dev->hsphy_mode; + dwc->index = dwc3_dev->index; dwc3_cache_hwparams(dwc); @@ -767,8 +770,6 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev) goto err0; } - dwc3_uboot_hsphy_mode(dwc3_dev, dwc); - ret = dwc3_event_buffers_setup(dwc); if (ret) { dev_err(dwc->dev, "failed to setup event buffers\n"); @@ -901,6 +902,8 @@ void dwc3_of_parse(struct dwc3 *dwc) */ hird_threshold = 12; + dwc->hsphy_mode = usb_get_phy_mode(dev->node); + dwc->has_lpm_erratum = dev_read_bool(dev, "snps,has-lpm-erratum"); tmp = dev_read_u8_array_ptr(dev, "snps,lpm-nyet-threshold", 1); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 2adcaf0029..8e562ae6c4 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -21,6 +21,7 @@ #include #include +#include #define DWC3_MSG_MAX 500 @@ -658,6 +659,9 @@ struct dwc3_scratchpad_array { * @maximum_speed: maximum speed requested (mainly for testing purposes) * @revision: revision register contents * @dr_mode: requested mode of operation + * @hsphy_mode: UTMI phy mode, one of following: + * - USBPHY_INTERFACE_MODE_UTMI + * - USBPHY_INTERFACE_MODE_UTMIW * @dcfg: saved contents of DCFG register * @gctl: saved contents of GCTL register * @isoch_delay: wValue from Set Isochronous Delay request; @@ -749,6 +753,7 @@ struct dwc3 { size_t regs_size; enum usb_dr_mode dr_mode; + enum usb_phy_interface hsphy_mode; /* used for suspend/resume */ u32 dcfg; diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h index 158ca9cd85..1e1217a958 100644 --- a/include/linux/usb/phy.h +++ b/include/linux/usb/phy.h @@ -10,10 +10,28 @@ #ifndef __LINUX_USB_PHY_H #define __LINUX_USB_PHY_H +#include + enum usb_phy_interface { USBPHY_INTERFACE_MODE_UNKNOWN, USBPHY_INTERFACE_MODE_UTMI, USBPHY_INTERFACE_MODE_UTMIW, }; +#if CONFIG_IS_ENABLED(DM_USB) +/** + * usb_get_phy_mode - Get phy mode for given device_node + * @np: Pointer to the given device_node + * + * The function gets phy interface string from property 'phy_type', + * and returns the corresponding enum usb_phy_interface + */ +enum usb_phy_interface usb_get_phy_mode(ofnode node); +#else +static inline enum usb_phy_interface usb_get_phy_mode(ofnode node) +{ + return USBPHY_INTERFACE_MODE_UNKNOWN; +} +#endif + #endif /* __LINUX_USB_PHY_H */ From patchwork Tue May 26 03:34:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1242 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pl1-f200.google.com (mail-pl1-f200.google.com [209.85.214.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 1B19D3F06D for ; Tue, 26 May 2020 05:35:25 +0200 (CEST) Received: by mail-pl1-f200.google.com with SMTP id f12sf14732858plt.9 for ; Mon, 25 May 2020 20:35:25 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590464124; cv=pass; d=google.com; s=arc-20160816; b=f/J7Qjv3/Y+tuqp7Ob8XIF/0lV/raTD7pDjqIWhT8Bp5KhY8jkDIjFYKcJV9Lnha0o U7/D+75t1RGfQVI8vrqzN3NXjDbb47THoS9Fvq74ts/QgsacMUwJN2uqGz5l1EOSAcko tf7hyBO3ypobeiZO5RTQ+2dEkXhivRvaKeI/aSS0tgJjWegObB0plAKvsszsw4I/Tx46 zcOQl56yKcwuXe+WqygnUENez/+QzsSQ9t7NRVy7azmBZ7RzuFRYwzJcGBM+Mdt33092 kxWYU1LAZLRxuD2YgK3qqQ5acdVGX6/PDY4YN21ztSLNqFCSO97fQLHXl0uG12r2FUKq 0Sew== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=SuQP7+IIuvUQIwfX7Behp9f4PxV9NJVsv0R/7M+Kw1Y=; b=XeDwk6mr2AzttrtZUbeJBK/y21pruzCqpPLuUfKCLyvFZyMot+oEuGqMxLtcZSlpEy 06/wbVRJn2vuCb3YnVcoqRd3KPDj/JiEQIuINgdhvcRkalNo/fv7RPkr/iFbIE0MAHPL 5dNXWKJs1bI1XHSgFC+ZtPxWxuQqAXYgvS3PJ+PXdYXZTh7RtohMFC334+1ZU87Zgftw jBmEd18abNZRZ12hpxAvFdD1GQG5o89kVE9GtUvLebb5KoeHpypJTwrWsr04YHbrxoGi nqJAAd18jhGd4f+hkNGT5A4LgqvZTUggzgPqb6rLlsCfnup8H9AHCJmi1eLu+xvTZ6+B G/nw== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.134 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=SuQP7+IIuvUQIwfX7Behp9f4PxV9NJVsv0R/7M+Kw1Y=; b=kwWNrTW/W7qJTlqySbio2jYYgoxOzZORYgJwlznRsPpD7GZZivN3xtdm/H0Ss6aZ2+ Xum5MAAQW9fvM3yBdfeX5/drav8XTAvyBPzbdJ0EsTjNYjjQu5WUPC5s8gGJmnfhVrxD t8USsHuuy3AhFhF9+AIZf19m9MWRH8IJ6NfNg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=SuQP7+IIuvUQIwfX7Behp9f4PxV9NJVsv0R/7M+Kw1Y=; b=lQZs6TrbarMEiTJ0+soi+NamYzjL0dyf4Rlj2ifBBaqRJb4JbiwkKkGOh3KbrIDmLk xcNqTPWkyoeIl59v7R+oc74JF3eSuKn+wFXYrnat5ZKj0OxHCk4ue7so/BKWq+VkByQo K9nWvPM7fp11lTNAGG1Zioy8k0mGGUjoc6MCGW7c5AVDTDbsPKjVt9JT2ShRgx8v4iJc LZ5k1Rim9yribDR2b9vayQnLRx3dVqkEugU9R2/JLBy33E6AJB0DHjouEnjCs9PfbNJF txJbjadxx0Q0jPjqEa5BzeLivdWg6S74K0i4ehUvUw70wPlEzmbZLuPts52vvTLu31bs zMgw== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM530ye0lPEYb42OqC/swkU1Z+fGal4ETRWaEjL52U93CyiuooJtBO IILtjcmZWNM3kU72/f1culslogLs X-Google-Smtp-Source: ABdhPJzf/CRIZkIJzX6jS5vfhAIBY3gJTq+/IPhm/FBXDxeRCiygJSHBV/3FF1rwmjaXJhfnP8Qabw== X-Received: by 2002:a17:90a:734b:: with SMTP id j11mr16584712pjs.114.1590464123843; Mon, 25 May 2020 20:35:23 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:aa7:9638:: with SMTP id r24ls3459941pfg.3.gmail; Mon, 25 May 2020 20:35:22 -0700 (PDT) X-Received: by 2002:a63:5f90:: with SMTP id t138mr28468425pgb.122.1590464122154; Mon, 25 May 2020 20:35:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590464122; cv=none; d=google.com; s=arc-20160816; b=BVNGJZ7LVfBPLzoRgEjABkBuDGYI3Q6+4N5F8en1d8POdg4ThsLiLcDUR7aErtgTAX dFjaYpQ1dbcFC1N6IbAK6386qkJs7gzDLnyPIsWDwk9afsTFOgnMgzLSBRPEGFsO1jNl 0TWdJgLwB9MdcWSuNL5eE8hOu4qcIx143xuKsR9EC3AHNfT6m8IquyhFoohc2JRwklp6 pGs6wqmowNfo+A5Jo4UHr1pR2m/8KwsQeLafOoLFmEHuCfGHp3dzIZSsr1Kjp5tZagpX GPCEExF580dU384PrGzT6NrkCO1rQ8iasITwE8s1zbE9DnRNqUQTmr5ohDUGTbpA8WOG hc/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=nQe5YT1WoEnCyx+X7ZQ6x9FDZ0jnOGs/+pDcSunDCW8=; b=FEGeVOB8MMRzm9UNpdF0NkcKxcZiewomj4Zmt2Aa1t80F/r0YabQj1H+24T9wWcZDS qjI5XcG+6lFhUFZVmqV7qzUxGPP3Zkih8k7iRJhak4v+JozRjOMDMdF1PZ200V14DP5G 4n7l3XSCITTvb14LC7nN5BLxf2pdnC1h9UJIz0YyWf3r9fvk2YuzWvXnmqx4+tS7ITkj Tzt1wqym0OhcYCYEKmwFjHpCdOBE9WGexVxUKUJyV/1oC2gpQHxw0FWdKsvUmzkiOwfj onMHINhQjvE+60/DKxLQJK+EARYq8xKgaEExK9OG5pYCZVWWnWAxGzfdSbh6GTSPgGCI pLZA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.134 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.134]) by mx.google.com with ESMTPS id z15si16026328pjt.11.2020.05.25.20.35.21 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:35:22 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.134 as permitted sender) client-ip=211.157.147.134; Received: from localhost (unknown [192.168.167.209]) by lucky1.263xmail.com (Postfix) with ESMTP id BEAFBB1378; Tue, 26 May 2020 11:34:40 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P10491T139788594689792S1590464077143166_; Tue, 26 May 2020 11:34:40 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <98ba3b6fc941ca0f94b3df081685e846> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com, Frank Wang Subject: [PATCH v6 12/16] usb: dwc3: add make compatible for rockchip platform Date: Tue, 26 May 2020 11:34:31 +0800 Message-Id: <20200526033435.20235-3-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033435.20235-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> <20200526033435.20235-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.134 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , RK3399 Type-C PHY is required that must hold whole USB3.0 OTG controller in resetting to hold pipe power state in P2 before initializing the PHY. This commit fixed it and added device compatible for rockchip platform. Signed-off-by: Frank Wang Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- drivers/usb/dwc3/dwc3-generic.c | 33 +++++++++++++++++++++++++++------ 1 file changed, 27 insertions(+), 6 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index eabd53a36d..421e0be135 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -24,6 +24,12 @@ #include #include +struct dwc3_glue_data { + struct clk_bulk clks; + struct reset_ctl_bulk resets; + fdt_addr_t regs; +}; + struct dwc3_generic_plat { fdt_addr_t base; u32 maximum_speed; @@ -47,6 +53,7 @@ static int dwc3_generic_probe(struct udevice *dev, int rc; struct dwc3_generic_plat *plat = dev_get_platdata(dev); struct dwc3 *dwc3 = &priv->dwc3; + struct dwc3_glue_data *glue = dev_get_platdata(dev->parent); dwc3->dev = dev; dwc3->maximum_speed = plat->maximum_speed; @@ -55,10 +62,22 @@ static int dwc3_generic_probe(struct udevice *dev, dwc3_of_parse(dwc3); #endif + /* + * It must hold whole USB3.0 OTG controller in resetting to hold pipe + * power state in P2 before initializing TypeC PHY on RK3399 platform. + */ + if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) { + reset_assert_bulk(&glue->resets); + udelay(1); + } + rc = dwc3_setup_phy(dev, &priv->phys); if (rc) return rc; + if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) + reset_deassert_bulk(&glue->resets); + priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE); dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START; @@ -186,12 +205,6 @@ U_BOOT_DRIVER(dwc3_generic_host) = { }; #endif -struct dwc3_glue_data { - struct clk_bulk clks; - struct reset_ctl_bulk resets; - fdt_addr_t regs; -}; - struct dwc3_glue_ops { void (*select_dr_mode)(struct udevice *dev, int index, enum usb_dr_mode mode); @@ -394,6 +407,12 @@ static int dwc3_glue_probe(struct udevice *dev) if (ret) return ret; + if (glue->resets.count == 0) { + ret = dwc3_glue_reset_init(child, glue); + if (ret) + return ret; + } + while (child) { enum usb_dr_mode dr_mode; @@ -424,6 +443,8 @@ static const struct udevice_id dwc3_glue_ids[] = { { .compatible = "ti,dwc3", .data = (ulong)&ti_ops }, { .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops }, { .compatible = "ti,am654-dwc3" }, + { .compatible = "rockchip,rk3328-dwc3" }, + { .compatible = "rockchip,rk3399-dwc3" }, { } }; From patchwork Tue May 26 03:34:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1239 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-oo1-f72.google.com (mail-oo1-f72.google.com [209.85.161.72]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id CB71F3F06D for ; Tue, 26 May 2020 05:35:16 +0200 (CEST) Received: by mail-oo1-f72.google.com with SMTP id p33sf10750750ooi.11 for ; Mon, 25 May 2020 20:35:16 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590464116; cv=pass; d=google.com; s=arc-20160816; b=nsU32S3pDyKUd1266UyKFXo4Bj4bT5qvBR4oxXNM6bgaqDjMKRGagszdapPQF1g/Mh jR1C0zqixTBn7LAWgNNC6M0+XE8KL4sI2ECl4CpGiMK2TIaU1VeZdME/j0nznvcmn7bY LjqFF1sSsdjdz7V9LWfOSPI4GCkw9Bz+dK1Yy0sddzJJ98bak+/6aF/3vlNvlyQRTusx aN+ijjqz1rvsSLYDszZDJv4J8C0Ytxlgj32YwbGbosJUPurFzRsDVG49/IHijCSeOPiw e3xPfla+3De2Cyh2XNcywGLSXgZNSjqsmPQrMNtK+oTUVjaw0LgQJD1QCwwiiW+4k0kH dD7w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=/KlbbAeuuXjRJDd4NugfcyxWPplk0GqIcNaW7IAzmec=; b=c3GG0Ir27MSuq7O0aE3B2y2eiJGPumyB6h2IFJvhmDKKCGUk8q6pkcY/z6DgBn2HTN Q5PK/q3unzhaOrkLou9rQuDGQMEsnpLP5lJBmTPLRX2qnlRSzyTgjb1J0DIbWvpveHeW I5u4RemtGh9Es71GCWBe2P7ekAZLmbtLerQ0Mff5FeO6oY05h6t3X5iOScd9B05FTr02 eVhQ1fF0dE1TjiTUOgbtQZ/9o94UjsG/K6FjxRTCHOZIbJL43BJpek0moERdlrpWWT9R SeIv5sdlOPBT3wvaZsITEiTi1ywnemM++7HA+WBhS5yDLhvUMmPoZTf/YkOwD/ocG1eJ nr5Q== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.135 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=/KlbbAeuuXjRJDd4NugfcyxWPplk0GqIcNaW7IAzmec=; b=Jwiyli/zk9r+sTkKK38h3B2vm2tERfUe9mDJFTbZykuwcftjOg3hFeqVRJGSFF7MdJ hFraXm7ZVQeSjhbtJd0BrbjN1qE1RF2XmrG3JeSLGuESNmbDZrriOGYvaA6Z6vaynFe+ 4M1/v++bfq47mLyvKgm9bVidz8gc+yBU7yQHY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=/KlbbAeuuXjRJDd4NugfcyxWPplk0GqIcNaW7IAzmec=; b=lxb4lBSbZxF/fis6tQpEreCv6lbcw4lh2qtsWRuwmhj5XMBaoUzZ+xv9ueGvcp6e41 DOiDwDDPYibCyk6S8wgYje8dveiiOR+5j/cKlTuSGSietFjOqTI/ziAmVlitZG6sbhbm XalLviPus71JWwIHZwV4y3qvbhFtHL0yxfifJzpZHhl4cXcCIVfhXSx8nclCAGVoFQZk UUMBsTJXLX8ze2uz0u7A9WOADuDqPpcbV6KF2zdDCn5B5cTmj+XRLMDLih4DJERDHgeB 2kYWgD68r4/d8WfKx9V3PKotXowRYyI173JRsoGtSWNY0h3tKZ2KUjl2FlX/WL7bcJOc /Xfg== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM532DwwhifcGYvyT9+4tw1qGq+I+Slv/STI87Dmc0c+peINKXpLjA cXZAWrrWU75QvnaaUVPOq+k2pKLZ X-Google-Smtp-Source: ABdhPJzrylpxir8ZyOXrfrKgNZg/J5P+QffypN5A3sieAwRNNg+Eh+ZaQOth64rFujKA17rILSmLfA== X-Received: by 2002:a9d:4e88:: with SMTP id v8mr21381379otk.276.1590464115846; Mon, 25 May 2020 20:35:15 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a4a:e907:: with SMTP id z7ls544673ood.8.gmail; Mon, 25 May 2020 20:35:14 -0700 (PDT) X-Received: by 2002:a4a:1443:: with SMTP id 64mr6630882ood.84.1590464114091; Mon, 25 May 2020 20:35:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590464114; cv=none; d=google.com; s=arc-20160816; b=NIvjdBlW1UjshgnLQQAYjKOGULmJQdunWLVZzIpW+qetjigUVlTTvFvzUNsxjOmC5O 8MpA+tM61VLyav/BDFD0m2Eb5LeDiCx7APCG27AEImDxBPGVxcMfwOBtARoE0hWkEm9n xU2IMoJ22XeVsQC1rEe1bmW4LJPy1pCmIIcEJQaBGxfmG2ggjMbMBhw92bQfM9e0khGX b9eWwim9R3yHNDvAeXfzrpKKjv1Nr7lLYLruA4ex9u5JwtKxOV4/inKqxlxRxveOjI88 o72UkhI4HEHNDa5Yj9+U3mjtN1At5wypeFCTA1muF6Ln1nU5tef9oigEsVBqJGIdOQBJ Ldog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=1x6UMjIlKKax6k1xycJxDnpjjdFphb4u0TzvDYoRCdY=; b=WWhE3tiAJZ5Ts5uD8FdzzBe7ao1TyWaYr8wDLpmZsW/QcG8FkH5y947Ts489PlDFr4 B9Xf0QnVEQ3Dhgxb/jgmal1YjVphS88ljVZy/hzx3h5VvPJo7e3+vby+a9bT3q13GQd6 wTqEzm5XqyjO4E95MUGbZh7d5NptFRsNJl0HnoNzJZq3mUfpPRtcHGH8PB8XjiFGbglg gYtS98xIyMYJwvi2kd9iZFh/4f9McdCy5xaLB2dUWvPZRdROyamOE7fp2dvPKsakgMyq nAg613fYUqzEK/q+oVQW9rvC9ceJjf2dUNWThKVd2F8fuQWarCJWSq7l/fz4Ag37ctr3 Tshw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.135 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.135]) by mx.google.com with ESMTPS id l20si9231516otk.205.2020.05.25.20.35.13 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:35:14 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.135 as permitted sender) client-ip=211.157.147.135; Received: from localhost (unknown [192.168.167.209]) by lucky1.263xmail.com (Postfix) with ESMTP id 406EF8FEE3; Tue, 26 May 2020 11:34:41 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P10491T139788594689792S1590464077143166_; Tue, 26 May 2020 11:34:41 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <55e397de601d2f631e51e9ceff11d101> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com, Frank Wang Subject: [PATCH v6 13/16] driver: usb: drop legacy rockchip xhci driver Date: Tue, 26 May 2020 11:34:32 +0800 Message-Id: <20200526033435.20235-4-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033435.20235-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> <20200526033435.20235-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.135 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , We have changed to use dwc3 generic driver for usb3.0 host, so the legacy Rockchip's xHCI driver is not needed, and drop it. Signed-off-by: Frank Wang Reviewed-by: Jagan Teki Reviewed-by: Kever Yang --- drivers/usb/host/Kconfig | 9 -- drivers/usb/host/Makefile | 1 - drivers/usb/host/xhci-rockchip.c | 196 ------------------------------- 3 files changed, 206 deletions(-) delete mode 100644 drivers/usb/host/xhci-rockchip.c diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 2f381dc958..088931a6b9 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -53,15 +53,6 @@ config USB_XHCI_PCI help Enables support for the PCI-based xHCI controller. -config USB_XHCI_ROCKCHIP - bool "Support for Rockchip on-chip xHCI USB controller" - depends on ARCH_ROCKCHIP - depends on DM_REGULATOR - depends on DM_USB - default y - help - Enables support for the on-chip xHCI controller on Rockchip SoCs. - config USB_XHCI_RCAR bool "Renesas RCar USB 3.0 support" default y diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index e8e3b17e42..29d4f87e38 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -48,7 +48,6 @@ obj-$(CONFIG_USB_XHCI_BRCM) += xhci-brcm.o obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o -obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o obj-$(CONFIG_USB_XHCI_MTK) += xhci-mtk.o diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c deleted file mode 100644 index b67722fe45..0000000000 --- a/drivers/usb/host/xhci-rockchip.c +++ /dev/null @@ -1,196 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2016 Rockchip, Inc. - * Authors: Daniel Meng - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -struct rockchip_xhci_platdata { - fdt_addr_t hcd_base; - struct udevice *vbus_supply; -}; - -/* - * Contains pointers to register base addresses - * for the usb controller. - */ -struct rockchip_xhci { - struct usb_platdata usb_plat; - struct xhci_ctrl ctrl; - struct xhci_hccr *hcd; - struct dwc3 *dwc3_reg; -}; - -static int xhci_usb_ofdata_to_platdata(struct udevice *dev) -{ - struct rockchip_xhci_platdata *plat = dev_get_platdata(dev); - int ret = 0; - - /* - * Get the base address for XHCI controller from the device node - */ - plat->hcd_base = dev_read_addr(dev); - if (plat->hcd_base == FDT_ADDR_T_NONE) { - pr_err("Can't get the XHCI register base address\n"); - return -ENXIO; - } - - /* Vbus regulator */ - ret = device_get_supply_regulator(dev, "vbus-supply", - &plat->vbus_supply); - if (ret) - debug("Can't get VBus regulator!\n"); - - return 0; -} - -/* - * rockchip_dwc3_phy_setup() - Configure USB PHY Interface of DWC3 Core - * @dwc: Pointer to our controller context structure - * @dev: Pointer to ulcass device - */ -static void rockchip_dwc3_phy_setup(struct dwc3 *dwc3_reg, - struct udevice *dev) -{ - u32 reg; - u32 utmi_bits; - - /* Set dwc3 usb2 phy config */ - reg = readl(&dwc3_reg->g_usb2phycfg[0]); - - if (dev_read_bool(dev, "snps,dis-enblslpm-quirk")) - reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; - - utmi_bits = dev_read_u32_default(dev, "snps,phyif-utmi-bits", -1); - if (utmi_bits == 16) { - reg |= DWC3_GUSB2PHYCFG_PHYIF; - reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK; - reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT; - } else if (utmi_bits == 8) { - reg &= ~DWC3_GUSB2PHYCFG_PHYIF; - reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK; - reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT; - } - - if (dev_read_bool(dev, "snps,dis-u2-freeclk-exists-quirk")) - reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; - - if (dev_read_bool(dev, "snps,dis-u2-susphy-quirk")) - reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; - - writel(reg, &dwc3_reg->g_usb2phycfg[0]); -} - -static int rockchip_xhci_core_init(struct rockchip_xhci *rkxhci, - struct udevice *dev) -{ - int ret; - - ret = dwc3_core_init(rkxhci->dwc3_reg); - if (ret) { - pr_err("failed to initialize core\n"); - return ret; - } - - rockchip_dwc3_phy_setup(rkxhci->dwc3_reg, dev); - - /* We are hard-coding DWC3 core to Host Mode */ - dwc3_set_mode(rkxhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); - - return 0; -} - -static int rockchip_xhci_core_exit(struct rockchip_xhci *rkxhci) -{ - return 0; -} - -static int xhci_usb_probe(struct udevice *dev) -{ - struct rockchip_xhci_platdata *plat = dev_get_platdata(dev); - struct rockchip_xhci *ctx = dev_get_priv(dev); - struct xhci_hcor *hcor; - int ret; - - ctx->hcd = (struct xhci_hccr *)plat->hcd_base; - ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); - hcor = (struct xhci_hcor *)((uint64_t)ctx->hcd + - HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase))); - - if (plat->vbus_supply) { - ret = regulator_set_enable(plat->vbus_supply, true); - if (ret) { - pr_err("XHCI: failed to set VBus supply\n"); - return ret; - } - } - - ret = rockchip_xhci_core_init(ctx, dev); - if (ret) { - pr_err("XHCI: failed to initialize controller\n"); - return ret; - } - - return xhci_register(dev, ctx->hcd, hcor); -} - -static int xhci_usb_remove(struct udevice *dev) -{ - struct rockchip_xhci_platdata *plat = dev_get_platdata(dev); - struct rockchip_xhci *ctx = dev_get_priv(dev); - int ret; - - ret = xhci_deregister(dev); - if (ret) - return ret; - ret = rockchip_xhci_core_exit(ctx); - if (ret) - return ret; - - if (plat->vbus_supply) { - ret = regulator_set_enable(plat->vbus_supply, false); - if (ret) - pr_err("XHCI: failed to set VBus supply\n"); - } - - return ret; -} - -static const struct udevice_id xhci_usb_ids[] = { - { .compatible = "rockchip,rk3328-xhci" }, - { } -}; - -U_BOOT_DRIVER(usb_xhci) = { - .name = "xhci_rockchip", - .id = UCLASS_USB, - .of_match = xhci_usb_ids, - .ofdata_to_platdata = xhci_usb_ofdata_to_platdata, - .probe = xhci_usb_probe, - .remove = xhci_usb_remove, - .ops = &xhci_usb_ops, - .bind = dm_scan_fdt_dev, - .platdata_auto_alloc_size = sizeof(struct rockchip_xhci_platdata), - .priv_auto_alloc_size = sizeof(struct rockchip_xhci), - .flags = DM_FLAG_ALLOC_PRIV_DMA, -}; - -static const struct udevice_id usb_phy_ids[] = { - { .compatible = "rockchip,rk3328-usb3-phy" }, - { } -}; - -U_BOOT_DRIVER(usb_phy) = { - .name = "usb_phy_rockchip", - .of_match = usb_phy_ids, -}; From patchwork Tue May 26 03:34:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1240 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pg1-f199.google.com (mail-pg1-f199.google.com [209.85.215.199]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id E0A1B3F1EE for ; Tue, 26 May 2020 05:35:16 +0200 (CEST) Received: by mail-pg1-f199.google.com with SMTP id x3sf15553296pgl.2 for ; Mon, 25 May 2020 20:35:16 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590464115; cv=pass; d=google.com; s=arc-20160816; b=uGGnhp5GQ1TmjXW1r6Dxiw+BBTQr9U7UYQED80bQjnkPe09pmfSOv2UWnboL8MyWmC G2yxCQqfBIyLGyphXR+dt7uLz/Ze2EKBdFeA0ZjPp7MwKBipvS6iItpfHrJaeXVk/4+Y LgnNaW+cfbH56CaiK/nXysGjJmFh2EJzwyt/kBfJjOMMdTXl9o26cHTTc7TnkgqdXDPJ Pp+ND74H0/3NX813uwR5AES1gsbwUBiEb+IHlGfwahd/s5XZkbcnhqd3U6Nmfq9Zv5xu eF7QL0GhUXBdGTwVjxEbTW7fjKf8B1vTH3IXRgGNREEqmkQI3rfdlpqAhgnTkK50X9Hk bI+w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=8fIZeyFr5Sclg0Wvy9UdiKfV23gx2SR7Rgc4TK0eFOw=; b=jLYXIp7O3rqyNeMA5VIZHmSJPZF8FjrC4ejDFLEI2/wZR+vut4pvsTyKw82ZQ2j90/ ACz96bCFCFQ+WUnQe+RVsRv/tdSSpqflX7HRdBzfxhdK0A9eQIDCd/f1Y77ZVJ8RqL9g l6+WDIhmRQyIHvkplv5mQHT3AwxwdGMB0iQ66qpWMQl/ED+z+l9e+n73t4SD1fZ/B+Py sdlBaOr979BDxhaR/TWcNTaUDvsCARGBWobHjMS/5Aky/Aau+T9y/nK1wh8QC/vGgTD4 hvdt8yquFYDSDz3xfwCkpqbtccu1EyEcB/xBKcr5Bs1c+w7pV6CctJsMFyeycZziWJtJ ZvKA== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.135 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=8fIZeyFr5Sclg0Wvy9UdiKfV23gx2SR7Rgc4TK0eFOw=; b=OTC+gzECnpJtiSQi046yGH+uGIfi8I8rP4BnJiwEYnWgszai+4nuex22TVmwSiuX// RkJI9j/eckS/Bs43LTYUDyu2U/krSOzhF1MfbCw1UV+azt+YfkOxQfj1Xt8JWd1x/9ya TLrlAXvUIs9e1ElRMu9ZJIYRlbeGtus3nJx6g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=8fIZeyFr5Sclg0Wvy9UdiKfV23gx2SR7Rgc4TK0eFOw=; b=Hd1Rn0hoh5GGwI7hlf+VTSLYZaSStuCLC4D/kZZBKQIN+VUssyeqfjHodteQtN2qyj dqDZZTa45KakUotlaK0aaERPrwB0fFse5WdrsSZFUDLMBMuoRj61hzRawkKP/o1smDrJ ndoLYjh2qSPbZkCuApGRTH48avwt7f5qLcDYMiwLhia5+zUyAAZclb4wB6us/iNleKLX I+ItlA4ET4j3Ejx8fMBlEVbxKm/8pupQKCaJxlUwumEcLHqkKDw2MtaYuZnTEeSmaHlg ikYCSwb7o0al4nmbXbUyO6MRODyJ2kRSQVT4hgccDmqB3smOAbTQy3TOyL5IxLgleJIA ULdg== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM530+H/BHS2sntT+qUWBKJ6wUPvqGRgx93HcRuN3kdj8uNJyu9uch HIF+u+U7pplgS2i5pMC09OKazHgg X-Google-Smtp-Source: ABdhPJwJVjntB0c8GHX+VPgQIlTxpDdfdkx9S7nH1zi4VOIk0G7b0gWF9rIsEPoUbCMNwtqSonXsQQ== X-Received: by 2002:a17:90a:950b:: with SMTP id t11mr14372207pjo.35.1590464115701; Mon, 25 May 2020 20:35:15 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:902:12c:: with SMTP id 41ls4423483plb.2.gmail; Mon, 25 May 2020 20:35:15 -0700 (PDT) X-Received: by 2002:a17:90a:1946:: with SMTP id 6mr21102651pjh.208.1590464115078; Mon, 25 May 2020 20:35:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590464115; cv=none; d=google.com; s=arc-20160816; b=xHUkil7ETCMWUhhUTVo1wBFJHBnq4PxBABJZTrW/Bz24/Whjl+YM5E1UhBgsifJrcZ oMjWHC+KBJdlrvA7VAxQAYbZIy3Yu9gVx5+BL5qNFejDylMy+2AdbIqXqYKdpmjChEn4 WJoBW7pBJZcByPlNuW7MerrAni2HN8ijKZ1qLVSeFg68e5OVOF4lq9lskeAg5cgkmPuB 8scGxFpkca0U3xow8zZRNSbqlcvHc0sQ6wQHNZFPRH7F5D/I5oCXone57BU0gPq72aUJ 67FAMScCz5ti8mUs87hf053IlIm4o4FYhaKTH3QSI0vwVny+mLoCZXKKdJ+QlFK0dXV1 qT0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=cYmNPb3QAMltgP4+SZ31kzgCkNw7VwGgIX+xb0cW0bo=; b=Bb6m8EwHQCCDQtSQf9C+FfuZpSXNOt2tFavRX6Gb77jnI1Ty/Ll3vJ4+HGXYdOZuUA dRSxhH690wYyYyCbizlUXg1bxB/AW/o+/7XKMWGsDhxfh0fJNU0DCQbLqnwPPkKUevMg GGGA8UR+rj0HtEQyK0JAMvENbn0UGRZzslYRiadEP5xf1s9867JNlCYorlyvu9D59ozt 5NzGmO6rPZhdaE2ttPee2Tvx/F5ogMAfFy5IkDc4xBdBdzgVDil1+gNHsoOtY6AdRTH7 3cYI/N9S3vPq3ZaDtqCWaomcFhx7HC0OOLDezr3DXTmltUEM+nzH/FGi9ApzgYfEKgzz Syfw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.135 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.135]) by mx.google.com with ESMTPS id x15si4363869plr.8.2020.05.25.20.35.14 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:35:15 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.135 as permitted sender) client-ip=211.157.147.135; Received: from localhost (unknown [192.168.167.209]) by lucky1.263xmail.com (Postfix) with ESMTP id 3712390136; Tue, 26 May 2020 11:34:42 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P10491T139788594689792S1590464077143166_; Tue, 26 May 2020 11:34:42 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <5bc2f5f28fe4a87715d5db92c85d4295> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com, Frank Wang Subject: [PATCH v6 14/16] ARM: dts: rk3399-evb: usb3.0 host support Date: Tue, 26 May 2020 11:34:33 +0800 Message-Id: <20200526033435.20235-5-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033435.20235-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> <20200526033435.20235-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.135 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Configure 'tcphy1' and 'usbdrd_dwc3_1' nodes to support USB3.0 host for Rockchip RK3399 Evaluation Board. Signed-off-by: Frank Wang Reviewed-by: Jagan Teki Reviewed-by: Kever Yang --- arch/arm/dts/rk3399-evb-u-boot.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi index e5659d7999..1bebe258f0 100644 --- a/arch/arm/dts/rk3399-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi @@ -23,3 +23,16 @@ &rk808 { u-boot,dm-pre-reloc; }; + +&tcphy1 { + status = "okay"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + dr_mode = "host"; + status = "okay"; +}; From patchwork Tue May 26 03:35:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1243 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ot1-f71.google.com (mail-ot1-f71.google.com [209.85.210.71]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 8D9963F06D for ; Tue, 26 May 2020 05:35:54 +0200 (CEST) Received: by mail-ot1-f71.google.com with SMTP id n22sf9225831otq.19 for ; Mon, 25 May 2020 20:35:54 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590464153; cv=pass; d=google.com; s=arc-20160816; b=VmglVmBNXVxOSxGEpLrj0B/F7ySIM0FxTvNOAmZmzunG3wE548mPAjAezaKxXwKa3c imEnLy9DgU16orQ+5h8xyHXjlCRN50h6FwgSTdbATwL+/K3Ai81ukrac/yVtnECh3hKh oCTgpJAYiGPONO55dQ45bbd8Xr5ad4WB/3rxsrkDe+VnPOltg/pXKzDxSzVLU34Q99AU 2S2EPE8XNhtQxkpz54jNdAbD8wxzDsTOLwfFA0Ho+iDX1BCRJRzqWXYIUuc1k0Kmiebi 6OqcXHhUpH2iZhA1IVj8JA0bSBzvZ+iNyzxXb5mBhqhN46YN12l4xlxHWM11dOefbjMJ FrDA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=bneCjMBzPzZ02j0lXU+xokf1sCEOctAUQAWrQcQSz4Y=; b=I8VRalLanklXSy12Ruue1KRYKQfQ/4oQs1XY11K/QJ8HyWqqwDHsl/sMAYuaoAnxaW LfbGdsMKr/UXAM2Y7vYt07hezhBcFtJqyKNoR6laBBf9NgMcHhZtxRdS/OyeNS/f+8qn iJIVx027YtvGrgaSM8uEbiZouvfn9ECnsRY11jKjeA9oG9S5l+X5ECZPStz9BQju9MzQ ZoWWnjOOgpPGmWz7YvDg4Las8hl6NOQDmWnMjgTiBetG69KdsbTeDTf5XTr6m8pNdMSb pok0sS44v75Zi6M1zo2FxayLmSmCcLEq8foRBznjv9MH89wwwUbKmXDiQdZ70hGcWs+T yDqw== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.130 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=bneCjMBzPzZ02j0lXU+xokf1sCEOctAUQAWrQcQSz4Y=; b=YQ67S2LmCKs9uGQCf7tJighm1qm+pSLKCUHo3ZdAs2EH+Ypg2odg28J3L5nZBq1bvW u9yvdWGICEyeAyp48KZyabQvN1gA+aCSb2GjOqzXMDMskMWiOtHKQVpk4PVfNmLbIH0s OsttCATZ+LpZpHp1LQQBNZEbbQF7PQZfgVD20= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=bneCjMBzPzZ02j0lXU+xokf1sCEOctAUQAWrQcQSz4Y=; b=gwP4MwbICPfH3SfR6CA06LdCBOCMQYOquVEmTW+nIR65hRnw6lPJqzCQL8ZNvpMXEF yv67rt1DeRwGH8PGvcT8W+n//tRIZdSBRenWUMddAXXQORzN3sI1IRr+sDLdNnVaOkQi IsrJ2w+z6n2h+sZYGKk3OUA3IjACBwlNtWn00Ljaq+f/whRqUxtDcR2ouzt1tIOkAV7j idZy37KppUuw7Yu6y6aCQjF4TZVmB45DFrH4+kNHVBBCh3N3hp2v0V0PE/qyYi/Z9uOM g1kOCVX3gYNcuSyxQdErhT/xMBSvxvtzvqlEnlprMg1isfEH9309jY2UqkULsf5rdz53 nBbQ== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM531pyfYZzrmdd+7ta/hPIXqR4YMpCCk0Amj6kX1uwTU89/5WPlhC RYaa2dgkcF1IDbYBgQVP4vb4Qg6w X-Google-Smtp-Source: ABdhPJylS5bstdyprSYxZ8rD0DOV644yZFgc0KswdxZmrFlsDh/FjulEnGfaCrv7kE0+L0SSlOqQQA== X-Received: by 2002:a9d:3623:: with SMTP id w32mr22674072otb.91.1590464153630; Mon, 25 May 2020 20:35:53 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a9d:2d81:: with SMTP id g1ls1990372otb.6.gmail; Mon, 25 May 2020 20:35:53 -0700 (PDT) X-Received: by 2002:a05:6830:3109:: with SMTP id b9mr19395752ots.41.1590464151815; Mon, 25 May 2020 20:35:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590464151; cv=none; d=google.com; s=arc-20160816; b=suK/JIRIpo/1s3CFJlwHbFF/aaTUGnhJqIUAVLQ3/iu5y+AzQzlGBle5qBxl0VIKh6 R/dx3n1uYxMHtO+Z9UIQSAcSzRLLDAV47w68MqqVTmqJIff+a18x7NpS+dLDJXCdOkZT lkndGsvuQT2pI55+0aZbt7bbMiyT7mxriJl+6YiuKe6ZJaW/RYNhsda98uHT2Ht7AfmS 8ziDSQz+8+PZwfydP9GJTvVmCuT5Nl/yQdJ0fUPM87nR8Cq9GYOrMmuBgzNvv+qeI63j j4BPEMPxt3sb5P2S1ZtqLXXY5wazDN5CUWqF55lFT+zHmM/ruXoKDF7vqLp6WS/bxsKG 6Qbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=42011SEdgEyZUU517BgoIEzcAOxlLDW5aS4+xD+UXJg=; b=twug8e8/gYNtcWhCwOnNTFsTkDi/GBCHgvZuVCf96oNMMOz63C10tgmDO4FUlKgnGh 3mhJIbOGznYYF56K5FAjq+FCfu3yVsx3qgjMr5uwfx11Wess2AMwneyOm/7r97irOEVs M5/8E0raovvfUT8mglwRGUhSZ4fdphSGTDeilXUnGb0yme6nGRJLXNmEZTnyLZuZi221 76FCcQPC8/qlTJq3xA9u9iWF7d1gJPCM7E6SN7f7IHo+nJOyaWsWvy1EcDXjUcTeLzjX uRgEIcIDWRJu3WKs/y8vMLckaP/L5rkQTGAUTXEUoG5gkku+1RO1KgtL7L0H3/VZEEK9 XwDw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.130 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.130]) by mx.google.com with ESMTPS id a203si9067303oif.250.2020.05.25.20.35.51 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:35:51 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.130 as permitted sender) client-ip=211.157.147.130; Received: from localhost (unknown [192.168.167.32]) by lucky1.263xmail.com (Postfix) with ESMTP id 95DC9BB9B0; Tue, 26 May 2020 11:35:19 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P3328T139696428545792S1590464117472063_; Tue, 26 May 2020 11:35:19 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <6138aa1d44cd1d956163f7a9a5421843> X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com, Frank Wang Subject: [PATCH v6 15/16] configs: evb-rk3399: update support usb3.0 host Date: Tue, 26 May 2020 11:35:15 +0800 Message-Id: <20200526033516.20325-1-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033220.20047-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.130 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Update evb-rk3399 default config to support USB3.0 Host. Signed-off-by: Frank Wang Reviewed-by: Jagan Teki Reviewed-by: Kever Yang --- configs/evb-rk3399_defconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 7f14e18b1b..6cfb4e5dac 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y @@ -35,10 +36,13 @@ CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y +CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 @@ -49,6 +53,8 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y From patchwork Tue May 26 03:35:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wang X-Patchwork-Id: 1241 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pg1-f200.google.com (mail-pg1-f200.google.com [209.85.215.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id D4C143F06D for ; Tue, 26 May 2020 05:35:23 +0200 (CEST) Received: by mail-pg1-f200.google.com with SMTP id k124sf4303331pgc.0 for ; Mon, 25 May 2020 20:35:23 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1590464122; cv=pass; d=google.com; s=arc-20160816; b=m2Et2cV2U685DlVo8B0BXiOaas238Qkelj4G5iqPEDx+9kdy9ZFhxtlhiMUEfkVFgx 37sGKV2j1pE8QmRlBbdGtvXM3gNzxGJ1AboPFlKamylnPoRSfFEU2aZGfS/GPuPBWu3O N8fR9GgEEcrPqLem8PIYW+9VR36/VDSM/xQEBTBaBu5iayeNnHzLKoaqr9uuLeBpYGdW 2SNTsPzTZvbdhoLcevVSawJkPMwomtesvap43ANF0OV49K/zmN5Yy/i0iVJDUKYJPb0y +8ko7GpLI1pKaWc617mUjI5ebgtvFIoWcMLJBxwFz8qMOcwnc8gPliGhKdKLDS97teo4 /gxA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:sender:dkim-signature; bh=EXkkLqQeMjGHTUXwPRfHCBB76rjkzBgsb2dTwvAK/Cg=; b=ANWy71nEMWL5e/dH4SzQRhvKuwleVgjpC7zIKYf9oSqNUIgscxRJKgkfnRg6bgqiPK NoCd5gJIZ1BbVMy6ZVQ3rujjT60ztIsb+lao/adBlhfSY41ont+xVhNOzk+p2BM7Jivj GbXWwBf4D+b9IhdLhvHE5+USzuLfvE9phMAEfVZ4Psgx8zrAHe5bdWIKvxR7pZSZ4hOc SpCGiuKeaIK5ejFhi5NjGdI79lpfu3/J7ujGaf4r8pwoYEvcJzhdwD3vSLGnwDLrjD5I sK4UxPBPBJrN0gVnX99Hhao6S1fJWUj/JfIiT2N2K2TI/DBwyS8WYoRSeRyqmkIUF0Ja f/Fw== ARC-Authentication-Results: i=2; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=sender:mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=EXkkLqQeMjGHTUXwPRfHCBB76rjkzBgsb2dTwvAK/Cg=; b=RThQgNhW7r46TNUi+0YDMcMsr77VgerO1RmGXZaecpSmpGPSFnMqz1xgumyFKRd9SY L5OaCCfAJae0I/4oR40FutaJsoQFJDtDhX2B0PU2lrVzsxLwZhGT/8u1sNHpqEuQO2sG L7Nkzz0mUGvdNl8bZZTtgImATdJsKAPkhOIFA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=sender:x-gm-message-state:mime-version:from:to:cc:subject:date :message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=EXkkLqQeMjGHTUXwPRfHCBB76rjkzBgsb2dTwvAK/Cg=; b=EgZpefyUcQmY3lWXYY7kHOMkTQSEljX9K4J5D2BE1YS4J/7yG+MzI9GE4PXU0hjXpu q7Dr22l+Rh9Gl2JcbujzjWL618PJM8q0x48nA1F/YKxjYEcJGtdTkoFcA/g1XRmjsOVE YpLhwLHbNCCXR4osf4Iy5SdWsvG/YFgJ+VCEeabgALb4AYvk2ShGGWebKcHTAhP30chn QcOQqVICDWFSESqT8xiR+o9wFrmlH+B2izxlcFzGoh9WjUBThlOPBdl0g8lOD7JMQmUs +KIMjMpofgL5So2ufk3TFfNMpnurTpf/bd9c3yGJ5iFfm0XN3TLEBdcLZwxZt5PuvpYo E3iQ== Sender: linux-amarula@amarulasolutions.com X-Gm-Message-State: AOAM531tbKwN8Nuzyv0EDgZvrOf0Bg1KjOXVgpwkImRcBwD87UV3zPuV 3Vn1B58VAX/mJV9ZRGng6DVNgdNA X-Google-Smtp-Source: ABdhPJx4rhnSUwQGv7j1mgPc6jEOWTgqYPql+q2IIBJSOWnplySkfjtNONBs3Sx2CnmjpFTHOpUSGw== X-Received: by 2002:a17:90a:21cf:: with SMTP id q73mr24146132pjc.230.1590464122614; Mon, 25 May 2020 20:35:22 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:902:a605:: with SMTP id u5ls1185417plq.9.gmail; Mon, 25 May 2020 20:35:22 -0700 (PDT) X-Received: by 2002:a17:902:7045:: with SMTP id h5mr31194088plt.108.1590464122157; Mon, 25 May 2020 20:35:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590464122; cv=none; d=google.com; s=arc-20160816; b=wHwSiag6n5P9SEUAjjheTo7M4DDoKAuqMHE8ZbCNSn17AdvoacbsohpWBBD2/qKowK fCEDLKqW4qjoz3f9+NQjiPJxfF/YQWEF7nCsO1ohlHrO5ljbHS20N4+16hiwy9Eh3iCI uOFgK1eRkW6CxE8r7GaTKk5sKLJjGNcbGC0usL2e6p0yBSgqnflSYRRzwe/yc4DFCBC/ A+IIw+kw31/wvDP7czcKxuuuZjZboFgKnULIB3XO/RO3JQ3MN4KBAoliixTKJA28RDYD qFdS1AsGDVgYgM/P5bC7e9Q9WTSe52G1E1To+vvr6+/WGodxR3G51iKDTP4cy61eJqsj qLXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from; bh=lpaFrIMayRB4Y5t58qHx+8oJXUd9J6dfGxe71wR5wtE=; b=X1stuL8I/SfYo2TgwISO05Vz2m/nrSLn0AZrPwzYVQzN7m3w44LSUNBtFGoZmjprjC 4it5/vUku7GuumMLTsWb2bce5jw0pgOT+plaJfNn3hF9UesRnYu5+Ig1DJMqc7QqCMV9 nhOShg2dVT8vJmmJe551Uvbw5YoGjxYLpiLDnwMtXR/3FHc7GbSKSW+1Zb7iA/JbRBsV e/JvyJw5SZgMzQ5l+BBTRPDYVOnJEKabBIoEL68wIudntHmn7wZSiIaA05ChP9gsDN6S ona0EOG1MlrYOG1WGMicSAhZDbWPGA2ZJFqK1KzVVyPFusYbDiDbTNpiVsv42tpHXDsP 2CgA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Received: from lucky1.263xmail.com (lucky1.263xmail.com. [211.157.147.133]) by mx.google.com with ESMTPS id t17si15728602ply.304.2020.05.25.20.35.21 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 May 2020 20:35:22 -0700 (PDT) Received-SPF: pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) client-ip=211.157.147.133; Received: from localhost (unknown [192.168.167.32]) by lucky1.263xmail.com (Postfix) with ESMTP id 850BEB7721; Tue, 26 May 2020 11:35:20 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P3328T139696428545792S1590464117472063_; Tue, 26 May 2020 11:35:19 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: X-RL-SENDER: frank.wang@rock-chips.com X-SENDER: wmc@rock-chips.com X-LOGIN-NAME: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Frank Wang To: heiko@sntech.de, marex@denx.de, bmeng.cn@gmail.com, philipp.tomsich@theobroma-systems.com, klaus.goger@theobroma-systems.com, jagan@amarulasolutions.com, sjg@chromium.org, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, marek.belisko@gmail.com, william.wu@rock-chips.com, jianing.ren@rock-chips.com, chenjh@rock-chips.com, wmc@rock-chips.com Subject: [PATCH v6 16/16] roc-rk3399-pc: Enable USB3.0 Host Date: Tue, 26 May 2020 11:35:16 +0800 Message-Id: <20200526033516.20325-2-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200526033516.20325-1-frank.wang@rock-chips.com> References: <20200526033220.20047-1-frank.wang@rock-chips.com> <20200526033516.20325-1-frank.wang@rock-chips.com> X-Original-Sender: frank.wang@rock-chips.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of frank.wang@rock-chips.com designates 211.157.147.133 as permitted sender) smtp.mailfrom=frank.wang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Jagan Teki Enable USB3.0 Host support for ROC-RK3399-PC boards. Tested USB3.0 SSD on Type C1 port on board. => usb start starting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found scanning bus dwc3 for devices... 6 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Hub (480 Mb/s, 100mA) USB 2.0 Hub [MTT] 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Hub (480 Mb/s, 0mA) | | VIA Labs, Inc. USB2.0 Hub | | | +-4 Hub (480 Mb/s, 100mA) | | USB 2.0 Hub | | | +-5 (480 Mb/s, 100mA) | VIA Technologies Inc. USB 2.0 BILLBOARD 0000000000000001 | +-3 Hub (5 Gb/s, 0mA) | VIA Labs, Inc. USB3.0 Hub | +-6 Mass Storage (5 Gb/s, 224mA) JMicron External Disk 3.0 DB12345678A2 => usb reset resetting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found scanning bus dwc3 for devices... 6 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- configs/roc-pc-mezzanine-rk3399_defconfig | 5 +++++ configs/roc-pc-rk3399_defconfig | 6 ++++++ 2 files changed, 11 insertions(+) diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 0b853805f3..1f10856caa 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -29,6 +29,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y @@ -39,6 +40,8 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_NVME=y CONFIG_PCI=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y @@ -54,6 +57,8 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index aff690f039..76e76c160e 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y @@ -36,11 +37,14 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_ROCKCHIP_SPI=y @@ -50,6 +54,8 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y