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[209.85.220.65]) by mx.google.com with SMTPS id o129sor289191iof.93.2020.05.26.10.45.09 for (Google Transport Security); Tue, 26 May 2020 10:45:09 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:741c:: with SMTP id p28mr33472pgc.33.1590515108798; Tue, 26 May 2020 10:45:08 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id x20sm136232pfc.211.2020.05.26.10.45.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:45:08 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 01/14] spi: fsl_dspi: Drop nondm code Date: Tue, 26 May 2020 23:14:36 +0530 Message-Id: <20200526174444.262050-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174444.262050-1-jagan@amarulasolutions.com> References: <20200526174444.262050-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Ozw8M8z4; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Drop the nondm code from fsl_dspi.c since there is no board or any other code using it. Signed-off-by: Jagan Teki --- drivers/spi/fsl_dspi.c | 132 ----------------------------------------- 1 file changed, 132 deletions(-) diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c index 1cdb233110..78ad61ca37 100644 --- a/drivers/spi/fsl_dspi.c +++ b/drivers/spi/fsl_dspi.c @@ -100,13 +100,6 @@ struct fsl_dspi_priv { struct dspi *regs; }; -#ifndef CONFIG_DM_SPI -struct fsl_dspi { - struct spi_slave slave; - struct fsl_dspi_priv priv; -}; -#endif - __weak void cpu_dspi_port_conf(void) { } @@ -414,131 +407,7 @@ static int fsl_dspi_cfg_speed(struct fsl_dspi_priv *priv, uint speed) return 0; } -#ifndef CONFIG_DM_SPI -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - if (((cs >= 0) && (cs < 8)) && ((bus >= 0) && (bus < 8))) - return 1; - else - return 0; -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct fsl_dspi *dspi; - uint mcr_cfg_val; - - dspi = spi_alloc_slave(struct fsl_dspi, bus, cs); - if (!dspi) - return NULL; - - cpu_dspi_port_conf(); - -#ifdef CONFIG_SYS_FSL_DSPI_BE - dspi->priv.flags |= DSPI_FLAG_REGMAP_ENDIAN_BIG; -#endif - - dspi->priv.regs = (struct dspi *)MMAP_DSPI; - -#ifdef CONFIG_M68K - dspi->priv.bus_clk = gd->bus_clk; -#else - dspi->priv.bus_clk = mxc_get_clock(MXC_DSPI_CLK); -#endif - dspi->priv.speed_hz = FSL_DSPI_DEFAULT_SCK_FREQ; - - /* default: all CS signals inactive state is high */ - mcr_cfg_val = DSPI_MCR_MSTR | DSPI_MCR_PCSIS_MASK | - DSPI_MCR_CRXF | DSPI_MCR_CTXF; - fsl_dspi_init_mcr(&dspi->priv, mcr_cfg_val); - - for (i = 0; i < FSL_DSPI_MAX_CHIPSELECT; i++) - dspi->priv.ctar_val[i] = DSPI_CTAR_DEFAULT_VALUE; - -#ifdef CONFIG_SYS_DSPI_CTAR0 - if (FSL_DSPI_MAX_CHIPSELECT > 0) - dspi->priv.ctar_val[0] = CONFIG_SYS_DSPI_CTAR0; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR1 - if (FSL_DSPI_MAX_CHIPSELECT > 1) - dspi->priv.ctar_val[1] = CONFIG_SYS_DSPI_CTAR1; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR2 - if (FSL_DSPI_MAX_CHIPSELECT > 2) - dspi->priv.ctar_val[2] = CONFIG_SYS_DSPI_CTAR2; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR3 - if (FSL_DSPI_MAX_CHIPSELECT > 3) - dspi->priv.ctar_val[3] = CONFIG_SYS_DSPI_CTAR3; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR4 - if (FSL_DSPI_MAX_CHIPSELECT > 4) - dspi->priv.ctar_val[4] = CONFIG_SYS_DSPI_CTAR4; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR5 - if (FSL_DSPI_MAX_CHIPSELECT > 5) - dspi->priv.ctar_val[5] = CONFIG_SYS_DSPI_CTAR5; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR6 - if (FSL_DSPI_MAX_CHIPSELECT > 6) - dspi->priv.ctar_val[6] = CONFIG_SYS_DSPI_CTAR6; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR7 - if (FSL_DSPI_MAX_CHIPSELECT > 7) - dspi->priv.ctar_val[7] = CONFIG_SYS_DSPI_CTAR7; -#endif - fsl_dspi_cfg_speed(&dspi->priv, max_hz); - - /* configure transfer mode */ - fsl_dspi_cfg_ctar_mode(&dspi->priv, cs, mode); - - /* configure active state of CSX */ - fsl_dspi_cfg_cs_active_state(&dspi->priv, cs, mode); - - return &dspi->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - free(slave); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - uint sr_val; - struct fsl_dspi *dspi = (struct fsl_dspi *)slave; - - cpu_dspi_claim_bus(slave->bus, slave->cs); - - fsl_dspi_clr_fifo(&dspi->priv); - - /* check module TX and RX status */ - sr_val = dspi_read32(dspi->priv.flags, &dspi->priv.regs->sr); - if ((sr_val & DSPI_SR_TXRXS) != DSPI_SR_TXRXS) { - debug("DSPI RX/TX not ready!\n"); - return -EIO; - } - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct fsl_dspi *dspi = (struct fsl_dspi *)slave; - - dspi_halt(&dspi->priv, 1); - cpu_dspi_release_bus(slave->bus.slave->cs); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct fsl_dspi *dspi = (struct fsl_dspi *)slave; - return dspi_xfer(&dspi->priv, slave->cs, bitlen, dout, din, flags); -} -#else static int fsl_dspi_child_pre_probe(struct udevice *dev) { struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); @@ -745,4 +614,3 @@ U_BOOT_DRIVER(fsl_dspi) = { .child_pre_probe = fsl_dspi_child_pre_probe, .bind = fsl_dspi_bind, }; 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[209.85.220.65]) by mx.google.com with SMTPS id my14sor287907pjb.1.2020.05.26.10.45.12 for (Google Transport Security); Tue, 26 May 2020 10:45:12 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90b:1098:: with SMTP id gj24mr383310pjb.83.1590515111850; Tue, 26 May 2020 10:45:11 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id x20sm136232pfc.211.2020.05.26.10.45.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:45:11 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki , Enric Balletbo i Serra Subject: [PATCH 02/14] configs: igep00x0: Enable DM_SPI Date: Tue, 26 May 2020 23:14:37 +0530 Message-Id: <20200526174444.262050-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174444.262050-1-jagan@amarulasolutions.com> References: <20200526174444.262050-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=cgQ5oqtN; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Enable DM_SPI for igep00x0 board. Cc: Enric Balletbo i Serra Signed-off-by: Jagan Teki --- configs/igep00x0_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index a5c301dbdb..d32c017907 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -62,6 +62,7 @@ CONFIG_SMC911X_BASE=0x2C000000 CONFIG_SMC911X_32_BIT=y CONFIG_CONS_INDEX=3 CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_OMAP3_SPI=y CONFIG_BCH=y CONFIG_FDT_FIXUP_PARTITIONS=y From patchwork Tue May 26 17:44:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1257 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f197.google.com (mail-pf1-f197.google.com [209.85.210.197]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id E47C53F1DD for ; Tue, 26 May 2020 19:45:18 +0200 (CEST) Received: by mail-pf1-f197.google.com with SMTP id r23sf17425443pfc.3 for ; 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[209.85.220.65]) by mx.google.com with SMTPS id o8sor781742pll.62.2020.05.26.10.45.15 for (Google Transport Security); Tue, 26 May 2020 10:45:15 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:902:a505:: with SMTP id s5mr2155910plq.20.1590515115111; Tue, 26 May 2020 10:45:15 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id x20sm136232pfc.211.2020.05.26.10.45.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:45:14 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki , Dmitry Lifshitz Subject: [PATCH 03/14] compulab: Drop cm_t54 Date: Tue, 26 May 2020 23:14:38 +0530 Message-Id: <20200526174444.262050-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174444.262050-1-jagan@amarulasolutions.com> References: <20200526174444.262050-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=l83iy82W; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , DM, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Cc: Dmitry Lifshitz Signed-off-by: Jagan Teki --- arch/arm/mach-omap2/omap5/Kconfig | 4 - board/compulab/cm_t54/Kconfig | 12 -- board/compulab/cm_t54/MAINTAINERS | 6 - board/compulab/cm_t54/Makefile | 8 - board/compulab/cm_t54/cm_t54.c | 261 ------------------------------ board/compulab/cm_t54/mux.c | 94 ----------- board/compulab/cm_t54/spl.c | 65 -------- configs/cm_t54_defconfig | 53 ------ include/configs/cm_t54.h | 120 -------------- 9 files changed, 623 deletions(-) delete mode 100644 board/compulab/cm_t54/Kconfig delete mode 100644 board/compulab/cm_t54/MAINTAINERS delete mode 100644 board/compulab/cm_t54/Makefile delete mode 100644 board/compulab/cm_t54/cm_t54.c delete mode 100644 board/compulab/cm_t54/mux.c delete mode 100644 board/compulab/cm_t54/spl.c delete mode 100644 configs/cm_t54_defconfig delete mode 100644 include/configs/cm_t54.h diff --git a/arch/arm/mach-omap2/omap5/Kconfig b/arch/arm/mach-omap2/omap5/Kconfig index fddbac9dec..a0c0b93a00 100644 --- a/arch/arm/mach-omap2/omap5/Kconfig +++ b/arch/arm/mach-omap2/omap5/Kconfig @@ -9,9 +9,6 @@ choice prompt "OMAP5 board select" optional -config TARGET_CM_T54 - bool "CompuLab CM-T54" - config TARGET_OMAP5_UEVM bool "TI OMAP5 uEVM board" @@ -156,7 +153,6 @@ endchoice endmenu endif -source "board/compulab/cm_t54/Kconfig" source "board/ti/omap5_uevm/Kconfig" source "board/ti/dra7xx/Kconfig" source "board/ti/am57xx/Kconfig" diff --git a/board/compulab/cm_t54/Kconfig b/board/compulab/cm_t54/Kconfig deleted file mode 100644 index 52d38804df..0000000000 --- a/board/compulab/cm_t54/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_CM_T54 - -config SYS_BOARD - default "cm_t54" - -config SYS_VENDOR - default "compulab" - -config SYS_CONFIG_NAME - default "cm_t54" - -endif diff --git a/board/compulab/cm_t54/MAINTAINERS b/board/compulab/cm_t54/MAINTAINERS deleted file mode 100644 index 461fe098c0..0000000000 --- a/board/compulab/cm_t54/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -CM_T54 BOARD -M: Dmitry Lifshitz -S: Maintained -F: board/compulab/cm_t54/ -F: include/configs/cm_t54.h -F: configs/cm_t54_defconfig diff --git a/board/compulab/cm_t54/Makefile b/board/compulab/cm_t54/Makefile deleted file mode 100644 index a907074414..0000000000 --- a/board/compulab/cm_t54/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2014 Compulab Ltd - http://compulab.co.il/ -# -# Author: Dmitry Lifshitz - -obj-y += cm_t54.o -obj-$(CONFIG_SPL_BUILD) += mux.o spl.o diff --git a/board/compulab/cm_t54/cm_t54.c b/board/compulab/cm_t54/cm_t54.c deleted file mode 100644 index 413f3c9c8f..0000000000 --- a/board/compulab/cm_t54/cm_t54.c +++ /dev/null @@ -1,261 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Board functions for Compulab CM-T54 board - * - * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ - * - * Author: Dmitry Lifshitz - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "../common/eeprom.h" - -#define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000) -#define DIE_ID_REG_OFFSET 0x200 - -DECLARE_GLOBAL_DATA_PTR; - -#if !defined(CONFIG_SPL_BUILD) -inline void set_muxconf_regs(void){}; -#endif - -const struct omap_sysinfo sysinfo = { - "Board: CM-T54\n" -}; - -/* - * Routine: board_init - * Description: hardware init. - */ -int board_init(void) -{ - gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100); - - return 0; -} - -/* - * Routine: cm_t54_palmas_regulator_set - * Description: select voltage and turn on/off Palmas PMIC regulator. - */ -static int cm_t54_palmas_regulator_set(u8 vreg, u8 vval, u8 creg, u8 cval) -{ - int err; - - /* Setup voltage */ - err = palmas_i2c_write_u8(TWL603X_CHIP_P1, vreg, vval); - if (err) { - printf("cm_t54: could not set regulator 0x%02x voltage : %d\n", - vreg, err); - return err; - } - - /* Turn on/off regulator */ - err = palmas_i2c_write_u8(TWL603X_CHIP_P1, creg, cval); - if (err) { - printf("cm_t54: could not turn on/off regulator 0x%02x : %d\n", - creg, err); - return err; - } - - return 0; -} - -/* - * Routine: mmc_get_env_part - * Description: setup environment storage device partition. - */ -#ifdef CONFIG_SYS_MMC_ENV_PART -uint mmc_get_env_part(struct mmc *mmc) -{ - u32 bootmode = gd->arch.omap_boot_mode; - uint bootpart = CONFIG_SYS_MMC_ENV_PART; - - /* - * If booted from eMMC boot partition then force eMMC - * FIRST boot partition to be env storage - */ - if (bootmode == BOOT_DEVICE_MMC2) - bootpart = 1; - - return bootpart; -} -#endif - -#if defined(CONFIG_MMC) -#define SB_T54_CD_GPIO 228 -#define SB_T54_WP_GPIO 229 - -int board_mmc_init(bd_t *bis) -{ - int ret0, ret1; - - ret0 = omap_mmc_init(0, 0, 0, SB_T54_CD_GPIO, SB_T54_WP_GPIO); - if (ret0) - printf("cm_t54: failed to initialize mmc0\n"); - - ret1 = omap_mmc_init(1, 0, 0, -1, -1); - if (ret1) - printf("cm_t54: failed to initialize mmc1\n"); - - if (ret0 && ret1) - return -1; - - return 0; -} -#endif - -#ifdef CONFIG_USB_HOST_ETHER - -int ft_board_setup(void *blob, bd_t *bd) -{ - uint8_t enetaddr[6]; - - /* MAC addr */ - if (eth_env_get_enetaddr("usbethaddr", enetaddr)) { - fdt_find_and_setprop(blob, "/smsc95xx@0", "mac-address", - enetaddr, 6, 1); - } - - return 0; -} - -static void generate_mac_addr(uint8_t *enetaddr) -{ - int reg; - - reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET; - - /* - * create a fake MAC address from the processor ID code. - * first byte is 0x02 to signify locally administered. - */ - enetaddr[0] = 0x02; - enetaddr[1] = readl(reg + 0x10) & 0xff; - enetaddr[2] = readl(reg + 0xC) & 0xff; - enetaddr[3] = readl(reg + 0x8) & 0xff; - enetaddr[4] = readl(reg) & 0xff; - enetaddr[5] = (readl(reg) >> 8) & 0xff; -} - -/* - * Routine: handle_mac_address - * Description: prepare MAC address for on-board Ethernet. - */ -static int handle_mac_address(void) -{ - uint8_t enetaddr[6]; - int ret; - - ret = eth_env_get_enetaddr("usbethaddr", enetaddr); - if (ret) - return 0; - - ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); - if (ret || !is_valid_ethaddr(enetaddr)) - generate_mac_addr(enetaddr); - - if (!is_valid_ethaddr(enetaddr)) - return -1; - - return eth_env_set_enetaddr("usbethaddr", enetaddr); -} - -int board_eth_init(bd_t *bis) -{ - return handle_mac_address(); -} -#endif - -#ifdef CONFIG_USB_EHCI_HCD -static struct omap_usbhs_board_data usbhs_bdata = { - .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, - .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC, - .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC, -}; - -static void setup_host_clocks(bool enable) -{ - int usbhost_clk = OPTFCLKEN_HSIC60M_P3_CLK | - OPTFCLKEN_HSIC480M_P3_CLK | - OPTFCLKEN_HSIC60M_P2_CLK | - OPTFCLKEN_HSIC480M_P2_CLK | - OPTFCLKEN_UTMI_P3_CLK | - OPTFCLKEN_UTMI_P2_CLK; - - int usbtll_clk = OPTFCLKEN_USB_CH1_CLK_ENABLE | - OPTFCLKEN_USB_CH2_CLK_ENABLE; - - int usbhub_clk = CKOBUFFER_CLK_ENABLE_MASK; - - if (enable) { - /* Enable port 2 and 3 clocks*/ - setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk); - /* Enable port 2 and 3 usb host ports tll clocks*/ - setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk); - /* Request FREF_XTAL_CLK clock for HSIC USB Hub */ - setbits_le32((*ctrl)->control_ckobuffer, usbhub_clk); - } else { - clrbits_le32((*ctrl)->control_ckobuffer, usbhub_clk); - clrbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk); - clrbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk); - } -} - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - int ret; - - /* VCC_3V3_ETH */ - cm_t54_palmas_regulator_set(SMPS9_VOLTAGE, SMPS_VOLT_3V3, SMPS9_CTRL, - SMPS_MODE_SLP_AUTO | SMPS_MODE_ACT_AUTO); - - setup_host_clocks(true); - - ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); - if (ret < 0) - printf("cm_t54: Failed to initialize ehci : %d\n", ret); - - return ret; -} - -int ehci_hcd_stop(void) -{ - int ret = omap_ehci_hcd_stop(); - - setup_host_clocks(false); - - cm_t54_palmas_regulator_set(SMPS9_VOLTAGE, SMPS_VOLT_OFF, - SMPS9_CTRL, SMPS_MODE_SLP_AUTO); - - return ret; -} - -void usb_hub_reset_devices(struct usb_hub_device *hub, int port) -{ - /* The LAN9730 needs to be reset after the port power has been set. */ - if (port == 3) { - gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0); - udelay(10); - gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1); - } -} -#endif - diff --git a/board/compulab/cm_t54/mux.c b/board/compulab/cm_t54/mux.c deleted file mode 100644 index ea90bc6e34..0000000000 --- a/board/compulab/cm_t54/mux.c +++ /dev/null @@ -1,94 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Pinmux configuration for Compulab CM-T54 board - * - * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ - * - * Author: Dmitry Lifshitz - */ - -#ifndef _CM_T54_MUX_DATA_H -#define _CM_T54_MUX_DATA_H - -#include -#include -#include - -const struct pad_conf_entry core_padconf_array_essential[] = { - /* MMC1 - SD CARD */ - {SDCARD_CLK, (PTU | IEN | M0)}, /* SDCARD_CLK */ - {SDCARD_CMD, (PTU | IEN | M0)}, /* SDCARD_CMD */ - {SDCARD_DATA0, (PTU | IEN | M0)}, /* SDCARD_DATA0 */ - {SDCARD_DATA1, (PTU | IEN | M0)}, /* SDCARD_DATA1 */ - {SDCARD_DATA2, (PTU | IEN | M0)}, /* SDCARD_DATA2 */ - {SDCARD_DATA3, (PTU | IEN | M0)}, /* SDCARD_DATA3 */ - - /* SD CARD CD and WP GPIOs*/ - {TIMER5_PWM_EVT, (PTU | IEN | M6)}, /* GPIO8_228 */ - {TIMER6_PWM_EVT, (PTU | IEN | M6)}, /* GPIO8_229 */ - - /* MMC2 - eMMC */ - {EMMC_CLK, (PTU | IEN | M0)}, /* EMMC_CLK */ - {EMMC_CMD, (PTU | IEN | M0)}, /* EMMC_CMD */ - {EMMC_DATA0, (PTU | IEN | M0)}, /* EMMC_DATA0 */ - {EMMC_DATA1, (PTU | IEN | M0)}, /* EMMC_DATA1 */ - {EMMC_DATA2, (PTU | IEN | M0)}, /* EMMC_DATA2 */ - {EMMC_DATA3, (PTU | IEN | M0)}, /* EMMC_DATA3 */ - {EMMC_DATA4, (PTU | IEN | M0)}, /* EMMC_DATA4 */ - {EMMC_DATA5, (PTU | IEN | M0)}, /* EMMC_DATA5 */ - {EMMC_DATA6, (PTU | IEN | M0)}, /* EMMC_DATA6 */ - {EMMC_DATA7, (PTU | IEN | M0)}, /* EMMC_DATA7 */ - - /* UART4 */ - {I2C5_SCL, (PTU | IEN | M2)}, /* UART4_RX */ - {I2C5_SDA, (M2)}, /* UART4_TX */ - - /* Led */ - {HSI2_CAFLAG, (PTU | M6)}, /* GPIO3_80 */ - - /* I2C1 */ - {I2C1_PMIC_SCL, (PTU | IEN | M0)}, /* I2C1_PMIC_SCL */ - {I2C1_PMIC_SDA, (PTU | IEN | M0)}, /* I2C1_PMIC_SDA */ - - /* USBB2, USBB3 */ - {USBB2_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB2_HSIC_STROBE */ - {USBB2_HSIC_DATA, (PTU | IEN | M0)}, /* USBB2_HSIC_DATA */ - {USBB3_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB3_HSIC_STROBE */ - {USBB3_HSIC_DATA, (PTU | IEN | M0)}, /* USBB3_HSIC_DATA */ - - /* USB Hub and USB Eth reset GPIOs */ - {HSI2_CAREADY, (PTD | M6)}, /* GPIO3_76 */ - {HSI2_ACDATA, (PTD | M6)}, /* GPIO3_83 */ - - /* I2C4 */ - {I2C4_SCL, (PTU | IEN | M0)}, /* I2C4_SCL */ - {I2C4_SDA, (PTU | IEN | M0)}, /* I2C4_SDA */ -}; - -const struct pad_conf_entry wkup_padconf_array_essential[] = { - {SR_PMIC_SCL, (PTU | IEN | M0)}, /* SR_PMIC_SCL */ - {SR_PMIC_SDA, (PTU | IEN | M0)}, /* SR_PMIC_SDA */ - {SYS_32K, (IEN | M0)}, /* SYS_32K */ - - /* USB Hub clock */ - {FREF_CLK1_OUT, (PTD | IEN | M0)}, /* FREF_CLK1_OUT */ -}; - -/* - * Routine: set_muxconf_regs - * Description: setup board pinmux configuration. - */ -void set_muxconf_regs(void) -{ - do_set_mux((*ctrl)->control_padconf_core_base, - core_padconf_array_essential, - sizeof(core_padconf_array_essential) / - sizeof(struct pad_conf_entry)); - - do_set_mux((*ctrl)->control_padconf_wkup_base, - wkup_padconf_array_essential, - sizeof(wkup_padconf_array_essential) / - sizeof(struct pad_conf_entry)); -} - -#endif /* _CM_T54_MUX_DATA_H */ diff --git a/board/compulab/cm_t54/spl.c b/board/compulab/cm_t54/spl.c deleted file mode 100644 index 9daec634cc..0000000000 --- a/board/compulab/cm_t54/spl.c +++ /dev/null @@ -1,65 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * SPL specific code for Compulab CM-T54 board - * - * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ - * - * Author: Dmitry Lifshitz - */ - -#include - -const struct emif_regs emif_regs_ddr3_532_mhz_cm_t54 = { -#if defined(CONFIG_DRAM_1G) || defined(CONFIG_DRAM_512M) - .sdram_config_init = 0x618522B2, - .sdram_config = 0x618522B2, -#elif defined(CONFIG_DRAM_2G) - .sdram_config_init = 0x618522BA, - .sdram_config = 0x618522BA, -#endif - .sdram_config2 = 0x0, - .ref_ctrl = 0x00001040, - .sdram_tim1 = 0xEEEF36F3, - .sdram_tim2 = 0x348F7FDA, - .sdram_tim3 = 0x027F88A8, - .read_idle_ctrl = 0x00050000, - .zq_config = 0x1007190B, - .temp_alert_config = 0x00000000, - - .emif_ddr_phy_ctlr_1_init = 0x0030400B, - .emif_ddr_phy_ctlr_1 = 0x0034400B, - .emif_ddr_ext_phy_ctrl_1 = 0x04040100, - .emif_ddr_ext_phy_ctrl_2 = 0x00000000, - .emif_ddr_ext_phy_ctrl_3 = 0x00000000, - .emif_ddr_ext_phy_ctrl_4 = 0x00000000, - .emif_ddr_ext_phy_ctrl_5 = 0x4350D435, - .emif_rd_wr_lvl_rmp_win = 0x00000000, - .emif_rd_wr_lvl_rmp_ctl = 0x80000000, - .emif_rd_wr_lvl_ctl = 0x00000000, - .emif_rd_wr_exec_thresh = 0x40000305, -}; - -const struct dmm_lisa_map_regs lisa_map_cm_t54 = { - .dmm_lisa_map_0 = 0x0, - .dmm_lisa_map_1 = 0x0, - -#ifdef CONFIG_DRAM_2G - .dmm_lisa_map_2 = 0x80740300, -#elif defined(CONFIG_DRAM_1G) - .dmm_lisa_map_2 = 0x80640300, -#elif defined(CONFIG_DRAM_512M) - .dmm_lisa_map_2 = 0x80500100, -#endif - .dmm_lisa_map_3 = 0x00000000, - .is_ma_present = 0x1, -}; - -void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) -{ - *regs = &emif_regs_ddr3_532_mhz_cm_t54; -} - -void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) -{ - *dmm_lisa_regs = &lisa_map_cm_t54; -} diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig deleted file mode 100644 index 98361c4e27..0000000000 --- a/configs/cm_t54_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_OFFSET=0xC0000 -CONFIG_OMAP54XX=y -CONFIG_TARGET_CM_T54=y -CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC=16296 -CONFIG_SPL=y -CONFIG_ENV_OFFSET_REDUND=0xC4000 -CONFIG_SPL_TEXT_BASE=0x40300000 -CONFIG_DISTRO_DEFAULTS=y -CONFIG_OF_BOARD_SETUP=y -CONFIG_BOOTDELAY=3 -# CONFIG_USE_BOOTCOMMAND is not set -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_MISC_INIT_R is not set -CONFIG_VERSION_VARIABLE=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_SATA_SUPPORT=y -CONFIG_SYS_PROMPT="CM-T54 # " -CONFIG_CMD_ASKENV=y -CONFIG_CMD_EEPROM=y -CONFIG_CMD_EEPROM_LAYOUT=y -CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3" -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_NFS is not set -CONFIG_CMD_EXT4_WRITE=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_SCSI_AHCI=y -CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_MMC_OMAP_HS=y -CONFIG_SCSI=y -CONFIG_CONS_INDEX=4 -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_OMAP3_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_HOST_ETHER=y -CONFIG_USB_ETHER_ASIX=y -CONFIG_USB_ETHER_MCS7830=y -CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_FAT_WRITE=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h deleted file mode 100644 index 50308fb28f..0000000000 --- a/include/configs/cm_t54.h +++ /dev/null @@ -1,120 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Config file for Compulab CM-T54 board - * - * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ - * - * Author: Dmitry Lifshitz - */ - -#ifndef __CONFIG_CM_T54_H -#define __CONFIG_CM_T54_H - -#define CONFIG_CM_T54 -#define CONFIG_DRAM_2G - -#define PARTS_DEFAULT - -#include - -/* EEPROM related defines */ -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -#define CONFIG_SYS_I2C_EEPROM_BUS 0 - -/* Enable SD/MMC CD and WP GPIOs */ -#define OMAP_HSMMC_USE_GPIO - -/* UART setup */ -#define CONFIG_SYS_NS16550_COM4 UART4_BASE - -/* MMC ENV related defines */ - -#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ -#define CONFIG_SYS_MMC_ENV_PART 0 - -/* Enhance our eMMC support / experience. */ -#define CONFIG_HSMMC2_8BIT - -/* SATA Boot related defines */ -#define CONFIG_SPL_SATA_BOOT_DEVICE 0 -#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1 - -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) -/* USB UHH support options */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET - -#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 76 /* HSIC2 HUB #RESET */ -#define CONFIG_OMAP_EHCI_PHY3_RESET_GPIO 83 /* HSIC3 ETH #RESET */ - -/* Enabled commands */ - -/* EEPROM */ -#define CONFIG_ENV_EEPROM_IS_ON_I2C -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 -#define CONFIG_SYS_EEPROM_SIZE 256 - -/* USB Networking options */ - -/* - * Miscellaneous configurable options - */ -#undef CONFIG_SYS_AUTOLOAD -#undef CONFIG_EXTRA_ENV_SETTINGS -#undef CONFIG_BOOTCOMMAND - -#define CONFIG_SYS_AUTOLOAD "no" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - DEFAULT_LINUX_BOOT_ENV \ - "baudrate=115200\0" \ - "bootdelay=3\0" \ - "autoload=no\0" \ - "bootscr=bootscr.img\0" \ - "fdtfile=omap5-sbc-t54.dtb\0" \ - "kernel=zImage-cm-t54\0" \ - "ramdisk=ramdisk-cm-t54.img\0" \ - "console=ttyO3\0" \ - "ramdisksize=16384\0" \ - "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk1p2\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "root=${mmcroot} rw rootwait\0" \ - "ramroot=/dev/ram0\0" \ - "ramargs=setenv bootargs console=${console} " \ - "root=${ramroot} ramdisk_size=${ramdisksize} rw\0" \ - "mmcloadkernel=load mmc ${mmcdev} ${loadaddr} ${kernel}\0" \ - "mmcloadfdt=load mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \ - "mmcloadramdisk=load mmc ${mmcdev} ${rdaddr} ${ramdisk}\0" \ - "mmcloadbootscript=load mmc ${mmcdev} ${loadaddr} ${bootsrc}\0" \ - "mmcbootscript=echo Running bootscript from mmc${mmcdev}...; " \ - "source ${loadaddr}\0" \ - "mmcbootlinux=echo Booting from mmc${mmcdev} ...; " \ - "bootz ${loadaddr} ${rdaddr} ${fdtaddr}\0" \ - "mmcboot=if mmc dev ${mmcdev} && mmc rescan; then " \ - "if run mmcloadbootscript; " \ - "then run mmcbootscript; " \ - "fi; " \ - "if run mmcloadkernel; then " \ - "if run mmcloadfdt; then " \ - "if run mmcloadramdisk; then " \ - "run ramargs; " \ - "run mmcbootlinux; " \ - "fi; " \ - "run mmcargs; " \ - "setenv rdaddr - ; " \ - "run mmcbootlinux; " \ - "fi; " \ - "fi; " \ - "fi;\0" - -#define CONFIG_BOOTCOMMAND \ - "bootcmd=run mmcboot || setenv mmcdev 1; setenv mmcroot /dev/mmcblk0p2; run mmcboot;" - -#endif /* __CONFIG_CM_T54_H */ From patchwork Tue May 26 17:44:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1258 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com 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[209.85.220.65]) by mx.google.com with SMTPS id z1sor818368pfa.34.2020.05.26.10.45.18 for (Google Transport Security); Tue, 26 May 2020 10:45:18 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:aa7:9d8c:: with SMTP id f12mr23355632pfq.224.1590515118311; Tue, 26 May 2020 10:45:18 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id x20sm136232pfc.211.2020.05.26.10.45.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:45:17 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki , Igor Grinberg Subject: [PATCH 04/14] compulab: Drop cm_t54 Date: Tue, 26 May 2020 23:14:39 +0530 Message-Id: <20200526174444.262050-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174444.262050-1-jagan@amarulasolutions.com> References: <20200526174444.262050-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=o5SCtPCG; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , DM, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Cc: Igor Grinberg Signed-off-by: Jagan Teki --- arch/arm/mach-omap2/omap3/Kconfig | 7 - board/compulab/cm_t35/Kconfig | 12 - board/compulab/cm_t35/MAINTAINERS | 6 - board/compulab/cm_t35/Makefile | 8 - board/compulab/cm_t35/cm_t35.c | 513 ------------------------------ configs/cm_t35_defconfig | 65 ---- include/configs/cm_t35.h | 249 --------------- 7 files changed, 860 deletions(-) delete mode 100644 board/compulab/cm_t35/Kconfig delete mode 100644 board/compulab/cm_t35/MAINTAINERS delete mode 100644 board/compulab/cm_t35/Makefile delete mode 100644 board/compulab/cm_t35/cm_t35.c delete mode 100644 configs/cm_t35_defconfig delete mode 100644 include/configs/cm_t35.h diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig index d75fab1530..34a845e9b6 100644 --- a/arch/arm/mach-omap2/omap3/Kconfig +++ b/arch/arm/mach-omap2/omap3/Kconfig @@ -43,12 +43,6 @@ config TARGET_OMAP3_BEAGLE select OMAP3_GPIO_6 imply CMD_DM -config TARGET_CM_T35 - bool "CompuLab CM-T3530 and CM-T3730 boards" - select OMAP3_GPIO_2 - select OMAP3_GPIO_5 - select OMAP3_GPIO_6 if LED_STATUS - config TARGET_DEVKIT8000 bool "TimLL OMAP3 Devkit8000" select DM @@ -174,7 +168,6 @@ config SYS_SOC source "board/logicpd/am3517evm/Kconfig" source "board/ti/beagle/Kconfig" -source "board/compulab/cm_t35/Kconfig" source "board/timll/devkit8000/Kconfig" source "board/ti/evm/Kconfig" source "board/isee/igep00x0/Kconfig" diff --git a/board/compulab/cm_t35/Kconfig b/board/compulab/cm_t35/Kconfig deleted file mode 100644 index d87741f146..0000000000 --- a/board/compulab/cm_t35/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_CM_T35 - -config SYS_BOARD - default "cm_t35" - -config SYS_VENDOR - default "compulab" - -config SYS_CONFIG_NAME - default "cm_t35" - -endif diff --git a/board/compulab/cm_t35/MAINTAINERS b/board/compulab/cm_t35/MAINTAINERS deleted file mode 100644 index fc5d73f04c..0000000000 --- a/board/compulab/cm_t35/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -CM_T35 BOARD -M: Igor Grinberg -S: Maintained -F: board/compulab/cm_t35/ -F: include/configs/cm_t35.h -F: configs/cm_t35_defconfig diff --git a/board/compulab/cm_t35/Makefile b/board/compulab/cm_t35/Makefile deleted file mode 100644 index 929c53c144..0000000000 --- a/board/compulab/cm_t35/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2011 - 2013 CompuLab, Ltd. -# -# Authors: Nikita Kiryanov -# Igor Grinberg - -obj-y += cm_t35.o diff --git a/board/compulab/cm_t35/cm_t35.c b/board/compulab/cm_t35/cm_t35.c deleted file mode 100644 index 4b67df4f1a..0000000000 --- a/board/compulab/cm_t35/cm_t35.c +++ /dev/null @@ -1,513 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2011 - 2013 CompuLab, Ltd. - * - * Authors: Mike Rapoport - * Igor Grinberg - * - * Derived from omap3evm and Beagle Board by - * Manikandan Pillai - * Richard Woodruff - * Syed Mohammed Khasim - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "../common/common.h" -#include "../common/eeprom.h" - -DECLARE_GLOBAL_DATA_PTR; - -const omap3_sysinfo sysinfo = { - DDR_DISCRETE, - "CM-T3x board", - "NAND", -}; - -#ifdef CONFIG_SPL_BUILD -/* - * Routine: get_board_mem_timings - * Description: If we use SPL then there is no x-loader nor config header - * so we have to setup the DDR timings ourself on both banks. - */ -void get_board_mem_timings(struct board_sdrc_timings *timings) -{ - timings->mr = MICRON_V_MR_165; - timings->mcfg = MICRON_V_MCFG_200(256 << 20); /* raswidth 14 needed */ - timings->ctrla = MICRON_V_ACTIMA_165; - timings->ctrlb = MICRON_V_ACTIMB_165; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; -} -#endif - -struct splash_location splash_locations[] = { - { - .name = "nand", - .storage = SPLASH_STORAGE_NAND, - .flags = SPLASH_STORAGE_RAW, - .offset = 0x100000, - }, -}; - -int splash_screen_prepare(void) -{ - return splash_source_load(splash_locations, - ARRAY_SIZE(splash_locations)); -} - -/* - * Routine: board_init - * Description: hardware init. - */ -int board_init(void) -{ - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ - - /* board id for Linux */ - if (get_cpu_family() == CPU_OMAP34XX) - gd->bd->bi_arch_number = MACH_TYPE_CM_T35; - else - gd->bd->bi_arch_number = MACH_TYPE_CM_T3730; - - /* boot param addr */ - gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); - -#if defined(CONFIG_LED_STATUS) && defined(CONFIG_LED_STATUS_BOOT_ENABLE) - status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_ON); -#endif - - return 0; -} - -/* - * Routine: get_board_rev - * Description: read system revision - */ -u32 get_board_rev(void) -{ - return cl_eeprom_get_board_rev(CONFIG_SYS_I2C_EEPROM_BUS); -}; - -int misc_init_r(void) -{ - cl_print_pcb_info(); - omap_die_id_display(); - - return 0; -} - -/* - * Routine: set_muxconf_regs - * Description: Setting up the configuration Mux registers specific to the - * hardware. Many pins need to be moved from protect to primary - * mode. - */ -static void cm_t3x_set_common_muxconf(void) -{ - /* SDRC */ - MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)); /*SDRC_D0*/ - MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)); /*SDRC_D1*/ - MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)); /*SDRC_D2*/ - MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)); /*SDRC_D3*/ - MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)); /*SDRC_D4*/ - MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)); /*SDRC_D5*/ - MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)); /*SDRC_D6*/ - MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)); /*SDRC_D7*/ - MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)); /*SDRC_D8*/ - MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)); /*SDRC_D9*/ - MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)); /*SDRC_D10*/ - MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)); /*SDRC_D11*/ - MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)); /*SDRC_D12*/ - MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)); /*SDRC_D13*/ - MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)); /*SDRC_D14*/ - MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)); /*SDRC_D15*/ - MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)); /*SDRC_D16*/ - MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)); /*SDRC_D17*/ - MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)); /*SDRC_D18*/ - MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)); /*SDRC_D19*/ - MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)); /*SDRC_D20*/ - MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)); /*SDRC_D21*/ - MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)); /*SDRC_D22*/ - MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)); /*SDRC_D23*/ - MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)); /*SDRC_D24*/ - MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)); /*SDRC_D25*/ - MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)); /*SDRC_D26*/ - MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)); /*SDRC_D27*/ - MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)); /*SDRC_D28*/ - MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)); /*SDRC_D29*/ - MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)); /*SDRC_D30*/ - MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)); /*SDRC_D31*/ - MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)); /*SDRC_CLK*/ - MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)); /*SDRC_DQS0*/ - MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)); /*SDRC_DQS1*/ - MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)); /*SDRC_DQS2*/ - MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)); /*SDRC_DQS3*/ - MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); /*SDRC_CKE0*/ - MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)); /*SDRC_CKE1*/ - - /* GPMC */ - MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); /*GPMC_A1*/ - MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); /*GPMC_A2*/ - MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)); /*GPMC_A3*/ - MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)); /*GPMC_A4*/ - MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)); /*GPMC_A5*/ - MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)); /*GPMC_A6*/ - MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)); /*GPMC_A7*/ - MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)); /*GPMC_A8*/ - MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)); /*GPMC_A9*/ - MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)); /*GPMC_A10*/ - MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)); /*GPMC_D0*/ - MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)); /*GPMC_D1*/ - MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)); /*GPMC_D2*/ - MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)); /*GPMC_D3*/ - MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)); /*GPMC_D4*/ - MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)); /*GPMC_D5*/ - MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)); /*GPMC_D6*/ - MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)); /*GPMC_D7*/ - MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)); /*GPMC_D8*/ - MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)); /*GPMC_D9*/ - MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)); /*GPMC_D10*/ - MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)); /*GPMC_D11*/ - MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)); /*GPMC_D12*/ - MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)); /*GPMC_D13*/ - MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)); /*GPMC_D14*/ - MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)); /*GPMC_D15*/ - MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)); /*GPMC_nCS0*/ - - /* SB-T35 Ethernet */ - MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)); /*GPMC_nCS4*/ - - /* DVI enable */ - MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | DIS | M4));/*GPMC_nCS3*/ - - /* DataImage backlight */ - MUX_VAL(CP(GPMC_NCS7), (IDIS | PTU | DIS | M4));/*GPIO_58*/ - - /* CM-T3x Ethernet */ - MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M0)); /*GPMC_nCS5*/ - MUX_VAL(CP(GPMC_CLK), (IEN | PTD | DIS | M4)); /*GPIO_59*/ - MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)); /*nADV_ALE*/ - MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)); /*nOE*/ - MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)); /*nWE*/ - MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)); /*nBE0_CLE*/ - MUX_VAL(CP(GPMC_NBE1), (IDIS | PTD | DIS | M4)); /*GPIO_61*/ - MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)); /*nWP*/ - MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)); /*WAIT0*/ - - /* DSS */ - MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)); /*DSS_PCLK*/ - MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)); /*DSS_HSYNC*/ - MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)); /*DSS_VSYNC*/ - MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)); /*DSS_ACBIAS*/ - MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/ - MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)); /*DSS_DATA7*/ - MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)); /*DSS_DATA8*/ - MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)); /*DSS_DATA9*/ - MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)); /*DSS_DATA10*/ - MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)); /*DSS_DATA11*/ - MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)); /*DSS_DATA12*/ - MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)); /*DSS_DATA13*/ - MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)); /*DSS_DATA14*/ - MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)); /*DSS_DATA15*/ - MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)); /*DSS_DATA16*/ - MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)); /*DSS_DATA17*/ - - /* serial interface */ - MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)); /*UART3_RX*/ - MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)); /*UART3_TX*/ - - /* mUSB */ - MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)); /*HSUSB0_CLK*/ - MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)); /*HSUSB0_STP*/ - MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)); /*HSUSB0_DIR*/ - MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)); /*HSUSB0_NXT*/ - MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA0*/ - MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA1*/ - MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA2*/ - MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA3*/ - MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA4*/ - MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA5*/ - MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA6*/ - MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA7*/ - - /* USB EHCI */ - MUX_VAL(CP(ETK_D0_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT0*/ - MUX_VAL(CP(ETK_D1_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT1*/ - MUX_VAL(CP(ETK_D2_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT2*/ - MUX_VAL(CP(ETK_D7_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT3*/ - MUX_VAL(CP(ETK_D4_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT4*/ - MUX_VAL(CP(ETK_D5_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT5*/ - MUX_VAL(CP(ETK_D6_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT6*/ - MUX_VAL(CP(ETK_D3_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT7*/ - MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DIR*/ - MUX_VAL(CP(ETK_D9_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_NXT*/ - MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M3)); /*HSUSB1_CLK*/ - MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | DIS | M3)); /*HSUSB1_STP*/ - - MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_DT0*/ - MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_DT1*/ - MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M3)); /*HSUSB2_DT2*/ - MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M3)); /*HSUSB2_DT3*/ - MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | EN | M3)); /*HSUSB2_DT4*/ - MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | EN | M3)); /*HSUSB2_DT5*/ - MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M3)); /*HSUSB2_DT6*/ - MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | EN | M3)); /*HSUSB2_DT7*/ - MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_DIR*/ - MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_NXT*/ - MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)); /*HSUSB2_CLK*/ - MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | DIS | M3)); /*HSUSB2_STP*/ - - /* SB_T35_USB_HUB_RESET_GPIO */ - MUX_VAL(CP(CAM_WEN), (IDIS | PTD | DIS | M4)); /*GPIO_167*/ - - /* I2C1 */ - MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)); /*I2C1_SCL*/ - MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)); /*I2C1_SDA*/ - /* I2C2 */ - MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)); /*I2C2_SCL*/ - MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)); /*I2C2_SDA*/ - /* I2C3 */ - MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)); /*I2C3_SCL*/ - MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)); /*I2C3_SDA*/ - - /* control and debug */ - MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)); /*SYS_32K*/ - MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)); /*SYS_CLKREQ*/ - MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)); /*SYS_nIRQ*/ - MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)); /*OFF_MODE*/ - MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)); /*CLKOUT1*/ - MUX_VAL(CP(SYS_CLKOUT2), (IDIS | PTU | DIS | M4)); /*green LED*/ - MUX_VAL(CP(JTAG_NTRST), (IEN | PTD | DIS | M0)); /*JTAG_NTRST*/ - MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)); /*JTAG_TCK*/ - MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)); /*JTAG_TMS*/ - MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)); /*JTAG_TDI*/ - - /* MMC1 */ - MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)); /*MMC1_CLK*/ - MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)); /*MMC1_CMD*/ - MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)); /*MMC1_DAT0*/ - MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)); /*MMC1_DAT1*/ - MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); /*MMC1_DAT2*/ - MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); /*MMC1_DAT3*/ - - /* SPI */ - MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M1)); /*MCSPI4_CLK*/ - MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | DIS | M1)); /*MCSPI4_SIMO*/ - MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M1)); /*MCSPI4_SOMI*/ - MUX_VAL(CP(MCBSP1_FSX), (IEN | PTU | EN | M1)); /*MCSPI4_CS0*/ - - /* display controls */ - MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | DIS | M4)); /*GPIO_157*/ -} - -static void cm_t35_set_muxconf(void) -{ - /* DSS */ - MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)); /*DSS_DATA0*/ - MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)); /*DSS_DATA1*/ - MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)); /*DSS_DATA2*/ - MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)); /*DSS_DATA3*/ - MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)); /*DSS_DATA4*/ - MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)); /*DSS_DATA5*/ - - MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)); /*DSS_DATA18*/ - MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)); /*DSS_DATA19*/ - MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)); /*DSS_DATA20*/ - MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)); /*DSS_DATA21*/ - MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)); /*DSS_DATA22*/ - MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)); /*DSS_DATA23*/ - - /* MMC1 */ - MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)); /*MMC1_DAT4*/ - MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)); /*MMC1_DAT5*/ - MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)); /*MMC1_DAT6*/ - MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)); /*MMC1_DAT7*/ -} - -static void cm_t3730_set_muxconf(void) -{ - /* DSS */ - MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M3)); /*DSS_DATA0*/ - MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M3)); /*DSS_DATA1*/ - MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M3)); /*DSS_DATA2*/ - MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M3)); /*DSS_DATA3*/ - MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M3)); /*DSS_DATA4*/ - MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M3)); /*DSS_DATA5*/ - - MUX_VAL(CP(SYS_BOOT0), (IDIS | PTD | DIS | M3)); /*DSS_DATA18*/ - MUX_VAL(CP(SYS_BOOT1), (IDIS | PTD | DIS | M3)); /*DSS_DATA19*/ - MUX_VAL(CP(SYS_BOOT3), (IDIS | PTD | DIS | M3)); /*DSS_DATA20*/ - MUX_VAL(CP(SYS_BOOT4), (IDIS | PTD | DIS | M3)); /*DSS_DATA21*/ - MUX_VAL(CP(SYS_BOOT5), (IDIS | PTD | DIS | M3)); /*DSS_DATA22*/ - MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M3)); /*DSS_DATA23*/ -} - -void set_muxconf_regs(void) -{ - cm_t3x_set_common_muxconf(); - - if (get_cpu_family() == CPU_OMAP34XX) - cm_t35_set_muxconf(); - else - cm_t3730_set_muxconf(); -} - -#if defined(CONFIG_MMC) -#define SB_T35_WP_GPIO 59 - -int board_mmc_getcd(struct mmc *mmc) -{ - u8 val; - - if (twl4030_i2c_read_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO, &val)) - return -1; - - return !(val & 1); -} - -int board_mmc_init(bd_t *bis) -{ - return omap_mmc_init(0, 0, 0, -1, SB_T35_WP_GPIO); -} -#endif - -#if defined(CONFIG_MMC) -void board_mmc_power_init(void) -{ - twl4030_power_mmc_init(0); -} -#endif - -#ifdef CONFIG_SYS_I2C_OMAP24XX -/* - * Routine: reset_net_chip - * Description: reset the Ethernet controller via TPS65930 GPIO - */ -static int cm_t3x_reset_net_chip(int gpio) -{ - /* Set GPIO1 of TPS65930 as output */ - twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x03, - 0x02); - /* Send a pulse on the GPIO pin */ - twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x0C, - 0x02); - udelay(1); - twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x09, - 0x02); - mdelay(40); - twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x0C, - 0x02); - mdelay(1); - return 0; -} -#else -static inline int cm_t3x_reset_net_chip(int gpio) { return 0; } -#endif - -#ifdef CONFIG_SMC911X -/* - * Routine: handle_mac_address - * Description: prepare MAC address for on-board Ethernet. - */ -static int handle_mac_address(void) -{ - unsigned char enetaddr[6]; - int rc; - - rc = eth_env_get_enetaddr("ethaddr", enetaddr); - if (rc) - return 0; - - rc = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); - if (rc) - return rc; - - if (!is_valid_ethaddr(enetaddr)) - return -1; - - return eth_env_set_enetaddr("ethaddr", enetaddr); -} - -/* - * Routine: board_eth_init - * Description: initialize module and base-board Ethernet chips - */ -#define SB_T35_SMC911X_BASE (CONFIG_SMC911X_BASE + SZ_16M) -int board_eth_init(bd_t *bis) -{ - int rc = 0, rc1 = 0; - - rc1 = handle_mac_address(); - if (rc1) - printf("No MAC address found! "); - - rc1 = cl_omap3_smc911x_init(0, 5, CONFIG_SMC911X_BASE, - cm_t3x_reset_net_chip, -EINVAL); - if (rc1 > 0) - rc++; - - rc1 = cl_omap3_smc911x_init(1, 4, SB_T35_SMC911X_BASE, NULL, -EINVAL); - if (rc1 > 0) - rc++; - - return rc; -} -#endif - -#ifdef CONFIG_USB_EHCI_OMAP -struct omap_usbhs_board_data usbhs_bdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, -}; - -#define SB_T35_USB_HUB_RESET_GPIO 167 -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - u8 val; - int offset; - - cl_usb_hub_init(SB_T35_USB_HUB_RESET_GPIO, "sb-t35 hub rst"); - - offset = TWL4030_BASEADD_GPIO + TWL4030_GPIO_GPIODATADIR1; - twl4030_i2c_read_u8(TWL4030_CHIP_GPIO, offset, &val); - /* Set GPIO6 and GPIO7 of TPS65930 as output */ - val |= 0xC0; - twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, offset, val); - offset = TWL4030_BASEADD_GPIO + TWL4030_GPIO_SETGPIODATAOUT1; - /* Take both PHYs out of reset */ - twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, offset, 0xC0); - udelay(1); - - return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); -} - -int ehci_hcd_stop(void) -{ - cl_usb_hub_deinit(SB_T35_USB_HUB_RESET_GPIO); - return omap_ehci_hcd_stop(); -} -#endif /* CONFIG_USB_EHCI_OMAP */ diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig deleted file mode 100644 index bec675c2c4..0000000000 --- a/configs/cm_t35_defconfig +++ /dev/null @@ -1,65 +0,0 @@ -CONFIG_ARM=y -# CONFIG_SYS_THUMB_BUILD is not set -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_SYS_TEXT_BASE=0x80008000 -CONFIG_ENV_SIZE=0x4000 -CONFIG_TARGET_CM_T35=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_SPL=y -CONFIG_SPL_TEXT_BASE=0x40200800 -CONFIG_BOOTDELAY=3 -# CONFIG_CONSOLE_MUX is not set -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -# CONFIG_SPL_FS_EXT4 is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="CM-T3x # " -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_EEPROM=y -CONFIG_CMD_EEPROM_LAYOUT=y -CONFIG_EEPROM_LAYOUT_HELP_STRING="v1, v2, v3" -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_PING=y -CONFIG_CMD_BMP=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=nand" -CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:512k(x-loader),1920k(u-boot),256k(u-boot-env),4m(kernel),-(fs)" -CONFIG_ENV_IS_IN_NAND=y -CONFIG_LED_STATUS=y -CONFIG_LED_STATUS_GPIO=y -CONFIG_LED_STATUS0=y -CONFIG_LED_STATUS_BIT=186 -CONFIG_LED_STATUS_STATE=2 -CONFIG_LED_STATUS_BOOT_ENABLE=y -CONFIG_LED_STATUS_BOOT=0 -CONFIG_TWL4030_LED=y -CONFIG_MMC_OMAP_HS=y -CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y -CONFIG_SPL_NAND_SIMPLE=y -CONFIG_SMC911X=y -CONFIG_SMC911X_BASE=0x2C000000 -CONFIG_SMC911X_32_BIT=y -CONFIG_CONS_INDEX=3 -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_OMAP3_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_MUSB_UDC=y -CONFIG_USB_OMAP3=y -CONFIG_TWL4030_USB=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_VIDEO_OMAP3=y -CONFIG_LCD=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h deleted file mode 100644 index fffea0da18..0000000000 --- a/include/configs/cm_t35.h +++ /dev/null @@ -1,249 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2011 CompuLab, Ltd. - * Mike Rapoport - * Igor Grinberg - * - * Based on omap3_beagle.h - * (C) Copyright 2006-2008 - * Texas Instruments. - * Richard Woodruff - * Syed Mohammed Khasim - * - * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_SYS_CACHELINE_SIZE 64 - -/* - * High Level Configuration Options - */ -#define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */ - -#include /* get chip and board defs */ -#include - -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_REVISION_TAG -#define CONFIG_SERIAL_TAG - -/* - * Size of malloc() pool - */ - /* Sector */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) - -/* - * Hardware drivers - */ - -/* - * NS16550 Configuration - */ -#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ - -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK - -/* - * select serial console configuration - */ -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ - 115200} - -/* USB device configuration */ -#define CONFIG_USB_DEVICE -#define CONFIG_USB_TTY - -/* commands to include */ - -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -#define CONFIG_SYS_I2C_EEPROM_BUS 0 -#define CONFIG_I2C_MULTI_BUS - -/* - * TWL4030 - */ - -/* - * Board NAND Info. - */ -#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ - /* to access nand at */ - /* CS0 */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ - /* devices */ - -/* Environment information */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x82000000\0" \ - "usbtty=cdc_acm\0" \ - "console=ttyO2,115200n8\0" \ - "mpurate=500\0" \ - "vram=12M\0" \ - "dvimode=1024x768MR-16@60\0" \ - "defaultdisplay=dvi\0" \ - "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext4 rootwait\0" \ - "nandroot=/dev/mtdblock4 rw\0" \ - "nandrootfstype=ubifs\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "mpurate=${mpurate} " \ - "vram=${vram} " \ - "omapfb.mode=dvi:${dvimode} " \ - "omapdss.def_disp=${defaultdisplay} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "nandargs=setenv bootargs console=${console} " \ - "mpurate=${mpurate} " \ - "vram=${vram} " \ - "omapfb.mode=dvi:${dvimode} " \ - "omapdss.def_disp=${defaultdisplay} " \ - "root=${nandroot} " \ - "rootfstype=${nandrootfstype}\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source ${loadaddr}\0" \ - "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "nandboot=echo Booting from nand ...; " \ - "run nandargs; " \ - "nand read ${loadaddr} 2a0000 400000; " \ - "bootm ${loadaddr}\0" \ - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else run nandboot; " \ - "fi; " \ - "fi; " \ - "else run nandboot; fi" - -/* - * Miscellaneous configurable options - */ -#define CONFIG_TIMESTAMP -#define CONFIG_SYS_AUTOLOAD "no" - - /* works on */ - -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ - /* load address */ - -/* - * OMAP3 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -/* **** PISMO SUPPORT *** */ -/* Monitor at start of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ - -/* additions for new relocation code, must be added to all boards */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -/* Status LED */ -#define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */ - -#define CONFIG_SPLASHIMAGE_GUARD - -/* Display Configuration */ -#define LCD_BPP LCD_COLOR16 - -#define CONFIG_SPLASH_SCREEN -#define CONFIG_SPLASH_SOURCE -#define CONFIG_BMP_16BPP -#define CONFIG_SCF0403_LCD - -/* Defines for SPL */ - -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - -#define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_DRIVERS -#define CONFIG_SPL_NAND_ECC - -/* NAND boot config */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS -/* - * Use the ECC/OOB layout from omap_gpmc.h that matches your chip: - * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT - */ -#define CONFIG_SYS_NAND_ECCPOS { 1, 2, 3, 4, 5, 6, 7, 8, 9, \ - 10, 11, 12 } -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW - -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 - -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ - CONFIG_SPL_TEXT_BASE) - -/* - * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the - * older x-loader implementations. And move the BSS area so that it - * doesn't overlap with TEXT_BASE. - */ -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ - -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 - -/* EEPROM */ -#define CONFIG_ENV_EEPROM_IS_ON_I2C -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 -#define CONFIG_SYS_EEPROM_SIZE 256 - -#endif /* __CONFIG_H */ From patchwork Tue May 26 17:44:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1259 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-il1-f200.google.com (mail-il1-f200.google.com [209.85.166.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id C69DF3F1DD for ; Tue, 26 May 2020 19:45:25 +0200 (CEST) Received: by mail-il1-f200.google.com with SMTP id k77sf3041873ilg.7 for ; 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[209.85.220.65]) by mx.google.com with SMTPS id x18sor604775ilp.147.2020.05.26.10.45.22 for (Google Transport Security); Tue, 26 May 2020 10:45:22 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:902:10e:: with SMTP id 14mr2160966plb.180.1590515121482; Tue, 26 May 2020 10:45:21 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id x20sm136232pfc.211.2020.05.26.10.45.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:45:20 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki , Steve Sakoman Subject: [PATCH 05/14] Overo: Drop omap3 overo Date: Tue, 26 May 2020 23:14:40 +0530 Message-Id: <20200526174444.262050-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174444.262050-1-jagan@amarulasolutions.com> References: <20200526174444.262050-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=mrwg9AdM; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , OF_CONTROL, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Cc: Steve Sakoman Signed-off-by: Jagan Teki --- arch/arm/mach-omap2/omap3/Kconfig | 13 - board/overo/Kconfig | 9 - board/overo/MAINTAINERS | 6 - board/overo/Makefile | 10 - board/overo/common.c | 368 -------------------------- board/overo/overo.c | 411 ------------------------------ board/overo/overo.h | 169 ------------ board/overo/spl.c | 61 ----- configs/omap3_overo_defconfig | 53 ---- doc/README.omap3 | 6 - include/configs/omap3_overo.h | 184 ------------- 11 files changed, 1290 deletions(-) delete mode 100644 board/overo/Kconfig delete mode 100644 board/overo/MAINTAINERS delete mode 100644 board/overo/Makefile delete mode 100644 board/overo/common.c delete mode 100644 board/overo/overo.c delete mode 100644 board/overo/overo.h delete mode 100644 board/overo/spl.c delete mode 100644 configs/omap3_overo_defconfig delete mode 100644 include/configs/omap3_overo.h diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig index 34a845e9b6..306c2596d3 100644 --- a/arch/arm/mach-omap2/omap3/Kconfig +++ b/arch/arm/mach-omap2/omap3/Kconfig @@ -68,18 +68,6 @@ config TARGET_OMAP3_IGEP00X0 select OMAP3_GPIO_6 imply CMD_DM -config TARGET_OMAP3_OVERO - bool "OMAP35xx Gumstix Overo" - select DM - select DM_GPIO - select DM_SERIAL - select OMAP3_GPIO_2 - select OMAP3_GPIO_3 - select OMAP3_GPIO_4 - select OMAP3_GPIO_5 - select OMAP3_GPIO_6 - imply CMD_DM - config TARGET_OMAP3_ZOOM1 bool "TI Zoom1" select DM @@ -171,7 +159,6 @@ source "board/ti/beagle/Kconfig" source "board/timll/devkit8000/Kconfig" source "board/ti/evm/Kconfig" source "board/isee/igep00x0/Kconfig" -source "board/overo/Kconfig" source "board/logicpd/zoom1/Kconfig" source "board/ti/am3517crane/Kconfig" source "board/pandora/Kconfig" diff --git a/board/overo/Kconfig b/board/overo/Kconfig deleted file mode 100644 index 74572a62be..0000000000 --- a/board/overo/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_OMAP3_OVERO - -config SYS_BOARD - default "overo" - -config SYS_CONFIG_NAME - default "omap3_overo" - -endif diff --git a/board/overo/MAINTAINERS b/board/overo/MAINTAINERS deleted file mode 100644 index 8f089e87f8..0000000000 --- a/board/overo/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -OVERO BOARD -M: Steve Sakoman -S: Maintained -F: board/overo/ -F: include/configs/omap3_overo.h -F: configs/omap3_overo_defconfig diff --git a/board/overo/Makefile b/board/overo/Makefile deleted file mode 100644 index b62bab9fe4..0000000000 --- a/board/overo/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -ifdef CONFIG_SPL_BUILD -obj-y := spl.o common.o -else -obj-y := overo.o common.o -endif diff --git a/board/overo/common.c b/board/overo/common.c deleted file mode 100644 index 67823e68b6..0000000000 --- a/board/overo/common.c +++ /dev/null @@ -1,368 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Maintainer : Steve Sakoman - * - * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by - * Richard Woodruff - * Syed Mohammed Khasim - * Sunil Kumar - * Shashi Ranjan - * - * (C) Copyright 2004-2008 - * Texas Instruments, - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -#define TWL4030_I2C_BUS 0 - -/* - * Routine: board_init - * Description: Early hardware init. - */ -int board_init(void) -{ - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ - /* board id for Linux */ - gd->bd->bi_arch_number = MACH_TYPE_OVERO; - /* boot param addr */ - gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); - - return 0; -} - -#if defined(CONFIG_MMC) -int board_mmc_init(bd_t *bis) -{ - return omap_mmc_init(0, 0, 0, -1, -1); -} -#endif - -#if defined(CONFIG_MMC) -void board_mmc_power_init(void) -{ - twl4030_power_mmc_init(0); -} -#endif - -#if defined(CONFIG_SPL_OS_BOOT) -int spl_start_uboot(void) -{ - /* break into full u-boot on 'c' */ - if (serial_tstc() && serial_getc() == 'c') - return 1; - - return 0; -} -#endif /* CONFIG_SPL_OS_BOOT */ - -#define MUX_OVERO() \ - /*SDRC*/\ - MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\ - MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\ - MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\ - MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\ - MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\ - MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\ - MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\ - MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\ - MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\ - MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\ - MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\ - MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\ - MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\ - MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\ - MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\ - MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\ - MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\ - MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\ - MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\ - MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\ - MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\ - MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\ - MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\ - MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\ - MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\ - MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\ - MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\ - MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\ - MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\ - MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\ - MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\ - MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\ - MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\ - MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\ - MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\ - MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ - MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ - /*GPMC*/\ - MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) /*GPMC_A1*/\ - MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) /*GPMC_A2*/\ - MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) /*GPMC_A3*/\ - MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) /*GPMC_A4*/\ - MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) /*GPMC_A5*/\ - MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) /*GPMC_A6*/\ - MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) /*GPMC_A7*/\ - MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) /*GPMC_A8*/\ - MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) /*GPMC_A9*/\ - MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) /*GPMC_A10*/\ - MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) /*GPMC_D0*/\ - MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) /*GPMC_D1*/\ - MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) /*GPMC_D2*/\ - MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) /*GPMC_D3*/\ - MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) /*GPMC_D4*/\ - MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) /*GPMC_D5*/\ - MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) /*GPMC_D6*/\ - MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) /*GPMC_D7*/\ - MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) /*GPMC_D8*/\ - MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) /*GPMC_D9*/\ - MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) /*GPMC_D10*/\ - MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) /*GPMC_D11*/\ - MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) /*GPMC_D12*/\ - MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) /*GPMC_D13*/\ - MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) /*GPMC_D14*/\ - MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) /*GPMC_D15*/\ - MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ - MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\ - MUX_VAL(CP(GPMC_NCS3), (IEN | PTU | EN | M4)) /*GPIO_54*/\ - /* - MMC1_WP*/\ - MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M0)) /*GPMC_nCS7*/\ - MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /*GPMC_nCS3*/\ - MUX_VAL(CP(GPMC_CLK), (IEN | PTU | EN | M0)) /*GPMC_CLK*/\ - MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ - MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ - MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\ - MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\ - MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\ - MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\ - /*CAMERA*/\ - MUX_VAL(CP(CAM_HS), (IEN | PTU | DIS | M0)) /*CAM_HS */\ - MUX_VAL(CP(CAM_VS), (IEN | PTU | DIS | M0)) /*CAM_VS */\ - MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) /*CAM_XCLKA*/\ - MUX_VAL(CP(CAM_PCLK), (IEN | PTU | DIS | M0)) /*CAM_PCLK*/\ - MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) /*CAM_D0*/\ - MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) /*CAM_D1*/\ - MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) /*CAM_D2*/\ - MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) /*CAM_D3*/\ - MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) /*CAM_D4*/\ - MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) /*CAM_D5*/\ - MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) /*CAM_D6*/\ - MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) /*CAM_D7*/\ - MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) /*CAM_D8*/\ - MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) /*CAM_D9*/\ - MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) /*CAM_D10*/\ - MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) /*CAM_D11*/\ - MUX_VAL(CP(CSI2_DX0), (IEN | PTD | EN | M4)) /*GPIO_112*/\ - MUX_VAL(CP(CSI2_DY0), (IEN | PTD | EN | M4)) /*GPIO_113*/\ - MUX_VAL(CP(CSI2_DY1), (IEN | PTD | EN | M4)) /*GPIO_115*/\ - /*Audio Interface */\ - MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\ - MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | DIS | M0)) /*McBSP2_CLKX*/\ - MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\ - MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\ - /*Expansion card */\ - MUX_VAL(CP(MMC1_CLK), (IEN | PTU | EN | M0)) /*MMC1_CLK*/\ - MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\ - MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\ - MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\ - MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\ - MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\ - MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)) /*MMC1_DAT4*/\ - MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)) /*MMC1_DAT5*/\ - MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)) /*MMC1_DAT6*/\ - MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)) /*MMC1_DAT7*/\ - /*Wireless LAN */\ - MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M4)) /*GPIO_130*/\ - MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\ - MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)) /*MMC2_DAT0*/\ - MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)) /*MMC2_DAT1*/\ - MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)) /*MMC2_DAT2*/\ - MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)) /*MMC2_DAT3*/\ - MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M1)) /*MMC2_DIR_DAT0*/\ - MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M1)) /*MMC2_DIR_DAT1*/\ - MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M1)) /*MMC2_DIR_CMD*/\ - MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139*/\ - /*Bluetooth*/\ - MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M1)) /*UART2_CTS*/\ - MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\ - MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M1)) /*UART2_TX*/\ - MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M1)) /*UART2_RX*/\ - MUX_VAL(CP(UART1_RTS), (IEN | PTU | DIS | M4)) /*GPIO_149*/ \ - MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M0)) /*McBSP4_CLKX*/\ - MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M0)) /*McBSP4_DR*/\ - MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M0)) /*McBSP4_DX*/\ - MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M0)) /*McBSP4_FSX*/\ - MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)) /*McBSP1_CLKR*/\ - MUX_VAL(CP(MCBSP1_FSR), (IEN | PTD | DIS | M0)) /*McBSP1_FSR*/\ - MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | DIS | M0)) /*McBSP1_DX*/\ - MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M0)) /*McBSP1_DR*/\ - MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*McBSP_CLKS*/\ - MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) /*McBSP1_FSX*/\ - MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) /*McBSP1_CLKX*/\ - /*Serial Interface*/\ - MUX_VAL(CP(UART3_RTS_SD), (IEN | PTU | EN | M4)) /*GPIO_164 W2W_*/\ - /* BT_NRESET*/\ - MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTU | EN | M0)) /*UART3_RX_IRRX*/\ - MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*UART3_TX_IRTX*/\ - MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\ - MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\ - MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\ - MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\ - MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0*/\ - MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1*/\ - MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2*/\ - MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3*/\ - MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4*/\ - MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5*/\ - MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6*/\ - MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7*/\ - MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL*/\ - MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA*/\ - MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M4)) /*GPIO_168*/\ - /* - USBH_CPEN*/\ - MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M4)) /*GPIO_183*/\ - /* - USBH_RESET*/\ - MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) /*I2C3_SCL*/\ - MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA*/\ - MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\ - MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA*/\ - MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA2*/\ - MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA7*/\ - MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA4*/\ - MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA5*/\ - MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA6*/\ - MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA3*/\ - /*Control and debug */\ - MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\ - MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\ - MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\ - MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ - MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\ - MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4 - MMC1_WP*/\ - MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ - MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ - MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ - MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/\ - MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE*/\ - MUX_VAL(CP(ETK_D1_ES2), (IEN | PTD | EN | M4)) /*GPIO_15 - X_GATE*/\ - MUX_VAL(CP(ETK_D2_ES2), (IEN | PTU | EN | M4)) /*GPIO_16*/\ - /* - W2W_NRESET*/\ - MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\ - MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\ - MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_DIR*/\ - MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_NXT*/\ - MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA0*/\ - MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA1*/\ - /* die to die */\ - MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\ - MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\ - MUX_VAL(CP(D2D_MCAD3), (IEN | PTD | EN | M0)) /*d2d_mcad3*/\ - MUX_VAL(CP(D2D_MCAD4), (IEN | PTD | EN | M0)) /*d2d_mcad4*/\ - MUX_VAL(CP(D2D_MCAD5), (IEN | PTD | EN | M0)) /*d2d_mcad5*/\ - MUX_VAL(CP(D2D_MCAD6), (IEN | PTD | EN | M0)) /*d2d_mcad6*/\ - MUX_VAL(CP(D2D_MCAD7), (IEN | PTD | EN | M0)) /*d2d_mcad7*/\ - MUX_VAL(CP(D2D_MCAD8), (IEN | PTD | EN | M0)) /*d2d_mcad8*/\ - MUX_VAL(CP(D2D_MCAD9), (IEN | PTD | EN | M0)) /*d2d_mcad9*/\ - MUX_VAL(CP(D2D_MCAD10), (IEN | PTD | EN | M0)) /*d2d_mcad10*/\ - MUX_VAL(CP(D2D_MCAD11), (IEN | PTD | EN | M0)) /*d2d_mcad11*/\ - MUX_VAL(CP(D2D_MCAD12), (IEN | PTD | EN | M0)) /*d2d_mcad12*/\ - MUX_VAL(CP(D2D_MCAD13), (IEN | PTD | EN | M0)) /*d2d_mcad13*/\ - MUX_VAL(CP(D2D_MCAD14), (IEN | PTD | EN | M0)) /*d2d_mcad14*/\ - MUX_VAL(CP(D2D_MCAD15), (IEN | PTD | EN | M0)) /*d2d_mcad15*/\ - MUX_VAL(CP(D2D_MCAD16), (IEN | PTD | EN | M0)) /*d2d_mcad16*/\ - MUX_VAL(CP(D2D_MCAD17), (IEN | PTD | EN | M0)) /*d2d_mcad17*/\ - MUX_VAL(CP(D2D_MCAD18), (IEN | PTD | EN | M0)) /*d2d_mcad18*/\ - MUX_VAL(CP(D2D_MCAD19), (IEN | PTD | EN | M0)) /*d2d_mcad19*/\ - MUX_VAL(CP(D2D_MCAD20), (IEN | PTD | EN | M0)) /*d2d_mcad20*/\ - MUX_VAL(CP(D2D_MCAD21), (IEN | PTD | EN | M0)) /*d2d_mcad21*/\ - MUX_VAL(CP(D2D_MCAD22), (IEN | PTD | EN | M0)) /*d2d_mcad22*/\ - MUX_VAL(CP(D2D_MCAD23), (IEN | PTD | EN | M0)) /*d2d_mcad23*/\ - MUX_VAL(CP(D2D_MCAD24), (IEN | PTD | EN | M0)) /*d2d_mcad24*/\ - MUX_VAL(CP(D2D_MCAD25), (IEN | PTD | EN | M0)) /*d2d_mcad25*/\ - MUX_VAL(CP(D2D_MCAD26), (IEN | PTD | EN | M0)) /*d2d_mcad26*/\ - MUX_VAL(CP(D2D_MCAD27), (IEN | PTD | EN | M0)) /*d2d_mcad27*/\ - MUX_VAL(CP(D2D_MCAD28), (IEN | PTD | EN | M0)) /*d2d_mcad28*/\ - MUX_VAL(CP(D2D_MCAD29), (IEN | PTD | EN | M0)) /*d2d_mcad29*/\ - MUX_VAL(CP(D2D_MCAD30), (IEN | PTD | EN | M0)) /*d2d_mcad30*/\ - MUX_VAL(CP(D2D_MCAD31), (IEN | PTD | EN | M0)) /*d2d_mcad31*/\ - MUX_VAL(CP(D2D_MCAD32), (IEN | PTD | EN | M0)) /*d2d_mcad32*/\ - MUX_VAL(CP(D2D_MCAD33), (IEN | PTD | EN | M0)) /*d2d_mcad33*/\ - MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) /*d2d_mcad34*/\ - MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) /*d2d_mcad35*/\ - MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) /*d2d_mcad36*/\ - MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) /*d2d_clk26mi*/\ - MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) /*d2d_nrespwron*/\ - MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) /*d2d_nreswarm */\ - MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) /*d2d_arm9nirq */\ - MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\ - MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) /*d2d_spint*/\ - MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) /*d2d_frint*/\ - MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0*/\ - MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1*/\ - MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2*/\ - MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3*/\ - MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst*/\ - MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\ - MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\ - MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\ - MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\ - MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) /*d2d_n3grtck*/\ - MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) /*d2d_mstdby*/\ - MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) /*d2d_swakeup*/\ - MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) /*d2d_idlereq*/\ - MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) /*d2d_idleack*/\ - MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\ - MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\ - MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) /*d2d_mread*/\ - MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /*d2d_sread*/\ - MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\ - MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ - MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ - MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/ - -/* - * Routine: get_board_revision - * Description: Returns the board revision - */ -int get_board_revision(void) -{ - int revision; - - if (!gpio_request(112, "") && - !gpio_request(113, "") && - !gpio_request(115, "")) { - - gpio_direction_input(112); - gpio_direction_input(113); - gpio_direction_input(115); - - revision = gpio_get_value(115) << 2 | - gpio_get_value(113) << 1 | - gpio_get_value(112); - } else { - puts("Error: unable to acquire board revision GPIOs\n"); - revision = -1; - } - - return revision; -} - -/* - * Routine: set_muxconf_regs - * Description: Setting up the configuration Mux registers specific to the - * hardware. Many pins need to be moved from protect to primary - * mode. - */ -void set_muxconf_regs(void) -{ - MUX_OVERO(); -} diff --git a/board/overo/overo.c b/board/overo/overo.c deleted file mode 100644 index 5450f5d11c..0000000000 --- a/board/overo/overo.c +++ /dev/null @@ -1,411 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Maintainer : Steve Sakoman - * - * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by - * Richard Woodruff - * Syed Mohammed Khasim - * Sunil Kumar - * Shashi Ranjan - * - * (C) Copyright 2004-2008 - * Texas Instruments, - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "overo.h" - -#ifdef CONFIG_USB_EHCI_HCD -#include -#include -#endif - -#define TWL4030_I2C_BUS 0 -#define EXPANSION_EEPROM_I2C_BUS 2 -#define EXPANSION_EEPROM_I2C_ADDRESS 0x51 - -#define GUMSTIX_EMPTY_EEPROM 0x0 - -#define GUMSTIX_SUMMIT 0x01000200 -#define GUMSTIX_TOBI 0x02000200 -#define GUMSTIX_TOBI_DUO 0x03000200 -#define GUMSTIX_PALO35 0x04000200 -#define GUMSTIX_PALO43 0x05000200 -#define GUMSTIX_CHESTNUT43 0x06000200 -#define GUMSTIX_PINTO 0x07000200 -#define GUMSTIX_GALLOP43 0x08000200 -#define GUMSTIX_ALTO35 0x09000200 -#define GUMSTIX_STAGECOACH 0x0A000200 -#define GUMSTIX_THUMBO 0x0B000200 -#define GUMSTIX_TURTLECORE 0x0C000200 -#define GUMSTIX_ARBOR43C 0x0D000200 - -#define ETTUS_USRP_E 0x01000300 - -#define GUMSTIX_NO_EEPROM 0xffffffff - -static struct { - unsigned int device_vendor; - unsigned char revision; - unsigned char content; - char fab_revision[8]; - char env_var[16]; - char env_setting[64]; -} expansion_config = {0x0}; - -static const struct ns16550_platdata overo_serial = { - .base = OMAP34XX_UART3, - .reg_shift = 2, - .clock = V_NS16550_CLK, - .fcr = UART_FCR_DEFVAL, -}; - -U_BOOT_DEVICE(overo_uart) = { - "ns16550_serial", - &overo_serial -}; - -/* - * Routine: get_sdio2_config - * Description: Return information about the wifi module connection - * Returns 0 if the module connects though a level translator - * Returns 1 if the module connects directly - */ -int get_sdio2_config(void) -{ - int sdio_direct; - - if (!gpio_request(130, "") && !gpio_request(139, "")) { - - gpio_direction_output(130, 0); - gpio_direction_input(139); - - sdio_direct = 1; - gpio_set_value(130, 0); - if (gpio_get_value(139) == 0) { - gpio_set_value(130, 1); - if (gpio_get_value(139) == 1) - sdio_direct = 0; - } - - gpio_direction_input(130); - } else { - puts("Error: unable to acquire sdio2 clk GPIOs\n"); - sdio_direct = -1; - } - - return sdio_direct; -} - -/* - * Routine: get_expansion_id - * Description: This function checks for expansion board by checking I2C - * bus 2 for the availability of an AT24C01B serial EEPROM. - * returns the device_vendor field from the EEPROM - */ -unsigned int get_expansion_id(void) -{ - if (expansion_config.device_vendor != 0x0) - return expansion_config.device_vendor; - - i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS); - - /* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */ - if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) { - i2c_set_bus_num(TWL4030_I2C_BUS); - return GUMSTIX_NO_EEPROM; - } - - /* read configuration data */ - i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, - sizeof(expansion_config)); - - i2c_set_bus_num(TWL4030_I2C_BUS); - - return expansion_config.device_vendor; -} - -/* - * Routine: misc_init_r - * Description: Configure board specific parts - */ -int misc_init_r(void) -{ - unsigned int expansion_id; - - twl4030_power_init(); - twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); - - printf("Board revision: %d\n", get_board_revision()); - - switch (get_sdio2_config()) { - case 0: - puts("Tranceiver detected on mmc2\n"); - MUX_OVERO_SDIO2_TRANSCEIVER(); - break; - case 1: - puts("Direct connection on mmc2\n"); - MUX_OVERO_SDIO2_DIRECT(); - break; - default: - puts("Unable to detect mmc2 connection type\n"); - } - - expansion_id = get_expansion_id(); - switch (expansion_id) { - case GUMSTIX_SUMMIT: - printf("Recognized Summit expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - env_set("defaultdisplay", "dvi"); - env_set("expansionname", "summit"); - break; - case GUMSTIX_TOBI: - printf("Recognized Tobi expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - env_set("defaultdisplay", "dvi"); - env_set("expansionname", "tobi"); - break; - case GUMSTIX_TOBI_DUO: - printf("Recognized Tobi Duo expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - env_set("expansionname", "tobiduo"); - break; - case GUMSTIX_PALO35: - printf("Recognized Palo35 expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - env_set("defaultdisplay", "lcd35"); - env_set("expansionname", "palo35"); - break; - case GUMSTIX_PALO43: - printf("Recognized Palo43 expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - env_set("defaultdisplay", "lcd43"); - env_set("expansionname", "palo43"); - break; - case GUMSTIX_CHESTNUT43: - printf("Recognized Chestnut43 expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - env_set("defaultdisplay", "lcd43"); - env_set("expansionname", "chestnut43"); - break; - case GUMSTIX_PINTO: - printf("Recognized Pinto expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - break; - case GUMSTIX_GALLOP43: - printf("Recognized Gallop43 expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - env_set("defaultdisplay", "lcd43"); - env_set("expansionname", "gallop43"); - break; - case GUMSTIX_ALTO35: - printf("Recognized Alto35 expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - MUX_ALTO35(); - env_set("defaultdisplay", "lcd35"); - env_set("expansionname", "alto35"); - break; - case GUMSTIX_STAGECOACH: - printf("Recognized Stagecoach expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - break; - case GUMSTIX_THUMBO: - printf("Recognized Thumbo expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - break; - case GUMSTIX_TURTLECORE: - printf("Recognized Turtlecore expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - break; - case GUMSTIX_ARBOR43C: - printf("Recognized Arbor43C expansion board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - MUX_ARBOR43C(); - env_set("defaultdisplay", "lcd43"); - env_set("expansionname", "arbor43c"); - break; - case ETTUS_USRP_E: - printf("Recognized Ettus Research USRP-E (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_GUMSTIX(); - MUX_USRP_E(); - env_set("defaultdisplay", "dvi"); - break; - case GUMSTIX_NO_EEPROM: - case GUMSTIX_EMPTY_EEPROM: - puts("No or empty EEPROM on expansion board\n"); - MUX_GUMSTIX(); - env_set("expansionname", "tobi"); - break; - default: - printf("Unrecognized expansion board 0x%08x\n", expansion_id); - break; - } - - if (expansion_config.content == 1) - env_set(expansion_config.env_var, expansion_config.env_setting); - - omap_die_id_display(); - - if (get_cpu_family() == CPU_OMAP34XX) - env_set("boardname", "overo"); - else - env_set("boardname", "overo-storm"); - - return 0; -} - -#if defined(CONFIG_CMD_NET) -/* GPMC definitions for LAN9221 chips on Tobi expansion boards */ -static const u32 gpmc_lan_config[] = { - NET_LAN9221_GPMC_CONFIG1, - NET_LAN9221_GPMC_CONFIG2, - NET_LAN9221_GPMC_CONFIG3, - NET_LAN9221_GPMC_CONFIG4, - NET_LAN9221_GPMC_CONFIG5, - NET_LAN9221_GPMC_CONFIG6, - /*CONFIG7- computed as params */ -}; - -/* - * Routine: setup_net_chip - * Description: Setting up the configuration GPMC registers specific to the - * Ethernet hardware. - */ -static void setup_net_chip(void) -{ - struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; - - /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ - writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); - /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ - writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); - /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ - writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, - &ctrl_base->gpmc_nadv_ale); -} - -/* - * Routine: reset_net_chip - * Description: Reset the Ethernet hardware. - */ -static void reset_net_chip(void) -{ - /* Make GPIO 64 as output pin and send a magic pulse through it */ - if (!gpio_request(64, "")) { - gpio_direction_output(64, 0); - gpio_set_value(64, 1); - udelay(1); - gpio_set_value(64, 0); - udelay(1); - gpio_set_value(64, 1); - } -} - -int board_eth_init(bd_t *bis) -{ - unsigned int expansion_id; - int rc = 0; - -#ifdef CONFIG_SMC911X - expansion_id = get_expansion_id(); - switch (expansion_id) { - case GUMSTIX_TOBI_DUO: - /* second lan chip */ - enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4], - 0x2B000000, GPMC_SIZE_16M); - /* no break */ - case GUMSTIX_TOBI: - case GUMSTIX_CHESTNUT43: - case GUMSTIX_STAGECOACH: - case GUMSTIX_NO_EEPROM: - case GUMSTIX_EMPTY_EEPROM: - /* first lan chip */ - enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], - 0x2C000000, GPMC_SIZE_16M); - - setup_net_chip(); - reset_net_chip(); - - rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); - break; - default: - break; - } -#endif - - return rc; -} -#endif - -#if defined(CONFIG_USB_EHCI_HCD) -static struct omap_usbhs_board_data usbhs_bdata = { - .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, - .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED -}; - -#define GUMSTIX_GPIO_USBH_CPEN 168 -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - /* Enable USB power */ - if (!gpio_request(GUMSTIX_GPIO_USBH_CPEN, "usbh_cpen")) - gpio_direction_output(GUMSTIX_GPIO_USBH_CPEN, 1); - - return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); -} - -int ehci_hcd_stop(void) -{ - /* Disable USB power */ - gpio_set_value(GUMSTIX_GPIO_USBH_CPEN, 0); - gpio_free(GUMSTIX_GPIO_USBH_CPEN); - - return omap_ehci_hcd_stop(); -} - -#endif /* CONFIG_USB_EHCI_HCD */ diff --git a/board/overo/overo.h b/board/overo/overo.h deleted file mode 100644 index 513a3e3d63..0000000000 --- a/board/overo/overo.h +++ /dev/null @@ -1,169 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2008 - * Steve Sakoman - */ -#ifndef _OVERO_H_ -#define _OVERO_H_ - -const omap3_sysinfo sysinfo = { - DDR_STACKED, - "Gumstix Overo board", -#if defined(CONFIG_ENV_IS_IN_ONENAND) - "OneNAND", -#else - "NAND", -#endif -}; - -int get_board_revision(void); - -/* overo revisions */ -#define REVISION_0 0x0 -#define REVISION_1 0x1 -#define REVISION_2 0x2 -#define REVISION_3 0x3 -#define REVISION_4 0x4 - -/* - * IEN - Input Enable - * IDIS - Input Disable - * PTD - Pull type Down - * PTU - Pull type Up - * DIS - Pull type selection is inactive - * EN - Pull type selection is active - * M0 - Mode 0 - * The commented string gives the final mux configuration for that pin - */ -#define MUX_GUMSTIX() \ - /*GPMC*/\ - MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\ - MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M0)) /*GPMC_nCS4*/\ - MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) /*GPMC_nCS5*/\ - MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M0)) /*GPMC_nCS6*/\ - MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M4)) /*GPIO_63*/\ - /* - CAM_IRQ*/\ - MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\ - /* - SMSC911X_NRES*/\ - MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | DIS | M4)) /*GPIO_65*/\ - /*DSS*/\ - MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\ - MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\ - MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\ - MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\ - MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\ - MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\ - MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\ - MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\ - MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\ - MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\ - MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\ - MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\ - MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\ - MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\ - MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\ - MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\ - MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\ - MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\ - MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\ - MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\ - MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\ - MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\ - MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\ - MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\ - MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\ - MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\ - MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\ - MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\ - /*CAMERA*/\ - MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*CAM_FLD*/\ - MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\ - MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M0)) /*CAM_WEN*/\ - MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\ - MUX_VAL(CP(CSI2_DX1), (IEN | PTD | EN | M4)) /*GPIO_114*/\ - /* - PEN_DOWN*/\ - /*Bluetooth*/\ - MUX_VAL(CP(UART2_CTS), (IEN | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\ - MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M4)) /*GPIO_145*/\ - MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M4)) /*GPIO_146*/\ - MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M4)) /*GPIO_147*/\ - MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\ - MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M4)) /*GPIO_150-MMC3_WP*/\ - MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\ - /*Serial Interface*/\ - MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)) /*UART3_CTS_RCTX*/\ - MUX_VAL(CP(HDQ_SIO), (IDIS | PTU | EN | M4)) /*HDQ_SIO*/\ - MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) /*McSPI1_CLK*/\ - MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) /*McSPI1_SIMO */\ - MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\ - MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\ - MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\ - MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176 */\ - /* - LAN_INTR */\ - /*Control and debug */\ - MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTU | EN | M4)) /*GPIO_10*/\ - MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M4)) /*GPIO_186*/\ - MUX_VAL(CP(ETK_CLK_ES2), (IEN | PTU | EN | M2)) /*MMC3_CLK*/\ - MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M2)) /*MMC3_CMD*/\ - MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | EN | M4)) /*GPIO_14*/\ - MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT3*/\ - MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT0*/\ - MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT1*/\ - MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT2*/\ - MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | EN | M4)) /*GPIO_21*/\ - MUX_VAL(CP(ETK_D8_ES2), (IEN | PTU | EN | M4)) /*GPIO_22*/\ - MUX_VAL(CP(ETK_D9_ES2), (IEN | PTU | EN | M4)) /*GPIO_23*/\ - -#define MUX_OVERO_SDIO2_DIRECT() \ - MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) /*MMC2_CLK*/\ - MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\ - MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)) /*MMC2_DAT0*/\ - MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)) /*MMC2_DAT1*/\ - MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)) /*MMC2_DAT2*/\ - MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)) /*MMC2_DAT3*/\ - MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M0)) /*MMC2_DAT4*/\ - MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M0)) /*MMC2_DAT5*/\ - MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M0)) /*MMC2_DAT6*/\ - MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M0)) /*MMC2_DAT7*/\ - MUX_VAL(CP(MMC1_DAT4), (IEN | PTD | EN | M4)) /*GPIO_126*/\ - MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) /*GPIO_127*/\ - MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M4)) /*GPIO_128*/\ - MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M4)) /*GPIO_129*/ - -#define MUX_OVERO_SDIO2_TRANSCEIVER() \ - MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) /*MMC2_CLK*/\ - MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\ - MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)) /*MMC2_DAT0*/\ - MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)) /*MMC2_DAT1*/\ - MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)) /*MMC2_DAT2*/\ - MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)) /*MMC2_DAT3*/\ - MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M1)) /*MMC2_DIR_DAT0*/\ - MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M1)) /*MMC2_DIR_DAT1*/\ - MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M1)) /*MMC2_DIR_CMD*/\ - MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M1)) /*MMC2_CLKIN*/\ - MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M4)) /*GPIO_126*/\ - MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) /*GPIO_127*/\ - MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M4)) /*GPIO_128*/\ - MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M4)) /*GPIO_129*/ - -#define MUX_USRP_E() \ - MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M4)) /*GPIO_173 */\ - MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M4)) /*GPIO_175 */\ - -#define MUX_ALTO35() \ - MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTU | EN | M4)) /*GPIO_10-BTN*/\ - MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M4)) /*GPIO_148-RED LED*/\ - MUX_VAL(CP(UART1_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_150-YELLOW LED*/\ - MUX_VAL(CP(UART1_RX), (IDIS | PTD | DIS | M4)) /*GPIO_151-BLUE LED*/\ - MUX_VAL(CP(HDQ_SIO), (IDIS | PTD | DIS | M4)) /*GPIO_170-GREEN LED*/\ - MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M4)) /*GPIO_175*/\ - -#define MUX_ARBOR43C() \ - MUX_VAL(CP(CSI2_DX1), (IDIS | PTD | DIS | M4)) /*GPIO_114-RED LED*/\ - MUX_VAL(CP(UART1_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_150-YELLOW LED*/\ - MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M4)) /*GPIO_170-BUTTON */\ - MUX_VAL(CP(SYS_CLKOUT2), (IDIS | PTD | DIS | M4)) /*GPIO_186-BLUE LED*/\ - MUX_VAL(CP(JTAG_EMU1), (IDIS | PTD | DIS | M4)) /*GPIO_31-CAP WAKE*/\ - MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTU | EN | M4)) /*GPIO_10-CAP IRQ*/\ - -#endif diff --git a/board/overo/spl.c b/board/overo/spl.c deleted file mode 100644 index 91d8091d25..0000000000 --- a/board/overo/spl.c +++ /dev/null @@ -1,61 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Maintainer : Steve Sakoman - * - * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by - * Richard Woodruff - * Syed Mohammed Khasim - * Sunil Kumar - * Shashi Ranjan - * - * (C) Copyright 2004-2008 - * Texas Instruments, - */ - -#include -#include -#include -#include -#include "overo.h" - -/* - * Routine: get_board_mem_timings - * Description: If we use SPL then there is no x-loader nor config header - * so we have to setup the DDR timings ourself on both banks. - */ -void get_board_mem_timings(struct board_sdrc_timings *timings) -{ - timings->mr = MICRON_V_MR_165; - switch (get_board_revision()) { - case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */ - timings->mcfg = MICRON_V_MCFG_165(256 << 20); - timings->ctrla = MICRON_V_ACTIMA_165; - timings->ctrlb = MICRON_V_ACTIMB_165; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; - break; - case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */ - case REVISION_4: - timings->mcfg = MICRON_V_MCFG_200(256 << 20); - timings->ctrla = MICRON_V_ACTIMA_200; - timings->ctrlb = MICRON_V_ACTIMB_200; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; - break; - case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */ - timings->mcfg = HYNIX_V_MCFG_200(256 << 20); - timings->ctrla = HYNIX_V_ACTIMA_200; - timings->ctrlb = HYNIX_V_ACTIMB_200; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; - break; - case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */ - timings->mcfg = MCFG(512 << 20, 15); - timings->ctrla = MICRON_V_ACTIMA_200; - timings->ctrlb = MICRON_V_ACTIMB_200; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; - break; - default: - timings->mcfg = MICRON_V_MCFG_165(128 << 20); - timings->ctrla = MICRON_V_ACTIMA_165; - timings->ctrlb = MICRON_V_ACTIMB_165; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; - } -} diff --git a/configs/omap3_overo_defconfig b/configs/omap3_overo_defconfig deleted file mode 100644 index af9f8a300d..0000000000 --- a/configs/omap3_overo_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_ENV_OFFSET=0x240000 -CONFIG_TARGET_OMAP3_OVERO=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_SPL=y -CONFIG_SPL_TEXT_BASE=0x40200000 -CONFIG_DISTRO_DEFAULTS=y -# CONFIG_USE_BOOTCOMMAND is not set -CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_VERSION_VARIABLE=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_MTD_SUPPORT=y -CONFIG_SPL_OS_BOOT=y -CONFIG_SYS_PROMPT="Overo # " -# CONFIG_CMD_IMI is not set -CONFIG_CMD_SPL=y -CONFIG_CMD_SPL_NAND_OFS=0x240000 -CONFIG_CMD_ASKENV=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y -CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_NFS is not set -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0" -CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(xloader),1792k(u-boot),256k(environ),8m(linux),-(rootfs)" -CONFIG_CMD_UBI=y -CONFIG_ENV_IS_IN_NAND=y -CONFIG_TWL4030_LED=y -CONFIG_MMC_OMAP_HS=y -CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y -CONFIG_SYS_NAND_BUSWIDTH_16BIT=y -CONFIG_SPL_NAND_SIMPLE=y -CONFIG_SMC911X=y -CONFIG_SMC911X_BASE=0x2C000000 -CONFIG_SMC911X_32_BIT=y -CONFIG_CONS_INDEX=3 -CONFIG_SPI=y -CONFIG_OMAP3_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_FAT_WRITE=y -CONFIG_BCH=y -CONFIG_OF_LIBFDT=y diff --git a/doc/README.omap3 b/doc/README.omap3 index 00bcbdba9a..5ff9ee2bae 100644 --- a/doc/README.omap3 +++ b/doc/README.omap3 @@ -56,12 +56,6 @@ make make omap3_zoom2_config make -* CM-T35: - -make cm_t35_config -make - - Custom commands =============== diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h deleted file mode 100644 index 9a5b9f297c..0000000000 --- a/include/configs/omap3_overo.h +++ /dev/null @@ -1,184 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration settings for the Gumstix Overo board. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include -/* - * We are only ever GP parts and will utilize all of the "downloaded image" - * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). - */ - -/* call misc_init_r */ - -/* pass the revision tag */ -#define CONFIG_REVISION_TAG - -/* override size of malloc() pool */ -#undef CONFIG_SYS_MALLOC_LEN -/* Shift 128 << 15 provides 4 MiB heap to support UBI commands. - * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15)) - -/* I2C Support */ - -/* TWL4030 LED */ - -/* USB EHCI */ -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183 - -/* commands to include */ - -#ifdef CONFIG_MTD_RAW_NAND -/* NAND block size is 128 KiB. Synchronize these values with - * overo_nand_partitions in mach-omap2/board-overo.c in Linux: - * xloader 4 * NAND_BLOCK_SIZE = 512 KiB - * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB - * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB - * linux 64 * NAND_BLOCK_SIZE = 8 MiB - * rootfs remainder - */ -#endif /* CONFIG_MTD_RAW_NAND */ - -/* Board NAND Info. */ -/* Environment information */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - DEFAULT_LINUX_BOOT_ENV \ - "bootdir=/boot\0" \ - "bootfile=zImage\0" \ - "usbtty=cdc_acm\0" \ - "console=ttyO2,115200n8\0" \ - "mpurate=auto\0" \ - "optargs=\0" \ - "vram=12M\0" \ - "dvimode=1024x768MR-16@60\0" \ - "defaultdisplay=dvi\0" \ - "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext4 rootwait\0" \ - "nandroot=ubi0:rootfs ubi.mtd=4\0" \ - "nandrootfstype=ubifs\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "mpurate=${mpurate} " \ - "vram=${vram} " \ - "omapfb.mode=dvi:${dvimode} " \ - "omapdss.def_disp=${defaultdisplay} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "nandargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "mpurate=${mpurate} " \ - "vram=${vram} " \ - "omapfb.mode=dvi:${dvimode} " \ - "omapdss.def_disp=${defaultdisplay} " \ - "root=${nandroot} " \ - "rootfstype=${nandrootfstype}\0" \ - "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running boot script from mmc ...; " \ - "source ${loadaddr}\0" \ - "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ - "importbootenv=echo Importing environment from mmc ...; " \ - "env import -t ${loadaddr} ${filesize}\0" \ - "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \ - "mmcboot=echo Booting from mmc...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \ - "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \ - "loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \ - "loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \ - "mmcbootfdt=echo Booting with DT from mmc ...; " \ - "run mmcargs; " \ - "bootz ${loadaddr} - ${fdtaddr}\0" \ - "nandboot=echo Booting from nand ...; " \ - "run nandargs; " \ - "if nand read ${loadaddr} linux; then " \ - "bootm ${loadaddr};" \ - "fi;\0" \ - "nanddtsboot=echo Booting from nand with DTS...; " \ - "run nandargs; " \ - "ubi part rootfs; "\ - "ubifsmount ubi0:rootfs; "\ - "run loadubifdt; "\ - "run loadubizimage; "\ - "bootz ${loadaddr} - ${fdtaddr}\0" \ - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "fi;" \ - "if run loadbootenv; then " \ - "echo Loaded environment from ${bootenv};" \ - "run importbootenv;" \ - "fi;" \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "if run loaduimage; then " \ - "run mmcboot;" \ - "fi;" \ - "if run loadzimage; then " \ - "if test -z \"${fdtfile}\"; then " \ - "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \ - "fi;" \ - "if run loadfdt; then " \ - "run mmcbootfdt;" \ - "fi;" \ - "fi;" \ - "fi;" \ - "run nandboot; " \ - "if test -z \"${fdtfile}\"; then "\ - "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \ - "fi;" \ - "run nanddtsboot; " \ - -/* memtest works on */ - -/* FLASH and environment organization */ -#if defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_FLASH_BASE NAND_BASE -#endif - -/* Monitor at start of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP - -#define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */ -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ - -/* Initial RAM setup */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 - -/* NAND boot config */ -#define CONFIG_SYS_NAND_MAX_ECCPOS 56 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ - 13, 14, 16, 17, 18, 19, 20, 21, 22, \ - 23, 24, 25, 26, 27, 28, 30, 31, 32, \ - 33, 34, 35, 36, 37, 38, 39, 40, 41, \ - 42, 44, 45, 46, 47, 48, 49, 50, 51, \ - 52, 53, 54, 55, 56} -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 13 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 -/* NAND: SPL falcon mode configs */ -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 -#endif - -#endif /* __CONFIG_H */ From patchwork Tue May 26 17:44:41 2020 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id u1sor885856plq.39.2020.05.26.10.45.25 for (Google Transport Security); Tue, 26 May 2020 10:45:25 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:902:a711:: with SMTP id w17mr2097910plq.173.1590515124747; Tue, 26 May 2020 10:45:24 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id x20sm136232pfc.211.2020.05.26.10.45.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:45:23 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 06/14] Pandora: Drop omap3 pandora Date: Tue, 26 May 2020 23:14:41 +0530 Message-Id: <20200526174444.262050-7-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174444.262050-1-jagan@amarulasolutions.com> References: <20200526174444.262050-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=HnTPehZc; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , OF_CONTROL, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Signed-off-by: Jagan Teki --- arch/arm/mach-omap2/omap3/Kconfig | 6 - board/pandora/Kconfig | 9 - board/pandora/MAINTAINERS | 6 - board/pandora/Makefile | 6 - board/pandora/pandora.c | 149 ------------ board/pandora/pandora.h | 391 ------------------------------ configs/omap3_pandora_defconfig | 40 --- doc/README.omap3 | 5 - include/configs/omap3_pandora.h | 62 ----- 9 files changed, 674 deletions(-) delete mode 100644 board/pandora/Kconfig delete mode 100644 board/pandora/MAINTAINERS delete mode 100644 board/pandora/Makefile delete mode 100644 board/pandora/pandora.c delete mode 100644 board/pandora/pandora.h delete mode 100644 configs/omap3_pandora_defconfig delete mode 100644 include/configs/omap3_pandora.h diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig index 306c2596d3..18068be076 100644 --- a/arch/arm/mach-omap2/omap3/Kconfig +++ b/arch/arm/mach-omap2/omap3/Kconfig @@ -78,11 +78,6 @@ config TARGET_OMAP3_ZOOM1 config TARGET_AM3517_CRANE bool "am3517_crane" -config TARGET_OMAP3_PANDORA - bool "OMAP3 Pandora" - select OMAP3_GPIO_4 - select OMAP3_GPIO_6 - config TARGET_TRICORDER bool "Tricorder" select OMAP3_GPIO_2 @@ -161,7 +156,6 @@ source "board/ti/evm/Kconfig" source "board/isee/igep00x0/Kconfig" source "board/logicpd/zoom1/Kconfig" source "board/ti/am3517crane/Kconfig" -source "board/pandora/Kconfig" source "board/corscience/tricorder/Kconfig" source "board/logicpd/omap3som/Kconfig" source "board/nokia/rx51/Kconfig" diff --git a/board/pandora/Kconfig b/board/pandora/Kconfig deleted file mode 100644 index 0b33818008..0000000000 --- a/board/pandora/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_OMAP3_PANDORA - -config SYS_BOARD - default "pandora" - -config SYS_CONFIG_NAME - default "omap3_pandora" - -endif diff --git a/board/pandora/MAINTAINERS b/board/pandora/MAINTAINERS deleted file mode 100644 index e12351735c..0000000000 --- a/board/pandora/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -PANDORA BOARD -M: Grazvydas Ignotas -S: Maintained -F: board/pandora/ -F: include/configs/omap3_pandora.h -F: configs/omap3_pandora_defconfig diff --git a/board/pandora/Makefile b/board/pandora/Makefile deleted file mode 100644 index c05c8fb854..0000000000 --- a/board/pandora/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y := pandora.o diff --git a/board/pandora/pandora.c b/board/pandora/pandora.c deleted file mode 100644 index a93848666f..0000000000 --- a/board/pandora/pandora.c +++ /dev/null @@ -1,149 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2008 - * Grazvydas Ignotas - * - * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by - * Richard Woodruff - * Syed Mohammed Khasim - * Sunil Kumar - * Shashi Ranjan - * - * (C) Copyright 2004-2008 - * Texas Instruments, - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "pandora.h" - -DECLARE_GLOBAL_DATA_PTR; - -#define TWL4030_BB_CFG_BBCHEN (1 << 4) -#define TWL4030_BB_CFG_BBSEL_3200MV (3 << 2) -#define TWL4030_BB_CFG_BBISEL_500UA 2 - -#define CONTROL_WKUP_CTRL 0x48002a5c -#define GPIO_IO_PWRDNZ (1 << 6) -#define PBIASLITEVMODE1 (1 << 8) - -static const struct ns16550_platdata pandora_serial = { - .base = OMAP34XX_UART3, - .reg_shift = 2, - .clock = V_NS16550_CLK, - .fcr = UART_FCR_DEFVAL, -}; - -U_BOOT_DEVICE(pandora_uart) = { - "ns16550_serial", - &pandora_serial -}; - -/* - * Routine: board_init - * Description: Early hardware init. - */ -int board_init(void) -{ - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ - /* board id for Linux */ - gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA; - /* boot param addr */ - gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); - - return 0; -} - -static void set_output_gpio(unsigned int gpio, int value) -{ - int ret; - - ret = gpio_request(gpio, ""); - if (ret != 0) { - printf("could not request GPIO %u\n", gpio); - return; - } - ret = gpio_direction_output(gpio, value); - if (ret != 0) - printf("could not set GPIO %u to %d\n", gpio, value); -} - -/* - * Routine: misc_init_r - * Description: Configure board specific parts - */ -int misc_init_r(void) -{ - t2_t *t2_base = (t2_t *)T2_BASE; - u32 pbias_lite; - - twl4030_led_init(TWL4030_LED_LEDEN_LEDBON); - - /* set up dual-voltage GPIOs to 1.8V */ - pbias_lite = readl(&t2_base->pbias_lite); - pbias_lite &= ~PBIASLITEVMODE1; - pbias_lite |= PBIASLITEPWRDNZ1; - writel(pbias_lite, &t2_base->pbias_lite); - if (get_cpu_family() == CPU_OMAP36XX) - writel(readl(CONTROL_WKUP_CTRL) | GPIO_IO_PWRDNZ, - CONTROL_WKUP_CTRL); - - /* make sure audio and BT chips are in powerdown state */ - set_output_gpio(14, 0); - set_output_gpio(15, 0); - set_output_gpio(118, 0); - - /* enable USB supply */ - set_output_gpio(164, 1); - - /* wifi needs a short pulse to enter powersave state */ - set_output_gpio(23, 1); - udelay(5000); - gpio_direction_output(23, 0); - - /* Enable battery backup capacitor (3.2V, 0.5mA charge current) */ - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, - TWL4030_PM_RECEIVER_BB_CFG, - TWL4030_BB_CFG_BBCHEN | TWL4030_BB_CFG_BBSEL_3200MV | - TWL4030_BB_CFG_BBISEL_500UA); - - omap_die_id_display(); - - return 0; -} - -/* - * Routine: set_muxconf_regs - * Description: Setting up the configuration Mux registers specific to the - * hardware. Many pins need to be moved from protect to primary - * mode. - */ -void set_muxconf_regs(void) -{ - MUX_PANDORA(); - if (get_cpu_family() == CPU_OMAP36XX) { - MUX_PANDORA_3730(); - } -} - -#ifdef CONFIG_MMC -int board_mmc_init(bd_t *bis) -{ - return omap_mmc_init(0, 0, 0, -1, -1); -} - -void board_mmc_power_init(void) -{ - twl4030_power_mmc_init(0); -} -#endif diff --git a/board/pandora/pandora.h b/board/pandora/pandora.h deleted file mode 100644 index 9c4c5d1cd7..0000000000 --- a/board/pandora/pandora.h +++ /dev/null @@ -1,391 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2008 - * Grazvydas Ignotas - */ -#ifndef _PANDORA_H_ -#define _PANDORA_H_ - -const omap3_sysinfo sysinfo = { - DDR_STACKED, - "OMAP3 Pandora", - "NAND", -}; - -/* - * IEN - Input Enable - * IDIS - Input Disable - * PTD - Pull type Down - * PTU - Pull type Up - * DIS - Pull type selection is inactive - * EN - Pull type selection is active - * M0 - Mode 0 - * The commented string gives the final mux configuration for that pin - */ -#define MUX_PANDORA() \ - /*SDRC*/\ - MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\ - MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\ - MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\ - MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\ - MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\ - MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\ - MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\ - MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\ - MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\ - MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\ - MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\ - MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\ - MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\ - MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\ - MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\ - MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\ - MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\ - MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\ - MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\ - MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\ - MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\ - MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\ - MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\ - MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\ - MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\ - MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\ - MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\ - MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\ - MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\ - MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\ - MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\ - MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\ - MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\ - MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\ - MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\ - MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ - MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ - /*GPMC*/\ - MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\ - MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\ - MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\ - MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\ - MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\ - MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\ - MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\ - MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\ - MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\ - MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\ - MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\ - MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\ - MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\ - MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\ - MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\ - MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\ - MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\ - MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\ - MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\ - MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\ - MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\ - MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\ - MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\ - MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\ - MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\ - MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\ - MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ - MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\ - MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\ - MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ - MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ - MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\ - MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\ - MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\ - MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\ - MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ - /*DSS*/\ - MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\ - MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\ - MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\ - MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\ - MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\ - MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\ - MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\ - MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\ - MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\ - MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\ - MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\ - MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\ - MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\ - MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\ - MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\ - MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\ - MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\ - MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\ - MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\ - MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\ - MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\ - MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\ - MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\ - MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\ - MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\ - MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\ - MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\ - MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\ - /*GPIO based game buttons*/\ - MUX_VAL(CP(CAM_XCLKA), (IEN | PTD | DIS | M4)) /*GPIO_96 - LEFT*/\ - MUX_VAL(CP(CAM_PCLK), (IEN | PTD | DIS | M4)) /*GPIO_97 - L2*/\ - MUX_VAL(CP(CAM_FLD), (IEN | PTD | DIS | M4)) /*GPIO_98 - RIGHT*/\ - MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M4)) /*GPIO_99 - MENU*/\ - MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M4)) /*GPIO_100 - START*/\ - MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M4)) /*GPIO_101 - Y*/\ - MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M4)) /*GPIO_102 - L1*/\ - MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M4)) /*GPIO_103 - DOWN*/\ - MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M4)) /*GPIO_104 - SELECT*/\ - MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M4)) /*GPIO_105 - R1*/\ - MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M4)) /*GPIO_106 - B*/\ - MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M4)) /*GPIO_107 - R2*/\ - MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M4)) /*GPIO_109 - X*/\ - MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M4)) /*GPIO_110 - UP*/\ - MUX_VAL(CP(CAM_XCLKB), (IEN | PTD | DIS | M4)) /*GPIO_111 - A*/\ - /*Audio Interface To External DAC (Headphone, Speakers)*/\ - MUX_VAL(CP(MCBSP2_FSX), (IDIS | PTD | DIS | M0)) /*McBSP2_FSX*/\ - MUX_VAL(CP(MCBSP2_CLKX), (IDIS | PTD | DIS | M0)) /*McBSP2_CLKX*/\ - MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\ - MUX_VAL(CP(MCBSP_CLKS), (IEN | PTD | DIS | M0)) /*McBSP_CLKS*/\ - MUX_VAL(CP(MCBSP2_DR), (IDIS | PTD | DIS | M4)) /*GPIO_118*/\ - /* - nPOWERDOWN_DAC*/\ - /*Expansion card 1*/\ - MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\ - MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\ - MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\ - MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\ - MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\ - MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\ - MUX_VAL(CP(MMC1_DAT4), (IEN | PTD | DIS | M4)) /*GPIO_126 - MMC1_WP*/\ - /*Expansion card 2*/\ - MUX_VAL(CP(MMC2_CLK), (IDIS | PTD | DIS | M0)) /*MMC2_CLK*/\ - MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\ - MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)) /*MMC2_DAT0*/\ - MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)) /*MMC2_DAT1*/\ - MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)) /*MMC2_DAT2*/\ - MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)) /*MMC2_DAT3*/\ - MUX_VAL(CP(MMC2_DAT4), (IDIS | PTD | DIS | M1)) /*MMC2_DIR_DAT0*/\ - MUX_VAL(CP(MMC2_DAT5), (IDIS | PTD | DIS | M1)) /*MMC2_DIR_DAT1*/\ - MUX_VAL(CP(MMC2_DAT6), (IDIS | PTD | DIS | M1)) /*MMC2_DIR_CMD */\ - MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M1)) /*MMC2_CLKIN*/\ - MUX_VAL(CP(MMC1_DAT5), (IEN | PTD | DIS | M4)) /*GPIO_127 - MMC2_WP*/\ - /*SDIO Interface to WIFI Module*/\ - MUX_VAL(CP(ETK_CLK_ES2), (IEN | PTD | DIS | M2)) /*MMC3_CLK*/\ - MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M2)) /*MMC3_CMD*/\ - MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT0*/\ - MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT1*/\ - MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT2*/\ - MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT3*/\ - /*Audio Interface To Bluetooth chip*/\ - MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\ - MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M0)) /*McBSP3_DR*/\ - MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M0)) /*McBSP3_CLKX*/\ - MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M0)) /*McBSP3_FSX*/\ - /*Digital Interface to Bluetooth (UART)*/\ - MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\ - MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /*UART1_RTS*/\ - MUX_VAL(CP(UART1_CTS), (IEN | PTU | EN | M0)) /*UART1_CTS*/\ - MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\ - /*Audio Interface to Triton2 chip (TPS65950)*/\ - MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M0)) /*McBSP4_CLKX*/\ - MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M0)) /*McBSP4_DR*/\ - MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | DIS | M0)) /*McBSP4_DX*/\ - MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M0)) /*McBSP4_FSX*/\ - /*GPIO definitions for muxed pins on AV connector*/\ - MUX_VAL(CP(UART2_CTS), (IEN | PTD | EN | M4)) /*GPIO_144,*/\ - /*UART2_CTS*/\ - MUX_VAL(CP(UART2_RTS), (IEN | PTD | EN | M4)) /*GPIO_145,*/\ - /*UART2_RTS*/\ - MUX_VAL(CP(UART2_TX), (IEN | PTD | EN | M4)) /*GPIO_146,*/\ - /*UART2_TX*/\ - MUX_VAL(CP(UART2_RX), (IEN | PTD | EN | M4)) /*GPIO_147,*/\ - /*UART2_RX*/\ - /*Serial Interface (Peripheral boot, Linux console, on AV connector)*/\ - /*RX pulled up to avoid noise when nothing is connected to serial port*/\ - MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTU | EN | M0)) /*UART3_RX*/\ - MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*UART3_TX*/\ - /*LEDs (Controlled by OMAP)*/\ - MUX_VAL(CP(MMC1_DAT6), (IDIS | PTD | DIS | M4)) /*GPIO_128*/\ - /* - LED_MMC1*/\ - MUX_VAL(CP(MMC1_DAT7), (IDIS | PTD | DIS | M4)) /*GPIO_129*/\ - /* - LED_MMC2*/\ - MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M4)) /*GPIO_158*/\ - /* - LED_BT*/\ - MUX_VAL(CP(MCBSP1_DR), (IDIS | PTD | DIS | M4)) /*GPIO_159*/\ - /* - LED_WIFI*/\ - /*Switches*/\ - MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | DIS | M4)) /*GPIO_176*/\ - /* - nHOLD_SWITCH*/\ - MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M4)) /*GPIO_108*/\ - /* - nLID_SWITCH*/\ - /*External IRQs*/\ - MUX_VAL(CP(CAM_HS), (IEN | PTD | DIS | M4)) /*GPIO_94*/\ - /* - nTOUCH_IRQ*/\ - MUX_VAL(CP(ETK_D7_ES2), (IEN | PTD | DIS | M4)) /*GPIO_21*/\ - /* - WIFI_IRQ*/\ - MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M4)) /*GPIO_161*/\ - /* - nIRQ_NUB1*/\ - MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_162*/\ - /* - nIRQ_NUB2*/\ - /*Various other stuff*/\ - MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | DIS | M4)) /*GPIO_163*/\ - /* - nOC_USB5*/\ - MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | DIS | M4)) /*GPIO_22*/\ - /* - MSECURE*/\ - MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M4)) /*GPIO_115*/\ - /* - POP_OVERHEAT*/\ - /*External Resets and Enables*/\ - MUX_VAL(CP(ETK_D0_ES2), (IDIS | PTD | DIS | M4)) /*GPIO_14*/\ - /* - nHDPHN_SHUTDOWN*/\ - MUX_VAL(CP(ETK_D1_ES2), (IDIS | PTD | DIS | M4)) /*GPIO_15*/\ - /* - nBT_SHUTDOWN*/\ - MUX_VAL(CP(ETK_D9_ES2), (IDIS | PTD | DIS | M4)) /*GPIO_23*/\ - /* - nWIFI_RESET*/\ - MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | DIS | M4)) /*GPIO_157*/\ - /* - nLCD_RESET*/\ - MUX_VAL(CP(MCBSP1_CLKR), (IDIS | PTD | DIS | M4)) /*GPIO_156*/\ - /* - RESET_NUBS*/\ - MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M4)) /*GPIO_164*/\ - /* - EN_USB_5V*/\ - /*Spare GPIOs*/\ - MUX_VAL(CP(GPMC_NCS7), (IEN | PTD | EN | M4)) /*GPIO_58*/\ - MUX_VAL(CP(GPMC_WAIT2), (IEN | PTD | EN | M4)) /*GPIO_64*/\ - MUX_VAL(CP(GPMC_WAIT3), (IEN | PTD | EN | M4)) /*GPIO_65*/\ - MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M4)) /*GPIO_95*/\ - MUX_VAL(CP(CAM_WEN), (IEN | PTD | EN | M4)) /*GPIO_167*/\ - MUX_VAL(CP(HDQ_SIO), (IEN | PTD | EN | M4)) /*GPIO_170*/\ - /*HS USB OTG Port (connects to HSUSB0)*/\ - MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\ - MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\ - MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\ - MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\ - MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0*/\ - MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1*/\ - MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2*/\ - MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3*/\ - MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4*/\ - MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5*/\ - MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6*/\ - MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7*/\ - /*I2C Ports*/\ - MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL - T2_CTRL*/\ - MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA - T2_CTRL*/\ - MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) /*I2C3_SCL - NUBS*/\ - MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA - NUBS*/\ - MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL - T2_SR*/\ - MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA - T2_SR*/\ - /*Serial Interface (Touch, LCD control)*/\ - MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) /*McSPI1_CLK*/\ - MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) /*McSPI1_SIMO*/\ - MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI*/\ - MUX_VAL(CP(MCSPI1_CS0), (IDIS | PTU | EN | M0)) /*McSPI1_CS0 - TOUCH*/\ - MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTU | EN | M0)) /*McSPI1_CS1 - LCD*/\ - /*HS USB HOST Port (connects to HSUSB2)*/\ - MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*USB_HOST_CLK*/\ - MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | EN | M3)) /*USB_HOST_STP*/\ - MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M3)) /*USB_HOST_DIR*/\ - MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M3)) /*USB_HOST_NXT*/\ - MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M3)) /*USB_HOST_D0*/\ - MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M3)) /*USB_HOST_D1*/\ - MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | DIS | M3)) /*USB_HOST_D2*/\ - MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | DIS | M3)) /*USB_HOST_D3*/\ - MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M3)) /*USB_HOST_D4*/\ - MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M3)) /*USB_HOST_D5*/\ - MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | DIS | M3)) /*USB_HOST_D6*/\ - MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M3)) /*USB_HOST_D7*/\ - MUX_VAL(CP(ETK_D2_ES2), (IDIS | PTD | DIS | M4)) /*GPIO_16*/\ - /* - nRESET_USB_HOST*/\ - /*Control and debug */\ - MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\ - MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\ - MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\ - MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ - MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3*/\ - MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4*/\ - MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ - MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ - MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ - MUX_VAL(CP(SYS_BOOT6), (IEN | PTD | DIS | M4)) /*GPIO_8*/\ - MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE*/\ - /*JTAG*/\ - MUX_VAL(CP(JTAG_NTRST), (IEN | PTD | DIS | M0)) /*JTAG_NTRST*/\ - MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) /*JTAG_TCK*/\ - MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) /*JTAG_TMS*/\ - MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) /*JTAG_TDI*/\ - MUX_VAL(CP(JTAG_EMU0), (IEN | PTD | DIS | M0)) /*JTAG_EMU0*/\ - MUX_VAL(CP(JTAG_EMU1), (IEN | PTD | DIS | M0)) /*JTAG_EMU1*/\ - /*Die to Die stuff*/\ - MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\ - MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\ - MUX_VAL(CP(D2D_MCAD3), (IEN | PTD | EN | M0)) /*d2d_mcad3*/\ - MUX_VAL(CP(D2D_MCAD4), (IEN | PTD | EN | M0)) /*d2d_mcad4*/\ - MUX_VAL(CP(D2D_MCAD5), (IEN | PTD | EN | M0)) /*d2d_mcad5*/\ - MUX_VAL(CP(D2D_MCAD6), (IEN | PTD | EN | M0)) /*d2d_mcad6*/\ - MUX_VAL(CP(D2D_MCAD7), (IEN | PTD | EN | M0)) /*d2d_mcad7*/\ - MUX_VAL(CP(D2D_MCAD8), (IEN | PTD | EN | M0)) /*d2d_mcad8*/\ - MUX_VAL(CP(D2D_MCAD9), (IEN | PTD | EN | M0)) /*d2d_mcad9*/\ - MUX_VAL(CP(D2D_MCAD10), (IEN | PTD | EN | M0)) /*d2d_mcad10*/\ - MUX_VAL(CP(D2D_MCAD11), (IEN | PTD | EN | M0)) /*d2d_mcad11*/\ - MUX_VAL(CP(D2D_MCAD12), (IEN | PTD | EN | M0)) /*d2d_mcad12*/\ - MUX_VAL(CP(D2D_MCAD13), (IEN | PTD | EN | M0)) /*d2d_mcad13*/\ - MUX_VAL(CP(D2D_MCAD14), (IEN | PTD | EN | M0)) /*d2d_mcad14*/\ - MUX_VAL(CP(D2D_MCAD15), (IEN | PTD | EN | M0)) /*d2d_mcad15*/\ - MUX_VAL(CP(D2D_MCAD16), (IEN | PTD | EN | M0)) /*d2d_mcad16*/\ - MUX_VAL(CP(D2D_MCAD17), (IEN | PTD | EN | M0)) /*d2d_mcad17*/\ - MUX_VAL(CP(D2D_MCAD18), (IEN | PTD | EN | M0)) /*d2d_mcad18*/\ - MUX_VAL(CP(D2D_MCAD19), (IEN | PTD | EN | M0)) /*d2d_mcad19*/\ - MUX_VAL(CP(D2D_MCAD20), (IEN | PTD | EN | M0)) /*d2d_mcad20*/\ - MUX_VAL(CP(D2D_MCAD21), (IEN | PTD | EN | M0)) /*d2d_mcad21*/\ - MUX_VAL(CP(D2D_MCAD22), (IEN | PTD | EN | M0)) /*d2d_mcad22*/\ - MUX_VAL(CP(D2D_MCAD23), (IEN | PTD | EN | M0)) /*d2d_mcad23*/\ - MUX_VAL(CP(D2D_MCAD24), (IEN | PTD | EN | M0)) /*d2d_mcad24*/\ - MUX_VAL(CP(D2D_MCAD25), (IEN | PTD | EN | M0)) /*d2d_mcad25*/\ - MUX_VAL(CP(D2D_MCAD26), (IEN | PTD | EN | M0)) /*d2d_mcad26*/\ - MUX_VAL(CP(D2D_MCAD27), (IEN | PTD | EN | M0)) /*d2d_mcad27*/\ - MUX_VAL(CP(D2D_MCAD28), (IEN | PTD | EN | M0)) /*d2d_mcad28*/\ - MUX_VAL(CP(D2D_MCAD29), (IEN | PTD | EN | M0)) /*d2d_mcad29*/\ - MUX_VAL(CP(D2D_MCAD30), (IEN | PTD | EN | M0)) /*d2d_mcad30*/\ - MUX_VAL(CP(D2D_MCAD31), (IEN | PTD | EN | M0)) /*d2d_mcad31*/\ - MUX_VAL(CP(D2D_MCAD32), (IEN | PTD | EN | M0)) /*d2d_mcad32*/\ - MUX_VAL(CP(D2D_MCAD33), (IEN | PTD | EN | M0)) /*d2d_mcad33*/\ - MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) /*d2d_mcad34*/\ - MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) /*d2d_mcad35*/\ - MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) /*d2d_mcad36*/\ - MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) /*d2d_clk26mi*/\ - MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) /*d2d_nrespwron*/\ - MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) /*d2d_nreswarm*/\ - MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) /*d2d_arm9nirq*/\ - MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\ - MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) /*d2d_spint*/\ - MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) /*d2d_frint*/\ - MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0*/\ - MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1*/\ - MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2*/\ - MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3*/\ - MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst*/\ - MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\ - MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\ - MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\ - MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\ - MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) /*d2d_n3grtck*/\ - MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) /*d2d_mstdby*/\ - MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) /*d2d_swakeup*/\ - MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) /*d2d_idlereq*/\ - MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) /*d2d_idleack*/\ - MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\ - MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\ - MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) /*d2d_mread*/\ - MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /*d2d_sread*/\ - MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\ - MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ - MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ - MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/ - -#define MUX_PANDORA_3730() \ - MUX_VAL(CP(GPIO126), (IEN | PTD | DIS | M4)) /*GPIO_126 - MMC1_WP*/\ - MUX_VAL(CP(GPIO127), (IEN | PTD | DIS | M4)) /*GPIO_127 - MMC2_WP*/\ - MUX_VAL(CP(GPIO128), (IDIS | PTD | DIS | M4)) /*GPIO_128 - LED_MMC1*/\ - MUX_VAL(CP(GPIO129), (IDIS | PTD | DIS | M4)) /*GPIO_129 - LED_MMC2*/ - -#endif diff --git a/configs/omap3_pandora_defconfig b/configs/omap3_pandora_defconfig deleted file mode 100644 index d8ee7995de..0000000000 --- a/configs/omap3_pandora_defconfig +++ /dev/null @@ -1,40 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_SYS_TEXT_BASE=0x80008000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_TARGET_OMAP3_PANDORA=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_DISTRO_DEFAULTS=y -# CONFIG_USE_BOOTCOMMAND is not set -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_VERSION_VARIABLE=y -CONFIG_SYS_PROMPT="Pandora # " -# CONFIG_CMD_IMI is not set -CONFIG_CMD_ASKENV=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y -CONFIG_CMD_SPI=y -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_NET is not set -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0" -CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(xloader),1920k(uboot),128k(uboot-env),10m(boot),-(rootfs)" -CONFIG_CMD_UBI=y -CONFIG_ENV_IS_IN_NAND=y -CONFIG_DM=y -CONFIG_TWL4030_LED=y -CONFIG_MMC_OMAP_HS=y -CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y -CONFIG_SYS_NAND_BUSWIDTH_16BIT=y -CONFIG_DM_SERIAL=y -CONFIG_SPI=y -CONFIG_OMAP3_SPI=y -CONFIG_FAT_WRITE=y -CONFIG_OF_LIBFDT=y diff --git a/doc/README.omap3 b/doc/README.omap3 index 5ff9ee2bae..bf99cff848 100644 --- a/doc/README.omap3 +++ b/doc/README.omap3 @@ -41,11 +41,6 @@ make make omap3_evm_config make -* Pandora: - -make omap3_pandora_config -make - * Zoom MDK: make omap3_zoom1_config diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h deleted file mode 100644 index ecf308e381..0000000000 --- a/include/configs/omap3_pandora.h +++ /dev/null @@ -1,62 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2008-2010 - * Gražvydas Ignotas - * - * Configuration settings for the OMAP3 Pandora. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* override base for compatibility with MLO the device ships with */ - -#include - -#define CONFIG_REVISION_TAG 1 - -#define CONFIG_SYS_DEVICE_NULLDEV 1 - -/* - * Board NAND Info. - */ -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 - - -#define CONFIG_BOOTCOMMAND \ - "run distro_bootcmd; " \ - "setenv bootargs ${bootargs_ubi}; " \ - "if mmc rescan && load mmc 0:1 ${loadaddr} autoboot.scr; then " \ - "source ${loadaddr}; " \ - "fi; " \ - "ubi part boot && ubifsmount ubi:boot && " \ - "ubifsload ${loadaddr} uImage && bootm ${loadaddr}" - -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 0) \ - -#include - -#define CONFIG_EXTRA_ENV_SETTINGS \ - DEFAULT_LINUX_BOOT_ENV \ - "usbtty=cdc_acm\0" \ - "bootargs_ubi=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \ - "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ - BOOTENV \ - -/* memtest works on */ - -#if defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_FLASH_BASE NAND_BASE -#endif - -/* Monitor at start of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE - - -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ - -#endif /* __CONFIG_H */ From patchwork Tue May 26 17:44:42 2020 Content-Type: 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[209.85.220.65]) by mx.google.com with SMTPS id y76sor841667pfc.5.2020.05.26.10.45.28 for (Google Transport Security); Tue, 26 May 2020 10:45:28 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:aa7:9431:: with SMTP id y17mr22078661pfo.33.1590515127912; Tue, 26 May 2020 10:45:27 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id x20sm136232pfc.211.2020.05.26.10.45.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:45:27 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki , Nishanth Menon Subject: [PATCH 07/14] logicpd: Drop omap3 zoom1 Date: Tue, 26 May 2020 23:14:42 +0530 Message-Id: <20200526174444.262050-8-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174444.262050-1-jagan@amarulasolutions.com> References: <20200526174444.262050-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=RgSPLFPM; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , OF_CONTROL, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Cc: Nishanth Menon Signed-off-by: Jagan Teki --- arch/arm/mach-omap2/omap3/Kconfig | 8 -- board/logicpd/zoom1/Kconfig | 12 --- board/logicpd/zoom1/MAINTAINERS | 6 -- board/logicpd/zoom1/Makefile | 6 -- board/logicpd/zoom1/config.mk | 14 --- board/logicpd/zoom1/zoom1.c | 148 ------------------------------ board/logicpd/zoom1/zoom1.h | 122 ------------------------ configs/omap3_zoom1_defconfig | 41 --------- doc/README.omap3 | 5 - include/configs/omap3_zoom1.h | 131 -------------------------- 10 files changed, 493 deletions(-) delete mode 100644 board/logicpd/zoom1/Kconfig delete mode 100644 board/logicpd/zoom1/MAINTAINERS delete mode 100644 board/logicpd/zoom1/Makefile delete mode 100644 board/logicpd/zoom1/config.mk delete mode 100644 board/logicpd/zoom1/zoom1.c delete mode 100644 board/logicpd/zoom1/zoom1.h delete mode 100644 configs/omap3_zoom1_defconfig delete mode 100644 include/configs/omap3_zoom1.h diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig index 18068be076..7421fe5e6c 100644 --- a/arch/arm/mach-omap2/omap3/Kconfig +++ b/arch/arm/mach-omap2/omap3/Kconfig @@ -68,13 +68,6 @@ config TARGET_OMAP3_IGEP00X0 select OMAP3_GPIO_6 imply CMD_DM -config TARGET_OMAP3_ZOOM1 - bool "TI Zoom1" - select DM - select DM_GPIO - select DM_SERIAL - imply CMD_DM - config TARGET_AM3517_CRANE bool "am3517_crane" @@ -154,7 +147,6 @@ source "board/ti/beagle/Kconfig" source "board/timll/devkit8000/Kconfig" source "board/ti/evm/Kconfig" source "board/isee/igep00x0/Kconfig" -source "board/logicpd/zoom1/Kconfig" source "board/ti/am3517crane/Kconfig" source "board/corscience/tricorder/Kconfig" source "board/logicpd/omap3som/Kconfig" diff --git a/board/logicpd/zoom1/Kconfig b/board/logicpd/zoom1/Kconfig deleted file mode 100644 index d76cb663f7..0000000000 --- a/board/logicpd/zoom1/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_OMAP3_ZOOM1 - -config SYS_BOARD - default "zoom1" - -config SYS_VENDOR - default "logicpd" - -config SYS_CONFIG_NAME - default "omap3_zoom1" - -endif diff --git a/board/logicpd/zoom1/MAINTAINERS b/board/logicpd/zoom1/MAINTAINERS deleted file mode 100644 index 338b965deb..0000000000 --- a/board/logicpd/zoom1/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -ZOOM1 BOARD -M: Nishanth Menon -S: Maintained -F: board/logicpd/zoom1/ -F: include/configs/omap3_zoom1.h -F: configs/omap3_zoom1_defconfig diff --git a/board/logicpd/zoom1/Makefile b/board/logicpd/zoom1/Makefile deleted file mode 100644 index e73b42e702..0000000000 --- a/board/logicpd/zoom1/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y := zoom1.o diff --git a/board/logicpd/zoom1/config.mk b/board/logicpd/zoom1/config.mk deleted file mode 100644 index a8e4f52e7b..0000000000 --- a/board/logicpd/zoom1/config.mk +++ /dev/null @@ -1,14 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2006-2008 -# Texas Instruments, -# -# Zoom MDK uses OMAP3 (ARM-CortexA8) cpu -# see http://www.ti.com/ for more information on Texas Instruments -# Physical Address: -# 8000'0000 (bank0) -# A000/0000 (bank1) -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) - -# For use with external or internal boots. diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c deleted file mode 100644 index 53dc9762f8..0000000000 --- a/board/logicpd/zoom1/zoom1.c +++ /dev/null @@ -1,148 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2004-2008 - * Texas Instruments, - * - * Author : - * Nishanth Menon - * - * Derived from Beagle Board and 3430 SDP code by - * Sunil Kumar - * Shashi Ranjan - * Richard Woodruff - * Syed Mohammed Khasim - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "zoom1.h" - -DECLARE_GLOBAL_DATA_PTR; - -/* - * gpmc_cfg is initialized by gpmc_init and we use it here. - * GPMC definitions for Ethenet Controller LAN9211 - */ -static const u32 gpmc_lab_enet[] = { - ZOOM1_ENET_GPMC_CONF1, - ZOOM1_ENET_GPMC_CONF2, - ZOOM1_ENET_GPMC_CONF3, - ZOOM1_ENET_GPMC_CONF4, - ZOOM1_ENET_GPMC_CONF5, - ZOOM1_ENET_GPMC_CONF6, - /*CONF7- computed as params */ -}; - -static const struct ns16550_platdata zoom1_serial = { - .base = OMAP34XX_UART3, - .reg_shift = 2, - .clock = V_NS16550_CLK, - .fcr = UART_FCR_DEFVAL, -}; - -U_BOOT_DEVICE(zoom1_uart) = { - "ns16550_serial", - &zoom1_serial -}; - -/* - * Routine: board_init - * Description: Early hardware init. - */ -int board_init(void) -{ - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ - /* CS1 is Ethernet LAN9211 */ - enable_gpmc_cs_config(gpmc_lab_enet, &gpmc_cfg->cs[1], - DEBUG_BASE, GPMC_SIZE_16M); - /* board id for Linux */ - gd->bd->bi_arch_number = MACH_TYPE_OMAP_LDP; - /* boot param addr */ - gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); - - return 0; -} - -/* - * Routine: misc_init_r - * Description: Configure zoom board specific configurations - */ -int misc_init_r(void) -{ - twl4030_power_init(); - twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); - omap_die_id_display(); - - /* - * Board Reset - * The board is reset by holding the red button on the - * top right front face for eight seconds. - */ - twl4030_power_reset_init(); - - return 0; -} - -/* - * Routine: set_muxconf_regs - * Description: Setting up the configuration Mux registers specific to the - * hardware. Many pins need to be moved from protect to primary - * mode. - */ -void set_muxconf_regs(void) -{ - /* platform specific muxes */ - MUX_ZOOM1_MDK(); -} - -#ifdef CONFIG_MMC -int board_mmc_init(bd_t *bis) -{ - return omap_mmc_init(0, 0, 0, -1, -1); -} - -void board_mmc_power_init(void) -{ - twl4030_power_mmc_init(0); -} -#endif - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; - -#ifdef CONFIG_SMC911X -#define STR_ENV_ETHADDR "ethaddr" - - struct eth_device *dev; - uchar eth_addr[6]; - - rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); - if (!eth_env_get_enetaddr(STR_ENV_ETHADDR, eth_addr)) { - dev = eth_get_dev_by_index(0); - if (dev) { - eth_env_set_enetaddr(STR_ENV_ETHADDR, dev->enetaddr); - } else { - printf("zoom1: Couldn't get eth device\n"); - rc = -1; - } - } -#endif - - return rc; -} -#endif diff --git a/board/logicpd/zoom1/zoom1.h b/board/logicpd/zoom1/zoom1.h deleted file mode 100644 index 63847616cf..0000000000 --- a/board/logicpd/zoom1/zoom1.h +++ /dev/null @@ -1,122 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2008 - * Texas Instruments - * Nishanth Menon - * - * Derived from: board/omap3/beagle/beagle.h - * Dirk Behme - */ -#ifndef _BOARD_ZOOM1_H_ -#define _BOARD_ZOOM1_H_ - -const omap3_sysinfo sysinfo = { - DDR_STACKED, - "OMAP3 Zoom MDK Rev 1", - "NAND", -}; - -#define ZOOM1_ENET_GPMC_CONF1 0x00611000 -#define ZOOM1_ENET_GPMC_CONF2 0x001F1F01 -#define ZOOM1_ENET_GPMC_CONF3 0x00080803 -#define ZOOM1_ENET_GPMC_CONF4 0x1D091D09 -#define ZOOM1_ENET_GPMC_CONF5 0x041D1F1F -#define ZOOM1_ENET_GPMC_CONF6 0x1D0904C4 - -/* - * IEN - Input Enable - * IDIS - Input Disable - * PTD - Pull type Down - * PTU - Pull type Up - * DIS - Pull type selection is inactive - * EN - Pull type selection is active - * M0 - Mode 0 - * The commented string gives the final mux configuration for that pin - */ -#define MUX_ZOOM1_MDK() \ - /*SDRC*/\ - MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\ - MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\ - MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\ - MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\ - MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\ - MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\ - MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\ - MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\ - MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\ - MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\ - MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\ - MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\ - MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\ - MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\ - MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\ - MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\ - MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\ - MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\ - MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\ - MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\ - MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\ - MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\ - MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\ - MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\ - MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\ - MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\ - MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\ - MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\ - MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\ - MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\ - MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\ - MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\ - MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\ - MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\ - MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\ - MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ - MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ - /*GPMC*/\ - MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\ - MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\ - MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\ - MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\ - MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\ - MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\ - MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\ - MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\ - MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\ - MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\ - MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\ - MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\ - MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\ - MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\ - MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\ - MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\ - MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\ - MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\ - MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\ - MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\ - MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\ - MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\ - MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\ - MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\ - MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\ - MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\ - MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ - MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\ - MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | DIS | M7)) /*GPMC_nCS2*/\ - MUX_VAL(CP(GPMC_NCS3), (IEN | PTU | DIS | M4)) /*GPMC_nCS3 -> GPIO54*/\ - MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | DIS | M4)) /*GPMC_nCS4 -> GPIO 55*/\ - MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M4)) /*GPMC_nCS5 -> GPIO 56*/\ - MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M7)) /*GPMC_nCS6*/\ - MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M1)) /*GPMC_nCS7 -> GPMC_IO_DIR*/\ - MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\ - MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ - MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ - MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\ - MUX_VAL(CP(GPMC_NWP), (IDIS | PTU | DIS | M0)) /*GPMC_nWP*/\ - MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\ - MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /*GPMC_nBE1*/\ - MUX_VAL(CP(GPMC_WAIT0), (IEN | PTD | EN | M0)) /*GPMC_WAIT0*/\ - MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ - MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /*GPMC_WAIT2*/\ - MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_WAIT3*/ - -#endif /* _BOARD_ZOOM_H_ */ diff --git a/configs/omap3_zoom1_defconfig b/configs/omap3_zoom1_defconfig deleted file mode 100644 index 17b36350e6..0000000000 --- a/configs/omap3_zoom1_defconfig +++ /dev/null @@ -1,41 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_TARGET_OMAP3_ZOOM1=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_DISTRO_DEFAULTS=y -# CONFIG_USE_BOOTCOMMAND is not set -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_VERSION_VARIABLE=y -# CONFIG_CMD_IMI is not set -CONFIG_CMD_ASKENV=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y -CONFIG_CMD_NAND_LOCK_UNLOCK=y -CONFIG_CMD_SPI=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=nand" -CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs)" -CONFIG_ENV_IS_IN_NAND=y -CONFIG_TWL4030_LED=y -CONFIG_MMC_OMAP_HS=y -CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y -CONFIG_SYS_NAND_BUSWIDTH_16BIT=y -CONFIG_SMC911X=y -CONFIG_SMC911X_BASE=0x08000000 -CONFIG_SMC911X_32_BIT=y -CONFIG_SPI=y -CONFIG_OMAP3_SPI=y -CONFIG_USB=y -CONFIG_USB_MUSB_UDC=y -CONFIG_USB_OMAP3=y -CONFIG_TWL4030_USB=y -CONFIG_USB_GADGET=y -CONFIG_FAT_WRITE=y -CONFIG_OF_LIBFDT=y diff --git a/doc/README.omap3 b/doc/README.omap3 index bf99cff848..5f2af88334 100644 --- a/doc/README.omap3 +++ b/doc/README.omap3 @@ -41,11 +41,6 @@ make make omap3_evm_config make -* Zoom MDK: - -make omap3_zoom1_config -make - * Zoom 2: make omap3_zoom2_config diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h deleted file mode 100644 index 24884b26fb..0000000000 --- a/include/configs/omap3_zoom1.h +++ /dev/null @@ -1,131 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2006-2008 - * Texas Instruments. - * Richard Woodruff - * Syed Mohammed Khasim - * Nishanth Menon - * - * Configuration settings for the TI OMAP3430 Zoom MDK board. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include /* get chip and board defs */ -#include -#include - -/* Remove SPL boot option - we do not support that on LDP yet */ - -/* Generic NAND definition conflicts with debug_base */ -#undef CONFIG_SYS_NAND_BASE - -#define CONFIG_REVISION_TAG 1 - -/* - * Hardware drivers - */ - -/* USB device configuration */ -#define CONFIG_USB_DEVICE 1 -#define CONFIG_USB_TTY 1 -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "Zoom1" - -#if defined(CONFIG_CMD_NAND) -/* NAND: SPL falcon mode configs */ -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 -#endif -#endif - -/* - * TWL4030 - */ - -/* - * Board NAND Info. - */ -#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ - /* to access nand at */ - /* CS0 */ - -/* Environment information */ - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x82000000\0" \ - "fdtaddr=0x80f80000\0" \ - "bootfile=uImage\0" \ - "fdtfile=omap3-ldp.dtb\0" \ - "bootdir=/\0" \ - "bootpart=0:1\0" \ - "usbtty=cdc_acm\0" \ - "console=ttyO2,115200n8\0" \ - "mmcdev=0\0" \ - "videomode=1024x768@60,vxres=1024,vyres=768\0" \ - "videospec=omapfb:vram:2M,vram:4M\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "video=${videospec},mode:${videomode} " \ - "root=/dev/mmcblk0p2 rw " \ - "rootfstype=ext3 rootwait\0" \ - "nandargs=setenv bootargs console=${console} " \ - "video=${videospec},mode:${videomode} " \ - "root=/dev/mtdblock4 rw " \ - "rootfstype=jffs2\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source ${loadaddr}\0" \ - "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ - "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ - "loadzimage=setenv bootfile zImage; if run loadimage; then run loadfdt;fi\0"\ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "mmczboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "bootz ${loadaddr} - ${fdtaddr}\0" \ - "nandboot=echo Booting from nand ...; " \ - "run nandargs; " \ - "nand read ${loadaddr} 280000 400000; " \ - "bootm ${loadaddr}\0" \ - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else if run loadzimage; then " \ - "run mmczboot; " \ - "else run nandboot; " \ - "fi; fi;" \ - "fi; " \ - "else run nandboot; fi" - -/* - * Miscellaneous configurable options - */ - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -/* **** PISMO SUPPORT *** */ -#if defined(CONFIG_CMD_NAND) -#define CONFIG_SYS_FLASH_BASE NAND_BASE -#endif - -/* Monitor at start of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP - -#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ - -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ - -#endif /* __CONFIG_H */ From patchwork Tue May 26 17:44:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1262 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-il1-f197.google.com (mail-il1-f197.google.com [209.85.166.197]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id BD7A83F1DD for ; Tue, 26 May 2020 19:45:33 +0200 (CEST) Received: by mail-il1-f197.google.com with SMTP id x2sf6839205ill.13 for ; Tue, 26 May 2020 10:45:33 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; 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[209.85.220.65]) by mx.google.com with SMTPS id g17sor318377ion.68.2020.05.26.10.45.31 for (Google Transport Security); Tue, 26 May 2020 10:45:31 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:7c0a:: with SMTP id x10mr72858pgc.78.1590515131117; Tue, 26 May 2020 10:45:31 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id x20sm136232pfc.211.2020.05.26.10.45.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:45:30 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki , Albert ARIBAUD Subject: [PATCH 08/14] quipos: Drop omap3 cairo Date: Tue, 26 May 2020 23:14:43 +0530 Message-Id: <20200526174444.262050-9-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174444.262050-1-jagan@amarulasolutions.com> References: <20200526174444.262050-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=U8dqVUq+; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , OF_CONTROL, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Cc: Albert ARIBAUD (3ADEV) Signed-off-by: Jagan Teki --- arch/arm/mach-omap2/omap3/Kconfig | 8 - board/quipos/cairo/Kconfig | 12 -- board/quipos/cairo/MAINTAINERS | 6 - board/quipos/cairo/Makefile | 6 - board/quipos/cairo/cairo.c | 98 --------- board/quipos/cairo/cairo.h | 318 ------------------------------ configs/cairo_defconfig | 40 ---- include/configs/omap3_cairo.h | 215 -------------------- 8 files changed, 703 deletions(-) delete mode 100644 board/quipos/cairo/Kconfig delete mode 100644 board/quipos/cairo/MAINTAINERS delete mode 100644 board/quipos/cairo/Makefile delete mode 100644 board/quipos/cairo/cairo.c delete mode 100644 board/quipos/cairo/cairo.h delete mode 100644 configs/cairo_defconfig delete mode 100644 include/configs/omap3_cairo.h diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig index 7421fe5e6c..044f61c796 100644 --- a/arch/arm/mach-omap2/omap3/Kconfig +++ b/arch/arm/mach-omap2/omap3/Kconfig @@ -97,13 +97,6 @@ config TARGET_TAO3530 select OMAP3_GPIO_5 select OMAP3_GPIO_6 -config TARGET_OMAP3_CAIRO - bool "QUIPOS CAIRO" - select DM - select DM_GPIO - select DM_SERIAL - imply CMD_DM - config TARGET_SNIPER bool "LG Optimus Black" select DM @@ -152,7 +145,6 @@ source "board/corscience/tricorder/Kconfig" source "board/logicpd/omap3som/Kconfig" source "board/nokia/rx51/Kconfig" source "board/technexion/tao3530/Kconfig" -source "board/quipos/cairo/Kconfig" source "board/lg/sniper/Kconfig" endif diff --git a/board/quipos/cairo/Kconfig b/board/quipos/cairo/Kconfig deleted file mode 100644 index 8df9421b57..0000000000 --- a/board/quipos/cairo/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_OMAP3_CAIRO - -config SYS_BOARD - default "cairo" - -config SYS_VENDOR - default "quipos" - -config SYS_CONFIG_NAME - default "omap3_cairo" - -endif diff --git a/board/quipos/cairo/MAINTAINERS b/board/quipos/cairo/MAINTAINERS deleted file mode 100644 index 01332da5ab..0000000000 --- a/board/quipos/cairo/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -CAIRO BOARD -M: Albert ARIBAUD (3ADEV) -S: Maintained -F: board/quipos/cairo/ -F: include/configs/omap3_cairo.h -F: configs/cairo_defconfig diff --git a/board/quipos/cairo/Makefile b/board/quipos/cairo/Makefile deleted file mode 100644 index ec2c83cc89..0000000000 --- a/board/quipos/cairo/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2014 DENX Software Engineering -# Written-By: Albert ARIBAUD - -obj-y := cairo.o diff --git a/board/quipos/cairo/cairo.c b/board/quipos/cairo/cairo.c deleted file mode 100644 index 8999542a7d..0000000000 --- a/board/quipos/cairo/cairo.c +++ /dev/null @@ -1,98 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2014 DENX - * Written-by: Albert ARIBAUD - * - * Derived from code written by Robert Aigner (ra@spiid.net) - * - * Itself derived from Beagle Board and 3430 SDP code by - * Richard Woodruff - * Syed Mohammed Khasim - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "cairo.h" - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Routine: board_init - * Description: Early hardware init. - */ -int board_init(void) -{ - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ - /* board id for Linux */ - gd->bd->bi_arch_number = CONFIG_MACH_TYPE; - /* boot param addr */ - gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); - return 0; -} - -/* - * Routine: set_muxconf_regs - * Description: Setting up the configuration Mux registers specific to the - * hardware. Many pins need to be moved from protect to primary - * mode. - */ -void set_muxconf_regs(void) -{ - MUX_CAIRO(); -} - -#if defined(CONFIG_MMC) -int board_mmc_init(bd_t *bis) -{ - return omap_mmc_init(0, 0, 0, -1, -1); -} -#endif - -#ifdef CONFIG_SPL_BUILD -/* - * Routine: get_board_mem_timings - * Description: If we use SPL then there is no x-loader nor config header - * so we have to setup the DDR timings ourself on the first bank. This - * provides the timing values back to the function that configures - * the memory. - * - * The Cairo board uses SAMSUNG DDR - K4X51163PG-FGC6 - */ -void get_board_mem_timings(struct board_sdrc_timings *timings) -{ - timings->sharing = SAMSUNG_SHARING; - timings->mcfg = SAMSUNG_V_MCFG_165(128 << 20); - timings->ctrla = SAMSUNG_V_ACTIMA_165; - timings->ctrlb = SAMSUNG_V_ACTIMB_165; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; - timings->mr = SAMSUNG_V_MR_165; -} -#endif - -static const struct ns16550_platdata cairo_serial = { - .base = OMAP34XX_UART2, - .reg_shift = 2, - .clock = V_NS16550_CLK, - .fcr = UART_FCR_DEFVAL, -}; - -U_BOOT_DEVICE(cairo_uart) = { - "ns16550_serial", - &cairo_serial -}; - -/* force SPL booting into U-Boot, not Linux */ -#ifdef CONFIG_SPL_OS_BOOT -int spl_start_uboot(void) -{ - return 1; -} -#endif diff --git a/board/quipos/cairo/cairo.h b/board/quipos/cairo/cairo.h deleted file mode 100644 index f57a6081d8..0000000000 --- a/board/quipos/cairo/cairo.h +++ /dev/null @@ -1,318 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) DENX - * Written-by: Albert ARIBAUD - * - * Original code (C) Copyright 2010 - * Robert Aigner (ra@spiid.net) - */ -#ifndef _EVM_H_ -#define _EVM_H_ - - -const omap3_sysinfo sysinfo = { - DDR_DISCRETE, - "OMAP3 Cairo board", - "NAND", -}; - -/* - * OMAP3 Cairo handheld hardware revision - */ -enum { - OMAP3_CAIRO_BOARD_GEN_1 = 0, /* Cairo handheld V01 */ - OMAP3_CAIRO_BOARD_GEN_2, -}; - -#define MUX_CAIRO() \ -MUX_VAL(CONTROL_PADCONF_GPIO112, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPIO113, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPIO114, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPIO115, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPIO126, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPIO127, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPIO128, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPIO129, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_CAM_D0, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_D1, (IEN | DIS | SB_HIZ | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_D2, (IEN | DIS | SB_HIZ | M7)) \ -MUX_VAL(CONTROL_PADCONF_CAM_D3, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_D4, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_D5, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_CAM_D6, (IEN | PTD | EN | SB_HIZ | SB_PD | M7)) \ -MUX_VAL(CONTROL_PADCONF_CAM_D7, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_CAM_D8, (IEN | DIS | SB_HIZ | M7)) \ -MUX_VAL(CONTROL_PADCONF_CAM_D9, (IEN | DIS | SB_HIZ | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_D10, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_CAM_D11, (IEN | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_FLD, (IEN | DIS | SB_HIZ | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_HS, (IEN | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_PCLK, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_STROBE, (IDIS | PTU | EN | SB_HI | SB_PU | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_VS, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_WEN, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_XCLKA, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_CAM_XCLKB, (IEN | DIS | SB_HIZ | SB_PD | M7)) \ -MUX_VAL(CONTROL_PADCONF_DSS_ACBIAS, (IDIS | PTD | EN | SB_HIZ | SB_PD | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA0, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA1, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA2, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA3, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA4, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA5, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA6, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA7, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA8, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA9, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA10, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA11, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA12, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA13, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA14, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA15, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA16, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA17, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA18, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA19, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA20, (IDIS | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA21, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA22, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_DATA23, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_HSYNC, (IDIS | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_PCLK, (IDIS | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_DSS_VSYNC, (IDIS | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_ETK_CLK_ES2, (IDIS | PTU | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_CTL_ES2, (IDIS | PTU | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D0_ES2, (IEN | PTU | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D1_ES2, (IEN | PTU | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D2_ES2, (IEN | PTU | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D3_ES2, (IEN | PTU | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D4_ES2, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D5_ES2, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D6_ES2, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D7_ES2, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D8_ES2, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D9_ES2, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D10_ES2, (IDIS | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D11_ES2, (IDIS | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D12_ES2, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D13_ES2, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D14_ES2, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_ETK_D15_ES2, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_A1, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_A2, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_A3, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_A4, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_A5, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_A6, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_A7, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_A8, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_A9, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_A10, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_A11, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_CLK, (IEN | DIS | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D0, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D1, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D2, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D3, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D4, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D5, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D6, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D7, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D8, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D9, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D10, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D11, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D12, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D13, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D14, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_D15, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NADV_ALE, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NBE0_CLE, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NBE1, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NCS0, (IDIS | DIS | SB_HIZ | SB_PD | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NCS1, (IEN | DIS | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NCS2, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NCS3, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NCS4, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NCS5, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NCS6, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NCS7, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NOE, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NWE, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_NWP, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_WAIT0, (IEN | DIS | SB_HIZ | M0)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_WAIT1, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_WAIT2, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_GPMC_WAIT3, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_HDQ_SIO, (IEN | DIS | SB_HIZ | M4)) \ -MUX_VAL(CONTROL_PADCONF_HSUSB0_CLK, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA0, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA1, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA2, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA3, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA4, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA5, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA6, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA7, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_HSUSB0_DIR, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_HSUSB0_NXT, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_HSUSB0_STP, (IDIS | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_I2C1_SCL, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_I2C1_SDA, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_I2C2_SCL, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_I2C2_SDA, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_I2C3_SCL, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_I2C3_SDA, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_I2C4_SCL, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_I2C4_SDA, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_JTAG_EMU0, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_JTAG_EMU1, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_JTAG_NTRST, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_JTAG_RTCK, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_JTAG_TCK, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_JTAG_TDI, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_JTAG_TDO, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_JTAG_TMS, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP_CLKS, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP1_CLKR, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP1_CLKX, (IEN | DIS | SB_HIZ | M4)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP1_DR, (IEN | DIS | SB_HIZ | M4)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP1_DX, (IEN | DIS | SB_HIZ | SB_PD | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP1_FSR, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP1_FSX, (IEN | DIS | SB_HIZ | M4)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP2_CLKX, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP2_DR, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP2_DX, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP2_FSX, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP3_CLKX, (IDIS | DIS | SB_HIZ | SB_PU | M1)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP3_DR, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP3_DX, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP3_FSX, (IEN | PTU | EN | SB_HIZ | SB_PU | M1)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP4_CLKX, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP4_DR, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP4_DX, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCBSP4_FSX, (IEN | PTD | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCSPI1_CLK, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_MCSPI1_CS0, (IEN | PTU | EN | SB_HIZ | SB_PD | M0)) \ -MUX_VAL(CONTROL_PADCONF_MCSPI1_CS1, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCSPI1_CS2, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_MCSPI1_CS3, (IEN | PTU | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_MCSPI1_SIMO, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_MCSPI1_SOMI, (IEN | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_MCSPI2_CLK, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_MCSPI2_CS0, (IEN | PTU | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_MCSPI2_CS1, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_MCSPI2_SIMO, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_MCSPI2_SOMI, (IEN | PTD | EN | M3)) \ -MUX_VAL(CONTROL_PADCONF_MMC1_CLK, (IDIS | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC1_CMD, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC1_DAT0, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC1_DAT1, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC1_DAT2, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC1_DAT3, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC2_CLK, (IEN | PTD | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC2_CMD, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC2_DAT0, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC2_DAT1, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC2_DAT2, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC2_DAT3, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC2_DAT4, (IDIS | DIS | SB_HIZ | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC2_DAT5, (IDIS | DIS | SB_HIZ | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC2_DAT6, (IDIS | DIS | SB_HIZ | M0)) \ -MUX_VAL(CONTROL_PADCONF_MMC2_DAT7, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A0, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A1, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A2, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A3, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A4, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A5, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A6, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A7, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A8, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A9, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A10, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A11, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A12, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A13, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_A14, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_BA0, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_BA1, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_CKE0, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_CKE1, (IDIS | DIS | M7)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_CLK, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D0, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D1, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D2, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D3, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D4, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D5, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D6, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D7, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D8, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D9, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D10, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D11, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D12, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D13, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D14, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D15, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D16, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D17, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D18, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D19, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D20, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D21, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D22, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D23, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D24, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D25, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D26, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D27, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D28, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D29, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D30, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_D31, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_DM0, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_DM1, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_DM2, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_DM3, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_DQS0, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_DQS1, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_DQS2, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_DQS3, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_NCAS, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_NCLK, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_NCS0, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_NCS1, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_NRAS, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SDRC_NWE, (IDIS | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_32K, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_BOOT0, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_BOOT1, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_BOOT2, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_BOOT3, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_BOOT4, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_BOOT5, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_BOOT6, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_CLKOUT1, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_CLKOUT2, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_CLKREQ, (IEN | DIS | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_NIRQ, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_NRESWARM, (IEN | PTU | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_SYS_OFF_MODE, (IDIS | PTD | EN | M0)) \ -MUX_VAL(CONTROL_PADCONF_UART1_CTS, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_UART1_RTS, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_UART1_RX, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_UART1_TX, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_UART2_CTS, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_UART2_RTS, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_UART2_RX, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_UART2_TX, (IEN | PTU | EN | M7)) \ -MUX_VAL(CONTROL_PADCONF_UART3_CTS_RCTX, \ - (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_UART3_RTS_SD, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_UART3_RX_IRRX, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \ -MUX_VAL(CONTROL_PADCONF_UART3_TX_IRTX, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \ - -#endif diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig deleted file mode 100644 index b5387f5b9e..0000000000 --- a/configs/cairo_defconfig +++ /dev/null @@ -1,40 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_SYS_TEXT_BASE=0x80100000 -CONFIG_TARGET_OMAP3_CAIRO=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_SPL=y -CONFIG_SPL_TEXT_BASE=0x40200800 -CONFIG_DISTRO_DEFAULTS=y -CONFIG_BOOTDELAY=-2 -# CONFIG_USE_BOOTCOMMAND is not set -CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_VERSION_VARIABLE=y -CONFIG_SPL_MTD_SUPPORT=y -CONFIG_SPL_OS_BOOT=y -CONFIG_SYS_PROMPT="Cairo # " -# CONFIG_CMD_IMI is not set -CONFIG_CMD_SPL=y -CONFIG_CMD_SPL_NAND_OFS=0x240000 -CONFIG_CMD_ASKENV=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y -CONFIG_CMD_NAND_LOCK_UNLOCK=y -CONFIG_CMD_SPI=y -# CONFIG_CMD_NET is not set -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_MTDPARTS=y -CONFIG_ENV_IS_IN_NAND=y -CONFIG_TWL4030_LED=y -CONFIG_MMC_OMAP_HS=y -CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y -CONFIG_SPL_NAND_SIMPLE=y -CONFIG_CONS_INDEX=2 -CONFIG_SPI=y -CONFIG_OMAP3_SPI=y -CONFIG_FAT_WRITE=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h deleted file mode 100644 index c76c81ddd5..0000000000 --- a/include/configs/omap3_cairo.h +++ /dev/null @@ -1,215 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration settings for the QUIPOS Cairo board. - * - * Copyright (C) DENX GmbH - * - * Author : - * Albert ARIBAUD - * - * Derived from EVM code by - * Manikandan Pillai - * Itself derived from Beagle Board and 3430 SDP code by - * Richard Woodruff - * Syed Mohammed Khasim - * - * Also derived from include/configs/omap3_beagle.h - */ - -#ifndef __OMAP3_CAIRO_CONFIG_H -#define __OMAP3_CAIRO_CONFIG_H - -/* - * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 0x800FFFC0--0x80100000 should not be used for any - * other needs. We use this rather than the inherited defines from - * ti_armv7_common.h for backwards compatibility. - */ -#define CONFIG_SPL_BSS_START_ADDR 0x80000000 -#define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */ -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 - -#include - -#define CONFIG_REVISION_TAG 1 -#define CONFIG_ENV_OVERWRITE - -/* Enable Multi Bus support for I2C */ -#define CONFIG_I2C_MULTI_BUS 1 - -/* Probe all devices */ -#define CONFIG_SYS_I2C_NOPROBES { {0x0, 0x0} } - -/* - * TWL4030 - */ - -/* - * Board NAND Info. - */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ - /* devices */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "machid=ffffffff\0" \ - "fdt_high=0x87000000\0" \ - "baudrate=115200\0" \ - "fec_addr=00:50:C2:7E:90:F0\0" \ - "netmask=255.255.255.0\0" \ - "ipaddr=192.168.2.9\0" \ - "gateway=192.168.2.1\0" \ - "serverip=192.168.2.10\0" \ - "nfshost=192.168.2.10\0" \ - "stdin=serial\0" \ - "stdout=serial\0" \ - "stderr=serial\0" \ - "bootargs_mmc_ramdisk=mem=128M " \ - "console=ttyO1,115200n8 " \ - "root=/dev/ram0 rw " \ - "initrd=0x81600000,16M " \ - "mpurate=600 ramdisk_size=16384 omapfb.rotate=1 " \ - "omapfb.rotate_type=1 omap_vout.vid1_static_vrfb_alloc=y\0" \ - "mmcboot=mmc init; " \ - "fatload mmc 0 0x80000000 uImage; " \ - "fatload mmc 0 0x81600000 ramdisk.gz; " \ - "setenv bootargs ${bootargs_mmc_ramdisk}; " \ - "bootm 0x80000000\0" \ - "bootargs_nfs=mem=99M console=ttyO0,115200n8 noinitrd rw ip=dhcp " \ - "root=/dev/nfs " \ - "nfsroot=192.168.2.10:/home/spiid/workdir/Quipos/rootfs,nolock " \ - "mpurate=600 omapfb.rotate=1 omapfb.rotate_type=1 " \ - "omap_vout.vid1_static_vrfb_alloc=y\0" \ - "boot_nfs=run get_kernel; setenv bootargs ${bootargs_nfs}; " \ - "bootm 0x80000000\0" \ - "bootargs_nand=mem=128M console=ttyO1,115200n8 noinitrd " \ - "root=/dev/mtdblock4 rw rootfstype=jffs2 mpurate=600 " \ - "omap_vout.vid1_static_vrfb_alloc=y omapfb.rotate=1 " \ - "omapfb.rotate_type=1\0" \ - "boot_nand=nand read.i 0x80000000 280000 300000; setenv " \ - "bootargs ${bootargs_nand}; bootm 0x80000000\0" \ - "ledorange=i2c dev 1; i2c mw 60 00 00 1; i2c mw 60 14 FF 1; " \ - "i2c mw 60 15 FF 1; i2c mw 60 16 FF 1; i2c mw 60 17 FF 1; " \ - "i2c mw 60 09 10 1; i2c mw 60 06 10 1\0" \ - "ledgreen=i2c dev 1; i2c mw 60 00 00 1; i2c mw 60 14 FF 1; " \ - "i2c mw 60 15 FF 1; i2c mw 60 16 FF 1; i2c mw 60 17 FF 1; i2c " \ - "mw 60 09 00 1; i2c mw 60 06 10 1\0" \ - "ledoff=i2c dev 1; i2c mw 60 00 00 1; i2c mw 60 14 FF 1; " \ - "i2c mw 60 15 FF 1; i2c mw 60 16 FF 1; i2c mw 60 17 FF 1; " \ - "i2c mw 60 09 00 1; i2c mw 60 06 0 1\0" \ - "ledred=i2c dev 1; i2c mw 60 00 00 1; i2c mw 60 14 FF 1; " \ - "i2c mw 60 15 FF 1; i2c mw 60 16 FF 1; i2c mw 60 17 FF 1; " \ - "i2c mw 60 09 10 1; i2c mw 60 06 0 1\0" \ - "flash_xloader=mw.b 0x81600000 0xff 0x20000; " \ - "nand erase 0 20000; " \ - "fatload mmc 0 0x81600000 MLO; " \ - "nandecc hw; " \ - "nand write.i 0x81600000 0 20000;\0" \ - "flash_uboot=mw.b 0x81600000 0xff 0x40000; " \ - "nand erase 80000 40000; " \ - "fatload mmc 0 0x81600000 u-boot.bin; " \ - "nandecc sw; " \ - "nand write.i 0x81600000 80000 40000;\0" \ - "flash_kernel=mw.b 0x81600000 0xff 0x300000; " \ - "nand erase 280000 300000; " \ - "fatload mmc 0 0x81600000 uImage; " \ - "nandecc sw; " \ - "nand write.i 0x81600000 280000 300000;\0" \ - "flash_rootfs=fatload mmc 0 0x81600000 rootfs.jffs2; " \ - "nandecc sw; " \ - "nand write.jffs2 0x680000 0xFF ${filesize}; " \ - "nand erase 680000 ${filesize}; " \ - "nand write.jffs2 81600000 680000 ${filesize};\0" \ - "flash_scrub=nand scrub; " \ - "run flash_xloader; " \ - "run flash_uboot; " \ - "run flash_kernel; " \ - "run flash_rootfs;\0" \ - "flash_all=run ledred; " \ - "nand erase.chip; " \ - "run ledorange; " \ - "run flash_xloader; " \ - "run flash_uboot; " \ - "run flash_kernel; " \ - "run flash_rootfs; " \ - "run ledgreen; " \ - "run boot_nand; \0" \ - -#define CONFIG_BOOTCOMMAND \ - "if fatload mmc 0 0x81600000 MLO; then run flash_all; " \ - "else run boot_nand; fi" - -/* - * OMAP3 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -/* **** PISMO SUPPORT *** */ -#if defined(CONFIG_CMD_NAND) -#define CONFIG_SYS_FLASH_BASE NAND_BASE -#endif - -/* Monitor at start of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP - -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ - -/* Defines for SPL */ - -/* NAND boot config */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ - 10, 11, 12, 13} -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 -/* NAND: SPL falcon mode configs */ -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 -#endif - -/* env defaults */ -#define CONFIG_BOOTFILE "uImage" - -/* Provide the MACH_TYPE value the vendor kernel requires */ -#define CONFIG_MACH_TYPE 3063 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -/* **** PISMO SUPPORT *** */ - -#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */ - /* on one chip */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ - -/*----------------------------------------------------------------------- - * CFI FLASH driver setup - */ -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) - -/* Flash banks JFFS2 should use */ -#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ - CONFIG_SYS_MAX_NAND_DEVICE) -#define CONFIG_SYS_JFFS2_MEM_NAND -/* use flash_info[2] */ -#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 - -#endif /* __OMAP3_CAIRO_CONFIG_H */ From patchwork Tue May 26 17:44:44 2020 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id o30sor595597pgb.82.2020.05.26.10.45.34 for (Google Transport Security); Tue, 26 May 2020 10:45:34 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a65:52cd:: with SMTP id z13mr18038pgp.259.1590515134223; Tue, 26 May 2020 10:45:34 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id x20sm136232pfc.211.2020.05.26.10.45.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:45:33 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 09/14] gumstix: Drop duovero Date: Tue, 26 May 2020 23:14:44 +0530 Message-Id: <20200526174444.262050-10-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174444.262050-1-jagan@amarulasolutions.com> References: <20200526174444.262050-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=ELCLM7w9; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , DM, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Signed-off-by: Jagan Teki --- arch/arm/mach-omap2/omap4/Kconfig | 4 - board/gumstix/duovero/Kconfig | 12 - board/gumstix/duovero/MAINTAINERS | 6 - board/gumstix/duovero/Makefile | 6 - board/gumstix/duovero/duovero.c | 273 ----------------------- board/gumstix/duovero/duovero_mux_data.h | 198 ---------------- configs/duovero_defconfig | 42 ---- include/configs/duovero.h | 36 --- include/configs/ti_omap4_common.h | 2 - 9 files changed, 579 deletions(-) delete mode 100644 board/gumstix/duovero/Kconfig delete mode 100644 board/gumstix/duovero/MAINTAINERS delete mode 100644 board/gumstix/duovero/Makefile delete mode 100644 board/gumstix/duovero/duovero.c delete mode 100644 board/gumstix/duovero/duovero_mux_data.h delete mode 100644 configs/duovero_defconfig delete mode 100644 include/configs/duovero.h diff --git a/arch/arm/mach-omap2/omap4/Kconfig b/arch/arm/mach-omap2/omap4/Kconfig index 49adb8ec5b..899289b645 100644 --- a/arch/arm/mach-omap2/omap4/Kconfig +++ b/arch/arm/mach-omap2/omap4/Kconfig @@ -4,9 +4,6 @@ choice prompt "OMAP4 board select" optional -config TARGET_DUOVERO - bool "OMAP4430 Gumstix Duovero" - config TARGET_OMAP4_PANDA bool "TI OMAP4 PandaBoard" @@ -21,7 +18,6 @@ endchoice config SYS_SOC default "omap4" -source "board/gumstix/duovero/Kconfig" source "board/ti/panda/Kconfig" source "board/ti/sdp4430/Kconfig" source "board/amazon/kc1/Kconfig" diff --git a/board/gumstix/duovero/Kconfig b/board/gumstix/duovero/Kconfig deleted file mode 100644 index 2f8558aaf3..0000000000 --- a/board/gumstix/duovero/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_DUOVERO - -config SYS_BOARD - default "duovero" - -config SYS_VENDOR - default "gumstix" - -config SYS_CONFIG_NAME - default "duovero" - -endif diff --git a/board/gumstix/duovero/MAINTAINERS b/board/gumstix/duovero/MAINTAINERS deleted file mode 100644 index 87cd4e670c..0000000000 --- a/board/gumstix/duovero/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -DUOVERO BOARD -M: Ash Charles -S: Maintained -F: board/gumstix/duovero/ -F: include/configs/duovero.h -F: configs/duovero_defconfig diff --git a/board/gumstix/duovero/Makefile b/board/gumstix/duovero/Makefile deleted file mode 100644 index d6eff473f8..0000000000 --- a/board/gumstix/duovero/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y := duovero.o diff --git a/board/gumstix/duovero/duovero.c b/board/gumstix/duovero/duovero.c deleted file mode 100644 index 0df03a5a61..0000000000 --- a/board/gumstix/duovero/duovero.c +++ /dev/null @@ -1,273 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2013 - * Gumstix Inc. - * Maintainer: Ash Charles - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "duovero_mux_data.h" - -#define WIFI_EN 43 - -#if defined(CONFIG_CMD_NET) -#define SMSC_NRESET 45 -static void setup_net_chip(void); -#endif - -#ifdef CONFIG_USB_EHCI_HCD -#include -#include -#include -#endif - -DECLARE_GLOBAL_DATA_PTR; - -const struct omap_sysinfo sysinfo = { - "Board: duovero\n" -}; - -struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000; - -/** - * @brief board_init - * - * @return 0 - */ -int board_init(void) -{ - gpmc_init(); - - gd->bd->bi_arch_number = MACH_TYPE_DUOVERO; - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - - return 0; -} - -/** - * @brief misc_init_r - Configure board specific configurations - * such as power configurations, ethernet initialization as phase2 of - * boot sequence - * - * @return 0 - */ -int misc_init_r(void) -{ - int ret = 0; - u8 val; - - /* wifi setup: first enable 32Khz clock from 6030 pmic */ - val = 0xe1; - ret = i2c_write(TWL6030_CHIP_PM, 0xbe, 1, &val, 1); - if (ret) - printf("Failed to enable 32Khz clock to wifi module\n"); - - /* then setup WIFI_EN as an output pin and send reset pulse */ - if (!gpio_request(WIFI_EN, "")) { - gpio_direction_output(WIFI_EN, 0); - gpio_set_value(WIFI_EN, 1); - udelay(1); - gpio_set_value(WIFI_EN, 0); - udelay(1); - gpio_set_value(WIFI_EN, 1); - } - -#if defined(CONFIG_CMD_NET) - setup_net_chip(); -#endif - return 0; -} - -void set_muxconf_regs(void) -{ - do_set_mux((*ctrl)->control_padconf_core_base, - core_padconf_array_essential, - sizeof(core_padconf_array_essential) / - sizeof(struct pad_conf_entry)); - - do_set_mux((*ctrl)->control_padconf_wkup_base, - wkup_padconf_array_essential, - sizeof(wkup_padconf_array_essential) / - sizeof(struct pad_conf_entry)); - - do_set_mux((*ctrl)->control_padconf_core_base, - core_padconf_array_non_essential, - sizeof(core_padconf_array_non_essential) / - sizeof(struct pad_conf_entry)); - - do_set_mux((*ctrl)->control_padconf_wkup_base, - wkup_padconf_array_non_essential, - sizeof(wkup_padconf_array_non_essential) / - sizeof(struct pad_conf_entry)); -} - -#if defined(CONFIG_MMC) -int board_mmc_init(bd_t *bis) -{ - return omap_mmc_init(0, 0, 0, -1, -1); -} - -#if !defined(CONFIG_SPL_BUILD) -void board_mmc_power_init(void) -{ - twl6030_power_mmc_init(0); -} -#endif -#endif - -#if defined(CONFIG_CMD_NET) - -#define GPMC_SIZE_16M 0xF -#define GPMC_BASEADDR_MASK 0x3F -#define GPMC_CS_ENABLE 0x1 - -static void enable_gpmc_net_config(const u32 *gpmc_config, const struct gpmc_cs *cs, - u32 base, u32 size) -{ - writel(0, &cs->config7); - sdelay(1000); - /* Delay for settling */ - writel(gpmc_config[0], &cs->config1); - writel(gpmc_config[1], &cs->config2); - writel(gpmc_config[2], &cs->config3); - writel(gpmc_config[3], &cs->config4); - writel(gpmc_config[4], &cs->config5); - writel(gpmc_config[5], &cs->config6); - - /* - * Enable the config. size is the CS size and goes in - * bits 11:8. We set bit 6 to enable this CS and the base - * address goes into bits 5:0. - */ - writel((size << 8) | (GPMC_CS_ENABLE << 6) | - ((base >> 24) & GPMC_BASEADDR_MASK), - &cs->config7); - - sdelay(2000); -} - -/* GPMC CS configuration for an SMSC LAN9221 ethernet controller */ -#define NET_LAN9221_GPMC_CONFIG1 0x2a001203 -#define NET_LAN9221_GPMC_CONFIG2 0x000a0a02 -#define NET_LAN9221_GPMC_CONFIG3 0x00020200 -#define NET_LAN9221_GPMC_CONFIG4 0x0a030a03 -#define NET_LAN9221_GPMC_CONFIG5 0x000a0a0a -#define NET_LAN9221_GPMC_CONFIG6 0x8a070707 -#define NET_LAN9221_GPMC_CONFIG7 0x00000f6c - -/* GPMC definitions for LAN9221 chips on expansion boards */ -static const u32 gpmc_lan_config[] = { - NET_LAN9221_GPMC_CONFIG1, - NET_LAN9221_GPMC_CONFIG2, - NET_LAN9221_GPMC_CONFIG3, - NET_LAN9221_GPMC_CONFIG4, - NET_LAN9221_GPMC_CONFIG5, - NET_LAN9221_GPMC_CONFIG6, - /*CONFIG7- computed as params */ -}; - -/* - * Routine: setup_net_chip - * Description: Setting up the configuration GPMC registers specific to the - * Ethernet hardware. - */ -static void setup_net_chip(void) -{ - enable_gpmc_net_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000, - GPMC_SIZE_16M); - - /* Make GPIO SMSC_NRESET as output pin and send reset pulse */ - if (!gpio_request(SMSC_NRESET, "")) { - gpio_direction_output(SMSC_NRESET, 0); - gpio_set_value(SMSC_NRESET, 1); - udelay(1); - gpio_set_value(SMSC_NRESET, 0); - udelay(1); - gpio_set_value(SMSC_NRESET, 1); - } -} -#endif - -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_SMC911X - rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); -#endif - return rc; -} - -#ifdef CONFIG_USB_EHCI_HCD - -static struct omap_usbhs_board_data usbhs_bdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, -}; - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - int ret; - unsigned int utmi_clk; - u32 auxclk, altclksrc; - - /* Now we can enable our port clocks */ - utmi_clk = readl((void *)CM_L3INIT_HSUSBHOST_CLKCTRL); - utmi_clk |= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK; - setbits_le32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, utmi_clk); - - auxclk = readl(&scrm->auxclk3); - /* Select sys_clk */ - auxclk &= ~AUXCLK_SRCSELECT_MASK; - auxclk |= AUXCLK_SRCSELECT_SYS_CLK << AUXCLK_SRCSELECT_SHIFT; - /* Set the divisor to 2 */ - auxclk &= ~AUXCLK_CLKDIV_MASK; - auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT; - /* Request auxilary clock #3 */ - auxclk |= AUXCLK_ENABLE_MASK; - writel(auxclk, &scrm->auxclk3); - - altclksrc = readl(&scrm->altclksrc); - - /* Activate alternate system clock supplier */ - altclksrc &= ~ALTCLKSRC_MODE_MASK; - altclksrc |= ALTCLKSRC_MODE_ACTIVE; - - /* enable clocks */ - altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK; - - writel(altclksrc, &scrm->altclksrc); - - ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); - if (ret < 0) - return ret; - - return 0; -} - -int ehci_hcd_stop(int index) -{ - return omap_ehci_hcd_stop(); -} -#endif - -/* - * get_board_rev() - get board revision - */ -u32 get_board_rev(void) -{ - return 0x20; -} diff --git a/board/gumstix/duovero/duovero_mux_data.h b/board/gumstix/duovero/duovero_mux_data.h deleted file mode 100644 index b56bffe165..0000000000 --- a/board/gumstix/duovero/duovero_mux_data.h +++ /dev/null @@ -1,198 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2012 - * Gumstix Incorporated, - * Maintainer: Ash Charles - */ -#ifndef _DUOVERO_MUX_DATA_H_ -#define _DUOVERO_MUX_DATA_H_ - -#include - -const struct pad_conf_entry core_padconf_array_essential[] = { - {SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ - {SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ - {SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ - {SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ - {SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ - {SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ - {I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */ - {I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */ - {I2C2_SCL, (PTU | IEN | M0)}, /* i2c2_scl */ - {I2C2_SDA, (PTU | IEN | M0)}, /* i2c2_sda */ - {I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */ - {I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */ - {I2C4_SCL, (PTU | IEN | M0)}, /* i2c4_scl */ - {I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */ - {UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ - {UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ - {UART3_RX_IRRX, (PTU | IEN | M0)}, /* uart3_rx */ - {UART3_TX_IRTX, (M0)} /* uart3_tx */ -}; - -const struct pad_conf_entry wkup_padconf_array_essential[] = { - {PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ - {PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ - {PAD1_SYS_32K, (IEN | M0)} /* sys_32k */ -}; - -const struct pad_conf_entry core_padconf_array_non_essential[] = { - {GPMC_AD0, (PTU | IEN | M0)}, /* gpmc_ad0 */ - {GPMC_AD1, (PTU | IEN | M0)}, /* gpmc_ad1 */ - {GPMC_AD2, (PTU | IEN | M0)}, /* gpmc_ad2 */ - {GPMC_AD3, (PTU | IEN | M0)}, /* gpmc_ad3 */ - {GPMC_AD4, (PTU | IEN | M0)}, /* gpmc_ad4 */ - {GPMC_AD5, (PTU | IEN | M0)}, /* gpmc_ad5 */ - {GPMC_AD6, (PTU | IEN | M0)}, /* gpmc_ad6 */ - {GPMC_AD7, (PTU | IEN | M0)}, /* gpmc_ad7 */ - {GPMC_AD8, (PTU | IEN | M0)}, /* gpmc_ad8 */ - {GPMC_AD9, (PTU | IEN | M0)}, /* gpmc_ad9 */ - {GPMC_AD10, (PTU | IEN | M0)}, /* gpmc_ad10 */ - {GPMC_AD11, (PTU | IEN | M0)}, /* gpmc_ad11 */ - {GPMC_AD12, (PTU | IEN | M0)}, /* gpmc_ad12 */ - {GPMC_AD13, (PTU | IEN | M0)}, /* gpmc_ad13 */ - {GPMC_AD14, (PTU | IEN | M0)}, /* gpmc_ad14 */ - {GPMC_AD15, (PTU | IEN | M0)}, /* gpmc_ad15 */ - {GPMC_A16, (PTU | IEN | M3)}, /* gpio_40 */ - {GPMC_A17, (PTU | IEN | M3)}, /* gpio_41 - hdmi_ls_oe */ - {GPMC_A18, (PTU | IEN | M3)}, /* gpio_42 */ - {GPMC_A19, (PTU | IEN | M3)}, /* gpio_43 - wifi_en */ - {GPMC_A20, (PTU | IEN | M3)}, /* gpio_44 - eth_irq */ - {GPMC_A21, (PTU | IEN | M3)}, /* gpio_45 - eth_nreset */ - {GPMC_A22, (PTU | IEN | M3)}, /* gpio_46 - eth_pme */ - {GPMC_A23, (PTU | IEN | M3)}, /* gpio_47 */ - {GPMC_A24, (PTU | IEN | M3)}, /* gpio_48 - eth_mdix */ - {GPMC_A25, (PTU | IEN | M3)}, /* gpio_49 - bt_wakeup */ - {GPMC_NCS0, (PTU | M0)}, /* gpmc_ncs0 */ - {GPMC_NCS1, (PTU | M0)}, /* gpmc_ncs1 */ - {GPMC_NCS2, (PTU | M0)}, /* gpmc_ncs2 */ - {GPMC_NCS3, (PTU | IEN | M3)}, /* gpio_53 */ - {C2C_DATA12, (PTU | M0)}, /* gpmc_ncs4 */ - {C2C_DATA13, (PTU | M0)}, /* gpmc_ncs5 - eth_cs */ - {GPMC_NWP, (PTU | IEN | M0)}, /* gpmc_nwp */ - {GPMC_CLK, (PTU | IEN | M0)}, /* gpmc_clk */ - {GPMC_NADV_ALE, (PTU | M0)}, /* gpmc_nadv_ale */ - {GPMC_NBE0_CLE, (PTU | M0)}, /* gpmc_nbe0_cle */ - {GPMC_NBE1, (PTU | M0)}, /* gpmc_nbe1 */ - {GPMC_WAIT0, (PTU | IEN | M0)}, /* gpmc_wait0 */ - {GPMC_WAIT1, (PTU | IEN | M0)}, /* gpio_62 - usbh_nreset */ - {GPMC_NOE, (PTU | M0)}, /* gpmc_noe */ - {GPMC_NWE, (PTU | M0)}, /* gpmc_nwe */ - {HDMI_HPD, (PTD | IEN | M3)}, /* gpio_63 - hdmi_hpd */ - {HDMI_CEC, (PTU | IEN | M0)}, /* hdmi_cec */ - {HDMI_DDC_SCL, (M0)}, /* hdmi_ddc_scl */ - {HDMI_DDC_SDA, (IEN | M0)}, /* hdmi_ddc_sda */ - {CSI21_DX0, (IEN | M0)}, /* csi21_dx0 */ - {CSI21_DY0, (IEN | M0)}, /* csi21_dy0 */ - {CSI21_DX1, (IEN | M0)}, /* csi21_dx1 */ - {CSI21_DY1, (IEN | M0)}, /* csi21_dy1 */ - {CSI21_DX2, (IEN | M0)}, /* csi21_dx2 */ - {CSI21_DY2, (IEN | M0)}, /* csi21_dy2 */ - {CSI21_DX3, (IEN | M0)}, /* csi21_dx3 */ - {CSI21_DY3, (IEN | M0)}, /* csi21_dy3 */ - {CSI21_DX4, (IEN | M0)}, /* csi21_dx4 */ - {CSI21_DY4, (IEN | M0)}, /* csi21_dy4 */ - {CSI22_DX0, (IEN | M0)}, /* csi22_dx0 */ - {CSI22_DY0, (IEN | M0)}, /* csi22_dy0 */ - {CSI22_DX1, (IEN | M0)}, /* csi22_dx1 */ - {CSI22_DY1, (IEN | M0)}, /* csi22_dy1 */ - {USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */ - {USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */ - {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */ - {USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_nxt */ - {USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat0 */ - {USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat1 */ - {USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat2 */ - {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat3 */ - {USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */ - {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ - {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ - {USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */ - {USBB1_HSIC_DATA, (PTU | IEN | M3)}, /* gpio_96 - usbh_cpen */ - {USBB1_HSIC_STROBE, (PTU | IEN | M3)}, /* gpio_97 - usbh_reset */ - {ABE_MCBSP2_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_clkx */ - {ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dr */ - {ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dx */ - {ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_fsx */ - {ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_ul_data */ - {ABE_PDM_DL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_dl_data */ - {ABE_PDM_FRAME, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_frame */ - {ABE_PDM_LB_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_lb_clk */ - {ABE_CLKS, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_clks */ - {ABE_DMIC_CLK1, (M0)}, /* abe_dmic_clk1 */ - {ABE_DMIC_DIN1, (IEN | M0)}, /* abe_dmic_din1 */ - {ABE_DMIC_DIN2, (IEN | M0)}, /* abe_dmic_din2 */ - {ABE_DMIC_DIN3, (IEN | M0)}, /* abe_dmic_din3 */ - {UART2_CTS, (PTU | IEN | M0)}, /* uart2_cts */ - {UART2_RTS, (M0)}, /* uart2_rts */ - {UART2_RX, (PTU | IEN | M0)}, /* uart2_rx */ - {UART2_TX, (M0)}, /* uart2_tx */ - {HDQ_SIO, (M0)}, /* hdq-sio */ - {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */ - {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */ - {MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_simo */ - {MCSPI1_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_cs0 */ - {MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_cs1 */ - {SDMMC5_CLK, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_clk */ - {SDMMC5_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_cmd */ - {SDMMC5_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat0 */ - {SDMMC5_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat1 */ - {SDMMC5_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat2 */ - {SDMMC5_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat3 */ - {MCSPI4_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_clk */ - {MCSPI4_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_simo */ - {MCSPI4_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_somi */ - {MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_cs0 */ - {UART4_RX, (IEN | PTU | M0)}, /* uart4_rx */ - {UART4_TX, (M0)}, /* uart4_tx */ - {USBB2_ULPITLL_CLK, (PTU | IEN | M3)}, /* gpio_157 - start_adc */ - {USBB2_ULPITLL_STP, (PTU | IEN | M3)}, /* gpio_158 - spi_nirq */ - {USBB2_ULPITLL_DIR, (PTU | IEN | M3)}, /* gpio_159 - bt_nreset */ - {USBB2_ULPITLL_NXT, (PTU | IEN | M3)}, /* gpio_160 - audio_pwron*/ - {USBB2_ULPITLL_DAT0, (PTU | IEN | M3)}, /* gpio_161 - bid_0 */ - {USBB2_ULPITLL_DAT1, (PTU | IEN | M3)}, /* gpio_162 - bid_1 */ - {USBB2_ULPITLL_DAT2, (PTU | IEN | M3)}, /* gpio_163 - bid_2 */ - {USBB2_ULPITLL_DAT3, (PTU | IEN | M3)}, /* gpio_164 - bid_3 */ - {USBB2_ULPITLL_DAT4, (PTU | IEN | M3)}, /* gpio_165 - bid_4 */ - {USBB2_ULPITLL_DAT5, (PTU | IEN | M3)}, /* gpio_166 - ts_irq*/ - {USBB2_ULPITLL_DAT6, (PTU | IEN | M3)}, /* gpio_167 - gps_pps */ - {USBB2_ULPITLL_DAT7, (PTU | IEN | M3)}, /* gpio_168 */ - {USBB2_HSIC_DATA, (PTU | IEN | M3)}, /* gpio_169 */ - {USBB2_HSIC_STROBE, (PTU | IEN | M3)}, /* gpio_170 */ - {UNIPRO_TX1, (PTU | IEN | M3)}, /* gpio_173 */ - {USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* usba0_otg_ce */ - {USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */ - {USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */ - {SYS_NIRQ1, (PTU | IEN | M0)}, /* sys_nirq1 */ - {SYS_NIRQ2, (PTU | IEN | M0)}, /* sys_nirq2 */ - {SYS_BOOT0, (M0)}, /* sys_boot0 */ - {SYS_BOOT1, (M0)}, /* sys_boot1 */ - {SYS_BOOT2, (M0)}, /* sys_boot2 */ - {SYS_BOOT3, (M0)}, /* sys_boot3 */ - {SYS_BOOT4, (M0)}, /* sys_boot4 */ - {SYS_BOOT5, (M0)}, /* sys_boot5 */ - {DPM_EMU0, (IEN | M0)}, /* dpm_emu0 */ - {DPM_EMU1, (IEN | M0)}, /* dpm_emu1 */ - {DPM_EMU16, (PTU | IEN | M3)}, /* gpio_27 */ - {DPM_EMU17, (PTU | IEN | M3)}, /* gpio_28 */ - {DPM_EMU18, (PTU | IEN | M3)}, /* gpio_29 */ - {DPM_EMU19, (PTU | IEN | M3)}, /* gpio_30 */ -}; - -const struct pad_conf_entry wkup_padconf_array_non_essential[] = { - {PAD1_FREF_XTAL_IN, (M0)}, /* fref_xtal_in */ - {PAD0_FREF_SLICER_IN, (M0)}, /* fref_slicer_in */ - {PAD1_FREF_CLK_IOREQ, (M0)}, /* fref_clk_ioreq */ - {PAD0_FREF_CLK0_OUT, (M7)}, /* safe mode */ - {PAD1_FREF_CLK3_REQ, M7}, /* safe mode */ - {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */ - {PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */ - {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */ - {PAD0_SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */ - {PAD1_SYS_PWRON_RESET, (M3)}, /* gpio_wk29 */ - {PAD0_SYS_BOOT6, (M0)}, /* sys_boot6 */ - {PAD1_SYS_BOOT7, (M0)}, /* sys_boot7 */ -}; - - -#endif /* _DUOVERO_MUX_DATA_H_ */ diff --git a/configs/duovero_defconfig b/configs/duovero_defconfig deleted file mode 100644 index ab06ada613..0000000000 --- a/configs/duovero_defconfig +++ /dev/null @@ -1,42 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_OMAP44XX=y -CONFIG_TARGET_DUOVERO=y -CONFIG_SPL=y -CONFIG_SPL_TEXT_BASE=0x40300000 -CONFIG_DISTRO_DEFAULTS=y -CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_VERSION_VARIABLE=y -# CONFIG_SPL_I2C_SUPPORT is not set -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SYS_PROMPT="duovero # " -CONFIG_CMD_ASKENV=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_NFS is not set -CONFIG_CMD_EXT4_WRITE=y -# CONFIG_SPL_EFI_PARTITION is not set -CONFIG_SPL_PARTITION_UUIDS=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_MMC_OMAP_HS=y -CONFIG_SMC911X=y -CONFIG_SMC911X_BASE=0x2C000000 -CONFIG_SMC911X_32_BIT=y -CONFIG_CONS_INDEX=3 -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_OMAP3_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_MUSB_UDC=y -CONFIG_USB_OMAP3=y -CONFIG_USB_GADGET=y -CONFIG_FAT_WRITE=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/duovero.h b/include/configs/duovero.h deleted file mode 100644 index dccb369991..0000000000 --- a/include/configs/duovero.h +++ /dev/null @@ -1,36 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright: 2013 - * Gumstix, Inc - http://www.gumstix.com - * Maintainer: Ash Charles - * - * Configuration settings for the Gumstix DuoVero board. - * See omap4_common.h for OMAP4 common part - */ - -#ifndef __CONFIG_DUOVERO_H -#define __CONFIG_DUOVERO_H - -/* - * High Level Configuration Options - */ -#define CONFIG_DUOVERO -#define CONFIG_MACH_TYPE MACH_TYPE_DUOVERO - -#include - -#undef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS - -/* USB UHH support options */ -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1 -#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62 - -#define CONFIG_SYS_ENABLE_PADS_ALL - -/* GPIO */ - -/* ENV related config options */ - -#endif /* __CONFIG_DUOVERO_H */ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 1e316227aa..5e5490fede 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -107,8 +107,6 @@ "setenv fdtfile omap4-panda-a4.dtb; fi;" \ "if test $board_name = panda-es; then " \ "setenv fdtfile omap4-panda-es.dtb; fi;" \ - "if test $board_name = duovero; then " \ - "setenv fdtfile omap4-duovero-parlor.dtb; fi;" \ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine device tree to use; fi; \0" \ BOOTENV From patchwork Tue May 26 17:47:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1264 Return-Path: X-Original-To: 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[209.85.220.65]) by mx.google.com with SMTPS id jx19sor251657pjb.28.2020.05.26.10.47.26 for (Google Transport Security); Tue, 26 May 2020 10:47:26 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90a:9e8:: with SMTP id 95mr388081pjo.189.1590515246509; Tue, 26 May 2020 10:47:26 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id o201sm175153pfd.115.2020.05.26.10.47.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:47:25 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki , Lokesh Vutla Subject: [PATCH 10/14] ti: Drop panda board Date: Tue, 26 May 2020 23:17:13 +0530 Message-Id: <20200526174717.262151-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=TTwN9rnJ; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , DM, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Cc: Lokesh Vutla Signed-off-by: Jagan Teki --- arch/arm/mach-omap2/omap4/Kconfig | 4 - board/ti/panda/Kconfig | 12 -- board/ti/panda/MAINTAINERS | 6 - board/ti/panda/Makefile | 6 - board/ti/panda/panda.c | 346 ------------------------------ board/ti/panda/panda_mux_data.h | 86 -------- configs/omap4_panda_defconfig | 42 ---- include/configs/omap4_panda.h | 34 --- 8 files changed, 536 deletions(-) delete mode 100644 board/ti/panda/Kconfig delete mode 100644 board/ti/panda/MAINTAINERS delete mode 100644 board/ti/panda/Makefile delete mode 100644 board/ti/panda/panda.c delete mode 100644 board/ti/panda/panda_mux_data.h delete mode 100644 configs/omap4_panda_defconfig delete mode 100644 include/configs/omap4_panda.h diff --git a/arch/arm/mach-omap2/omap4/Kconfig b/arch/arm/mach-omap2/omap4/Kconfig index 899289b645..4cc360f38a 100644 --- a/arch/arm/mach-omap2/omap4/Kconfig +++ b/arch/arm/mach-omap2/omap4/Kconfig @@ -4,9 +4,6 @@ choice prompt "OMAP4 board select" optional -config TARGET_OMAP4_PANDA - bool "TI OMAP4 PandaBoard" - config TARGET_OMAP4_SDP4430 bool "TI OMAP4 SDP4430" @@ -18,7 +15,6 @@ endchoice config SYS_SOC default "omap4" -source "board/ti/panda/Kconfig" source "board/ti/sdp4430/Kconfig" source "board/amazon/kc1/Kconfig" diff --git a/board/ti/panda/Kconfig b/board/ti/panda/Kconfig deleted file mode 100644 index 8f277b612a..0000000000 --- a/board/ti/panda/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_OMAP4_PANDA - -config SYS_BOARD - default "panda" - -config SYS_VENDOR - default "ti" - -config SYS_CONFIG_NAME - default "omap4_panda" - -endif diff --git a/board/ti/panda/MAINTAINERS b/board/ti/panda/MAINTAINERS deleted file mode 100644 index 2142368271..0000000000 --- a/board/ti/panda/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -PANDA BOARD -M: Lokesh Vutla -S: Maintained -F: board/ti/panda/ -F: include/configs/omap4_panda.h -F: configs/omap4_panda_defconfig diff --git a/board/ti/panda/Makefile b/board/ti/panda/Makefile deleted file mode 100644 index dd2ff33afa..0000000000 --- a/board/ti/panda/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y := panda.o diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c deleted file mode 100644 index 9ebecfdbf5..0000000000 --- a/board/ti/panda/panda.c +++ /dev/null @@ -1,346 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated, - * Steve Sakoman - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "panda_mux_data.h" - -#ifdef CONFIG_USB_EHCI_HCD -#include -#include -#include -#endif - -#define PANDA_ULPI_PHY_TYPE_GPIO 182 -#define PANDA_BOARD_ID_1_GPIO 101 -#define PANDA_ES_BOARD_ID_1_GPIO 48 -#define PANDA_BOARD_ID_2_GPIO 171 -#define PANDA_ES_BOARD_ID_3_GPIO 3 -#define PANDA_ES_BOARD_ID_4_GPIO 2 - -DECLARE_GLOBAL_DATA_PTR; - -const struct omap_sysinfo sysinfo = { - "Board: OMAP4 Panda\n" -}; - -struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000; - -/** - * @brief board_init - * - * @return 0 - */ -int board_init(void) -{ - gpmc_init(); - - gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA; - gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */ - - return 0; -} - -int board_eth_init(bd_t *bis) -{ - return 0; -} - -/* -* Routine: get_board_revision -* Description: Detect if we are running on a panda revision A1-A6, -* or an ES panda board. This can be done by reading -* the level of GPIOs and checking the processor revisions. -* This should result in: -* Panda 4430: -* GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5 -* GPIO171, GPIO101, GPIO182: 1 0 1 => A6 -* Panda ES: -* GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2 -* GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3 -*/ -int get_board_revision(void) -{ - int board_id0, board_id1, board_id2; - int board_id3, board_id4; - int board_id; - - int processor_rev = omap_revision(); - - /* Setup the mux for the common board ID pins (gpio 171 and 182) */ - writew((IEN | M3), (*ctrl)->control_padconf_core_base + UNIPRO_TX0); - writew((IEN | M3), (*ctrl)->control_padconf_core_base + FREF_CLK2_OUT); - - board_id0 = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO); - board_id2 = gpio_get_value(PANDA_BOARD_ID_2_GPIO); - - if ((processor_rev >= OMAP4460_ES1_0 && - processor_rev <= OMAP4460_ES1_1)) { - /* - * Setup the mux for the ES specific board ID pins (gpio 101, - * 2 and 3. - */ - writew((IEN | M3), (*ctrl)->control_padconf_core_base + - GPMC_A24); - writew((IEN | M3), (*ctrl)->control_padconf_core_base + - UNIPRO_RY0); - writew((IEN | M3), (*ctrl)->control_padconf_core_base + - UNIPRO_RX1); - - board_id1 = gpio_get_value(PANDA_ES_BOARD_ID_1_GPIO); - board_id3 = gpio_get_value(PANDA_ES_BOARD_ID_3_GPIO); - board_id4 = gpio_get_value(PANDA_ES_BOARD_ID_4_GPIO); - -#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - env_set("board_name", "panda-es"); -#endif - board_id = ((board_id4 << 4) | (board_id3 << 3) | - (board_id2 << 2) | (board_id1 << 1) | (board_id0)); - } else { - /* Setup the mux for the Ax specific board ID pins (gpio 101) */ - writew((IEN | M3), (*ctrl)->control_padconf_core_base + - FREF_CLK2_OUT); - - board_id1 = gpio_get_value(PANDA_BOARD_ID_1_GPIO); - board_id = ((board_id2 << 2) | (board_id1 << 1) | (board_id0)); - -#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - if ((board_id >= 0x3) && (processor_rev == OMAP4430_ES2_3)) - env_set("board_name", "panda-a4"); -#endif - } - - return board_id; -} - -/** - * is_panda_es_rev_b3() - Detect if we are running on rev B3 of panda board ES - * - * - * Detect if we are running on B3 version of ES panda board, - * This can be done by reading the level of GPIO 171 and checking the - * processor revisions. - * GPIO171: 1 => Panda ES Rev B3 - * - * Return : return 1 if Panda ES Rev B3 , else return 0 - */ -u8 is_panda_es_rev_b3(void) -{ - int processor_rev = omap_revision(); - int ret = 0; - - if ((processor_rev >= OMAP4460_ES1_0 && - processor_rev <= OMAP4460_ES1_1)) { - - /* Setup the mux for the common board ID pins (gpio 171) */ - writew((IEN | M3), - (*ctrl)->control_padconf_core_base + UNIPRO_TX0); - - /* if processor_rev is panda ES and GPIO171 is 1,it is rev b3 */ - ret = gpio_get_value(PANDA_BOARD_ID_2_GPIO); - } - return ret; -} - -#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -/* - * emif_get_reg_dump() - emif_get_reg_dump strong function - * - * @emif_nr - emif base - * @regs - reg dump of timing values - * - * Strong function to override emif_get_reg_dump weak function in sdram_elpida.c - */ -void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) -{ - u32 omap4_rev = omap_revision(); - - /* Same devices and geometry on both EMIFs */ - if (omap4_rev == OMAP4430_ES1_0) - *regs = &emif_regs_elpida_380_mhz_1cs; - else if (omap4_rev == OMAP4430_ES2_0) - *regs = &emif_regs_elpida_200_mhz_2cs; - else if (omap4_rev == OMAP4430_ES2_3) - *regs = &emif_regs_elpida_400_mhz_1cs; - else if (omap4_rev < OMAP4470_ES1_0) { - if(is_panda_es_rev_b3()) - *regs = &emif_regs_elpida_400_mhz_1cs; - else - *regs = &emif_regs_elpida_400_mhz_2cs; - } - else - *regs = &emif_regs_elpida_400_mhz_1cs; -} - -void emif_get_dmm_regs(const struct dmm_lisa_map_regs - **dmm_lisa_regs) -{ - u32 omap_rev = omap_revision(); - - if (omap_rev == OMAP4430_ES1_0) - *dmm_lisa_regs = &lisa_map_2G_x_1_x_2; - else if (omap_rev == OMAP4430_ES2_3) - *dmm_lisa_regs = &lisa_map_2G_x_2_x_2; - else if (omap_rev < OMAP4460_ES1_0) - *dmm_lisa_regs = &lisa_map_2G_x_2_x_2; - else - *dmm_lisa_regs = &ma_lisa_map_2G_x_2_x_2; -} - -#endif - -/** - * @brief misc_init_r - Configure Panda board specific configurations - * such as power configurations, ethernet initialization as phase2 of - * boot sequence - * - * @return 0 - */ -int misc_init_r(void) -{ - int phy_type; - u32 auxclk, altclksrc; - - /* EHCI is not supported on ES1.0 */ - if (omap_revision() == OMAP4430_ES1_0) - return 0; - - get_board_revision(); - - gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO); - phy_type = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO); - - if (phy_type == 1) { - /* ULPI PHY supplied by auxclk3 derived from sys_clk */ - debug("ULPI PHY supplied by auxclk3\n"); - - auxclk = readl(&scrm->auxclk3); - /* Select sys_clk */ - auxclk &= ~AUXCLK_SRCSELECT_MASK; - auxclk |= AUXCLK_SRCSELECT_SYS_CLK << AUXCLK_SRCSELECT_SHIFT; - /* Set the divisor to 2 */ - auxclk &= ~AUXCLK_CLKDIV_MASK; - auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT; - /* Request auxilary clock #3 */ - auxclk |= AUXCLK_ENABLE_MASK; - - writel(auxclk, &scrm->auxclk3); - } else { - /* ULPI PHY supplied by auxclk1 derived from PER dpll */ - debug("ULPI PHY supplied by auxclk1\n"); - - auxclk = readl(&scrm->auxclk1); - /* Select per DPLL */ - auxclk &= ~AUXCLK_SRCSELECT_MASK; - auxclk |= AUXCLK_SRCSELECT_PER_DPLL << AUXCLK_SRCSELECT_SHIFT; - /* Set the divisor to 16 */ - auxclk &= ~AUXCLK_CLKDIV_MASK; - auxclk |= AUXCLK_CLKDIV_16 << AUXCLK_CLKDIV_SHIFT; - /* Request auxilary clock #3 */ - auxclk |= AUXCLK_ENABLE_MASK; - - writel(auxclk, &scrm->auxclk1); - } - - altclksrc = readl(&scrm->altclksrc); - - /* Activate alternate system clock supplier */ - altclksrc &= ~ALTCLKSRC_MODE_MASK; - altclksrc |= ALTCLKSRC_MODE_ACTIVE; - - /* enable clocks */ - altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK; - - writel(altclksrc, &scrm->altclksrc); - - omap_die_id_usbethaddr(); - - return 0; -} - -void set_muxconf_regs(void) -{ - do_set_mux((*ctrl)->control_padconf_core_base, - core_padconf_array_essential, - sizeof(core_padconf_array_essential) / - sizeof(struct pad_conf_entry)); - - do_set_mux((*ctrl)->control_padconf_wkup_base, - wkup_padconf_array_essential, - sizeof(wkup_padconf_array_essential) / - sizeof(struct pad_conf_entry)); - - if (omap_revision() >= OMAP4460_ES1_0) - do_set_mux((*ctrl)->control_padconf_wkup_base, - wkup_padconf_array_essential_4460, - sizeof(wkup_padconf_array_essential_4460) / - sizeof(struct pad_conf_entry)); -} - -#if defined(CONFIG_MMC) -int board_mmc_init(bd_t *bis) -{ - return omap_mmc_init(0, 0, 0, -1, -1); -} - -#if !defined(CONFIG_SPL_BUILD) -void board_mmc_power_init(void) -{ - twl6030_power_mmc_init(0); -} -#endif -#endif - -#ifdef CONFIG_USB_EHCI_HCD - -static struct omap_usbhs_board_data usbhs_bdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, -}; - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - int ret; - unsigned int utmi_clk; - - /* Now we can enable our port clocks */ - utmi_clk = readl((void *)CM_L3INIT_HSUSBHOST_CLKCTRL); - utmi_clk |= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK; - setbits_le32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, utmi_clk); - - ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); - if (ret < 0) - return ret; - - return 0; -} - -int ehci_hcd_stop(int index) -{ - return omap_ehci_hcd_stop(); -} -#endif - -/* - * get_board_rev() - get board revision - */ -u32 get_board_rev(void) -{ - return 0x20; -} diff --git a/board/ti/panda/panda_mux_data.h b/board/ti/panda/panda_mux_data.h deleted file mode 100644 index ad9e36525b..0000000000 --- a/board/ti/panda/panda_mux_data.h +++ /dev/null @@ -1,86 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated, - * - * Balaji Krishnamoorthy - * Aneesh V - */ -#ifndef _PANDA_MUX_DATA_H_ -#define _PANDA_MUX_DATA_H_ - -#include - - -const struct pad_conf_entry core_padconf_array_essential[] = { - -{GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */ -{GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */ -{GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */ -{GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */ -{GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */ -{GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */ -{GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */ -{GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */ -{GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */ -{GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */ -{SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ -{SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ -{SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ -{SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ -{SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ -{SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ -{SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */ -{SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */ -{SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */ -{SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */ -{I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */ -{I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */ -{I2C2_SCL, (PTU | IEN | M0)}, /* i2c2_scl */ -{I2C2_SDA, (PTU | IEN | M0)}, /* i2c2_sda */ -{I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */ -{I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */ -{I2C4_SCL, (PTU | IEN | M0)}, /* i2c4_scl */ -{I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */ -{UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ -{UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ -{UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ -{UART3_TX_IRTX, (M0)}, /* uart3_tx */ -{USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */ -{USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */ -{USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */ -{USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_nxt */ -{USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat0 */ -{USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat1 */ -{USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat2 */ -{USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat3 */ -{USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */ -{USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ -{USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ -{USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */ -{USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */ -{USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */ -{USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */ -{USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */ -{UNIPRO_TY2, (PTU | IEN | M3)}, /* gpio_1 */ -{GPMC_WAIT1, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_62 */ -{FREF_CLK2_OUT, (PTU | IEN | M3)}, /* gpio_182 */ - -}; - -const struct pad_conf_entry wkup_padconf_array_essential[] = { - -{PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ -{PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ -{PAD1_SYS_32K, (IEN | M0)}, /* sys_32k */ -{PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */ - -}; - -const struct pad_conf_entry wkup_padconf_array_essential_4460[] = { - -{PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 for TPS: Mode 3 */ - -}; - -#endif /* _PANDA_MUX_DATA_H_ */ diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig deleted file mode 100644 index 3ac6319d2d..0000000000 --- a/configs/omap4_panda_defconfig +++ /dev/null @@ -1,42 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_OMAP44XX=y -CONFIG_TARGET_OMAP4_PANDA=y -CONFIG_SPL=y -CONFIG_SPL_TEXT_BASE=0x40300000 -CONFIG_DISTRO_DEFAULTS=y -CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_VERSION_VARIABLE=y -# CONFIG_SPL_FS_EXT4 is not set -# CONFIG_SPL_I2C_SUPPORT is not set -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_OS_BOOT=y -CONFIG_CMD_SPL=y -CONFIG_CMD_ASKENV=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_NFS is not set -CONFIG_CMD_EXT4_WRITE=y -CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_MMC_OMAP_HS=y -CONFIG_CONS_INDEX=3 -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_OMAP3_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_MUSB_UDC=y -CONFIG_USB_OMAP3=y -CONFIG_USB_GADGET=y -CONFIG_USB_HOST_ETHER=y -CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h deleted file mode 100644 index 835b7c299e..0000000000 --- a/include/configs/omap4_panda.h +++ /dev/null @@ -1,34 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated. - * Steve Sakoman - * - * Configuration settings for the TI OMAP4 Panda board. - * See ti_omap4_common.h for OMAP4 common part - */ - -#ifndef __CONFIG_PANDA_H -#define __CONFIG_PANDA_H - -/* - * High Level Configuration Options - */ - -/* USB UHH support options */ -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1 -#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62 - -/* USB Networking options */ - -#define CONFIG_UBOOT_ENABLE_PADS_ALL - -#include - -/* GPIO */ - -/* ENV related config options */ - -#define CONFIG_ENV_OVERWRITE - -#endif /* __CONFIG_PANDA_H */ From patchwork Tue May 26 17:47:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1265 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f197.google.com (mail-pf1-f197.google.com [209.85.210.197]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 705BE3F1DD for ; Tue, 26 May 2020 19:47:31 +0200 (CEST) Received: by mail-pf1-f197.google.com with SMTP id r3sf17350416pfg.12 for ; Tue, 26 May 2020 10:47:31 -0700 (PDT) ARC-Seal: i=2; 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[209.85.220.65]) by mx.google.com with SMTPS id f22sor254233pjq.27.2020.05.26.10.47.29 for (Google Transport Security); Tue, 26 May 2020 10:47:29 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90b:68a:: with SMTP id m10mr377151pjz.5.1590515249283; Tue, 26 May 2020 10:47:29 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id o201sm175153pfd.115.2020.05.26.10.47.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:47:28 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 11/14] ti: Drop sdp4430 board Date: Tue, 26 May 2020 23:17:14 +0530 Message-Id: <20200526174717.262151-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174717.262151-1-jagan@amarulasolutions.com> References: <20200526174717.262151-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=gAqT0Jjc; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , DM, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Signed-off-by: Jagan Teki --- arch/arm/mach-omap2/omap4/Kconfig | 4 -- board/ti/sdp4430/Kconfig | 15 ----- board/ti/sdp4430/MAINTAINERS | 6 -- board/ti/sdp4430/Makefile | 10 --- board/ti/sdp4430/cmd_bat.c | 41 ------------ board/ti/sdp4430/sdp.c | 100 ---------------------------- board/ti/sdp4430/sdp4430_mux_data.h | 67 ------------------- configs/omap4_sdp4430_defconfig | 42 ------------ include/configs/omap4_sdp4430.h | 25 ------- 9 files changed, 310 deletions(-) delete mode 100644 board/ti/sdp4430/Kconfig delete mode 100644 board/ti/sdp4430/MAINTAINERS delete mode 100644 board/ti/sdp4430/Makefile delete mode 100644 board/ti/sdp4430/cmd_bat.c delete mode 100644 board/ti/sdp4430/sdp.c delete mode 100644 board/ti/sdp4430/sdp4430_mux_data.h delete mode 100644 configs/omap4_sdp4430_defconfig delete mode 100644 include/configs/omap4_sdp4430.h diff --git a/arch/arm/mach-omap2/omap4/Kconfig b/arch/arm/mach-omap2/omap4/Kconfig index 4cc360f38a..f1c60f3562 100644 --- a/arch/arm/mach-omap2/omap4/Kconfig +++ b/arch/arm/mach-omap2/omap4/Kconfig @@ -4,9 +4,6 @@ choice prompt "OMAP4 board select" optional -config TARGET_OMAP4_SDP4430 - bool "TI OMAP4 SDP4430" - config TARGET_KC1 bool "Amazon Kindle Fire (first generation)" @@ -15,7 +12,6 @@ endchoice config SYS_SOC default "omap4" -source "board/ti/sdp4430/Kconfig" source "board/amazon/kc1/Kconfig" endif diff --git a/board/ti/sdp4430/Kconfig b/board/ti/sdp4430/Kconfig deleted file mode 100644 index 36f1852821..0000000000 --- a/board/ti/sdp4430/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_OMAP4_SDP4430 - -config SYS_BOARD - default "sdp4430" - -config SYS_VENDOR - default "ti" - -config SYS_CONFIG_NAME - default "omap4_sdp4430" - -config CMD_BAT - bool "Enable board-specific battery command" - -endif diff --git a/board/ti/sdp4430/MAINTAINERS b/board/ti/sdp4430/MAINTAINERS deleted file mode 100644 index ac4d0ccc19..0000000000 --- a/board/ti/sdp4430/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -SDP4430 BOARD -M: Lokesh Vutla -S: Maintained -F: board/ti/sdp4430/ -F: include/configs/omap4_sdp4430.h -F: configs/omap4_sdp4430_defconfig diff --git a/board/ti/sdp4430/Makefile b/board/ti/sdp4430/Makefile deleted file mode 100644 index ae06945612..0000000000 --- a/board/ti/sdp4430/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y := sdp.o - -ifndef CONFIG_SPL_BUILD -obj-y += cmd_bat.o -endif diff --git a/board/ti/sdp4430/cmd_bat.c b/board/ti/sdp4430/cmd_bat.c deleted file mode 100644 index 6c1e6ca393..0000000000 --- a/board/ti/sdp4430/cmd_bat.c +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2010 Texas Instruments - */ - -#include -#include - -#ifdef CONFIG_CMD_BAT -#include - -int do_vbat(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - if (argc == 2) { - if (strncmp(argv[1], "startcharge", 12) == 0) - twl6030_start_usb_charging(); - else if (strncmp(argv[1], "stopcharge", 11) == 0) - twl6030_stop_usb_charging(); - else if (strncmp(argv[1], "status", 7) == 0) { - twl6030_get_battery_voltage(); - twl6030_get_battery_current(); - } else { - goto bat_cmd_usage; - } - } else { - goto bat_cmd_usage; - } - return 0; - -bat_cmd_usage: - return cmd_usage(cmdtp); -} - -U_BOOT_CMD( - bat, 2, 1, do_vbat, - "battery charging, voltage/current measurements", - "status - display battery voltage and current\n" - "bat startcharge - start charging via USB\n" - "bat stopcharge - stop charging\n" -); -#endif /* CONFIG_CMD_BAT */ diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c deleted file mode 100644 index a5b3504045..0000000000 --- a/board/ti/sdp4430/sdp.c +++ /dev/null @@ -1,100 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated, - * Aneesh V - * Steve Sakoman - */ -#include -#include -#include -#include -#include -#include - -#include "sdp4430_mux_data.h" - -DECLARE_GLOBAL_DATA_PTR; - -const struct omap_sysinfo sysinfo = { - "Board: OMAP4430 SDP\n" -}; - -/** - * @brief board_init - * - * @return 0 - */ -int board_init(void) -{ - gpmc_init(); - - gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */ - - return 0; -} - -int board_eth_init(bd_t *bis) -{ - return 0; -} - -/** - * @brief misc_init_r - Configure SDP board specific configurations - * such as power configurations, ethernet initialization as phase2 of - * boot sequence - * - * @return 0 - */ -int misc_init_r(void) -{ -#ifdef CONFIG_TWL6030_POWER - twl6030_init_battery_charging(); -#endif - return 0; -} - -void set_muxconf_regs(void) -{ - do_set_mux((*ctrl)->control_padconf_core_base, - core_padconf_array_essential, - sizeof(core_padconf_array_essential) / - sizeof(struct pad_conf_entry)); - - do_set_mux((*ctrl)->control_padconf_wkup_base, - wkup_padconf_array_essential, - sizeof(wkup_padconf_array_essential) / - sizeof(struct pad_conf_entry)); - - if ((omap_revision() >= OMAP4460_ES1_0) && - (omap_revision() < OMAP4470_ES1_0)) - do_set_mux((*ctrl)->control_padconf_wkup_base, - wkup_padconf_array_essential_4460, - sizeof(wkup_padconf_array_essential_4460) / - sizeof(struct pad_conf_entry)); -} - -#if defined(CONFIG_MMC) -int board_mmc_init(bd_t *bis) -{ - omap_mmc_init(0, 0, 0, -1, -1); - omap_mmc_init(1, 0, 0, -1, -1); - return 0; -} - -#if !defined(CONFIG_SPL_BUILD) -void board_mmc_power_init(void) -{ - twl6030_power_mmc_init(0); - twl6030_power_mmc_init(1); -} -#endif -#endif - -/* - * get_board_rev() - get board revision - */ -u32 get_board_rev(void) -{ - return 0x20; -} diff --git a/board/ti/sdp4430/sdp4430_mux_data.h b/board/ti/sdp4430/sdp4430_mux_data.h deleted file mode 100644 index 934419f40e..0000000000 --- a/board/ti/sdp4430/sdp4430_mux_data.h +++ /dev/null @@ -1,67 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated, - * - * Balaji Krishnamoorthy - * Aneesh V - */ -#ifndef _SDP4430_MUX_DATA_H -#define _SDP4430_MUX_DATA_H - -#include - -const struct pad_conf_entry core_padconf_array_essential[] = { - -{GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */ -{GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */ -{GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */ -{GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */ -{GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */ -{GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */ -{GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */ -{GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */ -{GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */ -{GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */ -{SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ -{SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ -{SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ -{SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ -{SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ -{SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ -{SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */ -{SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */ -{SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */ -{SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */ -{UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ -{UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ -{UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ -{UART3_TX_IRTX, (M0)}, /* uart3_tx */ -{USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */ -{USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ -{USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ -{USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */ -{USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */ -{USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */ -{USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */ -{USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */ -{USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* usba0_otg_ce */ -{USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */ -{USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */ -}; - -const struct pad_conf_entry wkup_padconf_array_essential[] = { - -{PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ -{PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ -{PAD1_SYS_32K, (IEN | M0)} /* sys_32k */ - -}; - -const struct pad_conf_entry wkup_padconf_array_essential_4460[] = { - -{PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 for TPS: Mode 3 */ - -}; - -#endif /* _SDP4430_MUX_DATA_H */ diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig deleted file mode 100644 index 219721388f..0000000000 --- a/configs/omap4_sdp4430_defconfig +++ /dev/null @@ -1,42 +0,0 @@ -CONFIG_ARM=y -# CONFIG_SPL_USE_ARCH_MEMCPY is not set -# CONFIG_SPL_USE_ARCH_MEMSET is not set -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_ENV_OFFSET=0xE0000 -CONFIG_OMAP44XX=y -CONFIG_TARGET_OMAP4_SDP4430=y -CONFIG_CMD_BAT=y -CONFIG_SPL=y -CONFIG_SPL_TEXT_BASE=0x40300000 -CONFIG_DISTRO_DEFAULTS=y -CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_VERSION_VARIABLE=y -# CONFIG_SPL_I2C_SUPPORT is not set -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_CMD_ASKENV=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_SPI=y -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_NFS is not set -CONFIG_CMD_EXT4_WRITE=y -# CONFIG_EFI_PARTITION is not set -CONFIG_SPL_PARTITION_UUIDS=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_MMC_OMAP_HS=y -CONFIG_CONS_INDEX=3 -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_OMAP3_SPI=y -CONFIG_USB=y -CONFIG_USB_MUSB_UDC=y -CONFIG_USB_OMAP3=y -CONFIG_USB_GADGET=y -CONFIG_FAT_WRITE=y -# CONFIG_REGEX is not set -CONFIG_OF_LIBFDT=y -# CONFIG_EFI_LOADER is not set diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h deleted file mode 100644 index 884f45df22..0000000000 --- a/include/configs/omap4_sdp4430.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated. - * Aneesh V - * Steve Sakoman - * - * Configuration settings for the TI SDP4430 board. - * See ti_omap4_common.h for OMAP4 common part - */ - -#ifndef __CONFIG_SDP4430_H -#define __CONFIG_SDP4430_H - -/* - * High Level Configuration Options - */ -#define CONFIG_MACH_TYPE MACH_TYPE_OMAP_4430SDP - -#include - -/* ENV related config options */ -#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ - -#endif /* __CONFIG_SDP4430_H */ From patchwork Tue May 26 17:47:15 2020 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id n5sor930864plp.10.2020.05.26.10.47.32 for (Google Transport Security); Tue, 26 May 2020 10:47:32 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:902:d70c:: with SMTP id w12mr719074ply.32.1590515252276; Tue, 26 May 2020 10:47:32 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id o201sm175153pfd.115.2020.05.26.10.47.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:47:31 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki , Lokesh Vutla Subject: [PATCH 12/14] ti: Drop omap5 uevm Date: Tue, 26 May 2020 23:17:15 +0530 Message-Id: <20200526174717.262151-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174717.262151-1-jagan@amarulasolutions.com> References: <20200526174717.262151-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=K5cTRudZ; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , DM, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Cc: Lokesh Vutla Signed-off-by: Jagan Teki --- arch/arm/mach-omap2/omap5/Kconfig | 4 - board/ti/omap5_uevm/Kconfig | 12 -- board/ti/omap5_uevm/MAINTAINERS | 6 - board/ti/omap5_uevm/Makefile | 6 - board/ti/omap5_uevm/README | 25 --- board/ti/omap5_uevm/evm.c | 283 ------------------------------ board/ti/omap5_uevm/mux_data.h | 57 ------ configs/omap5_uevm_defconfig | 55 ------ include/configs/omap5_uevm.h | 62 ------- 9 files changed, 510 deletions(-) delete mode 100644 board/ti/omap5_uevm/Kconfig delete mode 100644 board/ti/omap5_uevm/MAINTAINERS delete mode 100644 board/ti/omap5_uevm/Makefile delete mode 100644 board/ti/omap5_uevm/README delete mode 100644 board/ti/omap5_uevm/evm.c delete mode 100644 board/ti/omap5_uevm/mux_data.h delete mode 100644 configs/omap5_uevm_defconfig delete mode 100644 include/configs/omap5_uevm.h diff --git a/arch/arm/mach-omap2/omap5/Kconfig b/arch/arm/mach-omap2/omap5/Kconfig index a0c0b93a00..e73106e321 100644 --- a/arch/arm/mach-omap2/omap5/Kconfig +++ b/arch/arm/mach-omap2/omap5/Kconfig @@ -9,9 +9,6 @@ choice prompt "OMAP5 board select" optional -config TARGET_OMAP5_UEVM - bool "TI OMAP5 uEVM board" - config TARGET_DRA7XX_EVM bool "TI DRA7XX" select BOARD_LATE_INIT @@ -153,7 +150,6 @@ endchoice endmenu endif -source "board/ti/omap5_uevm/Kconfig" source "board/ti/dra7xx/Kconfig" source "board/ti/am57xx/Kconfig" diff --git a/board/ti/omap5_uevm/Kconfig b/board/ti/omap5_uevm/Kconfig deleted file mode 100644 index aa13844544..0000000000 --- a/board/ti/omap5_uevm/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_OMAP5_UEVM - -config SYS_BOARD - default "omap5_uevm" - -config SYS_VENDOR - default "ti" - -config SYS_CONFIG_NAME - default "omap5_uevm" - -endif diff --git a/board/ti/omap5_uevm/MAINTAINERS b/board/ti/omap5_uevm/MAINTAINERS deleted file mode 100644 index 280ea2f91f..0000000000 --- a/board/ti/omap5_uevm/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -OMAP5_UEVM BOARD -M: Lokesh Vutla -S: Maintained -F: board/ti/omap5_uevm/ -F: include/configs/omap5_uevm.h -F: configs/omap5_uevm_defconfig diff --git a/board/ti/omap5_uevm/Makefile b/board/ti/omap5_uevm/Makefile deleted file mode 100644 index 17ee516d26..0000000000 --- a/board/ti/omap5_uevm/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y := evm.o diff --git a/board/ti/omap5_uevm/README b/board/ti/omap5_uevm/README deleted file mode 100644 index 970e2eceb7..0000000000 --- a/board/ti/omap5_uevm/README +++ /dev/null @@ -1,25 +0,0 @@ -Summary -======= - -This document covers various features of the 'omap5_uevm' build and some -related uses. - -eMMC boot partition use -======================= - -It is possible, depending on SYSBOOT configuration to boot from the eMMC -boot partitions using (name depending on documentation referenced) -Alternative Boot operation mode or Boot Sequence Option 1/2. In this -example we load MLO and u-boot.img from the build into DDR and then use -'mmc bootbus' to set the required rate (see TRM) and 'mmc partconfig' to -set boot0 as the boot device. -U-Boot # setenv autoload no -U-Boot # usb start -U-Boot # dhcp -U-Boot # mmc dev 1 1 -U-Boot # tftp ${loadaddr} omap5uevm/MLO -U-Boot # mmc write ${loadaddr} 0 100 -U-Boot # tftp ${loadaddr} omap5uevm/u-boot.img -U-Boot # mmc write ${loadaddr} 300 400 -U-Boot # mmc bootbus 1 2 0 2 -U-Boot # mmc partconf 1 1 1 0 diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c deleted file mode 100644 index e35f319b46..0000000000 --- a/board/ti/omap5_uevm/evm.c +++ /dev/null @@ -1,283 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated, - * Aneesh V - * Steve Sakoman - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "mux_data.h" - -#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP) -#include -#include -#include -#include -#include -#include -#include -#include - -#define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000) -#define DIE_ID_REG_OFFSET 0x200 - -#endif - -DECLARE_GLOBAL_DATA_PTR; - -const struct omap_sysinfo sysinfo = { - "Board: OMAP5432 uEVM\n" -}; - -/** - * @brief tca642x_init - uEVM default values for the GPIO expander - * input reg, output reg, polarity reg, configuration reg - */ -struct tca642x_bank_info tca642x_init[] = { - { .input_reg = 0x00, - .output_reg = 0x04, - .polarity_reg = 0x00, - .configuration_reg = 0x80 }, - { .input_reg = 0x00, - .output_reg = 0x00, - .polarity_reg = 0x00, - .configuration_reg = 0xff }, - { .input_reg = 0x00, - .output_reg = 0x00, - .polarity_reg = 0x00, - .configuration_reg = 0x40 }, -}; - -#ifdef CONFIG_USB_DWC3 -static struct dwc3_device usb_otg_ss = { - .maximum_speed = USB_SPEED_SUPER, - .base = OMAP5XX_USB_OTG_SS_BASE, - .tx_fifo_resize = false, - .index = 0, -}; - -static struct dwc3_omap_device usb_otg_ss_glue = { - .base = (void *)OMAP5XX_USB_OTG_SS_GLUE_BASE, - .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, - .index = 0, -}; - -static struct ti_usb_phy_device usb_phy_device = { - .pll_ctrl_base = (void *)OMAP5XX_USB3_PHY_PLL_CTRL, - .usb2_phy_power = (void *)OMAP5XX_USB2_PHY_POWER, - .usb3_phy_power = (void *)OMAP5XX_USB3_PHY_POWER, - .index = 0, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - if (index) { - printf("Invalid Controller Index\n"); - return -EINVAL; - } - - if (init == USB_INIT_DEVICE) { - usb_otg_ss.dr_mode = USB_DR_MODE_PERIPHERAL; - usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID; - } else { - usb_otg_ss.dr_mode = USB_DR_MODE_HOST; - usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_ID_GROUND; - } - - enable_usb_clocks(index); - ti_usb_phy_uboot_init(&usb_phy_device); - dwc3_omap_uboot_init(&usb_otg_ss_glue); - dwc3_uboot_init(&usb_otg_ss); - - return 0; -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - if (index) { - printf("Invalid Controller Index\n"); - return -EINVAL; - } - - ti_usb_phy_uboot_exit(index); - dwc3_uboot_exit(index); - dwc3_omap_uboot_exit(index); - disable_usb_clocks(index); - - return 0; -} - -int usb_gadget_handle_interrupts(int index) -{ - u32 status; - - status = dwc3_omap_uboot_interrupt_status(index); - if (status) - dwc3_uboot_handle_interrupt(index); - - return 0; -} -#endif - -/** - * @brief board_init - * - * @return 0 - */ -int board_init(void) -{ - gpmc_init(); - gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM; - gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */ - - tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init); - - return 0; -} - -int board_eth_init(bd_t *bis) -{ - return 0; -} - -#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP) -static void enable_host_clocks(void) -{ - int auxclk; - int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK | - OPTFCLKEN_HSIC480M_P3_CLK | - OPTFCLKEN_HSIC60M_P2_CLK | - OPTFCLKEN_HSIC480M_P2_CLK | - OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK); - - /* Enable port 2 and 3 clocks*/ - setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val); - - /* Enable port 2 and 3 usb host ports tll clocks*/ - setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, - (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE)); -#ifdef CONFIG_USB_XHCI_OMAP - /* Enable the USB OTG Super speed clocks */ - setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl, - (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW)); -#endif - - auxclk = readl((*prcm)->scrm_auxclk1); - /* Request auxilary clock */ - auxclk |= AUXCLK_ENABLE_MASK; - writel(auxclk, (*prcm)->scrm_auxclk1); -} -#endif - -/** - * @brief misc_init_r - Configure EVM board specific configurations - * such as power configurations, ethernet initialization as phase2 of - * boot sequence - * - * @return 0 - */ -int misc_init_r(void) -{ -#ifdef CONFIG_PALMAS_POWER - palmas_init_settings(); -#endif - - omap_die_id_usbethaddr(); - - return 0; -} - -void set_muxconf_regs(void) -{ - do_set_mux((*ctrl)->control_padconf_core_base, - core_padconf_array_essential, - sizeof(core_padconf_array_essential) / - sizeof(struct pad_conf_entry)); - - do_set_mux((*ctrl)->control_padconf_wkup_base, - wkup_padconf_array_essential, - sizeof(wkup_padconf_array_essential) / - sizeof(struct pad_conf_entry)); -} - -#if defined(CONFIG_MMC) -int board_mmc_init(bd_t *bis) -{ - omap_mmc_init(0, 0, 0, -1, -1); - omap_mmc_init(1, 0, 0, -1, -1); - return 0; -} -#endif - -#ifdef CONFIG_USB_EHCI_HCD -static struct omap_usbhs_board_data usbhs_bdata = { - .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, - .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC, - .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC, -}; - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - int ret; - - enable_host_clocks(); - - ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); - if (ret < 0) { - puts("Failed to initialize ehci\n"); - return ret; - } - - return 0; -} - -int ehci_hcd_stop(void) -{ - return omap_ehci_hcd_stop(); -} - -void usb_hub_reset_devices(struct usb_hub_device *hub, int port) -{ - /* The LAN9730 needs to be reset after the port power has been set. */ - if (port == 3) { - gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0); - udelay(10); - gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1); - } -} -#endif - -#ifdef CONFIG_USB_XHCI_OMAP -/** - * @brief board_usb_init - Configure EVM board specific configurations - * for the LDO's and clocks for the USB blocks. - * - * @return 0 - */ -int board_usb_init(int index, enum usb_init_type init) -{ - int ret; -#ifdef CONFIG_PALMAS_USB_SS_PWR - ret = palmas_enable_ss_ldo(); -#endif - - enable_host_clocks(); - - return 0; -} -#endif diff --git a/board/ti/omap5_uevm/mux_data.h b/board/ti/omap5_uevm/mux_data.h deleted file mode 100644 index 3c4ba47497..0000000000 --- a/board/ti/omap5_uevm/mux_data.h +++ /dev/null @@ -1,57 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated, - * - * Sricharan R - */ -#ifndef _EVM5430_MUX_DATA_H -#define _EVM5430_MUX_DATA_H - -#include - -const struct pad_conf_entry core_padconf_array_essential[] = { - - {EMMC_CLK, (PTU | IEN | M0)}, /* EMMC_CLK */ - {EMMC_CMD, (PTU | IEN | M0)}, /* EMMC_CMD */ - {EMMC_DATA0, (PTU | IEN | M0)}, /* EMMC_DATA0 */ - {EMMC_DATA1, (PTU | IEN | M0)}, /* EMMC_DATA1 */ - {EMMC_DATA2, (PTU | IEN | M0)}, /* EMMC_DATA2 */ - {EMMC_DATA3, (PTU | IEN | M0)}, /* EMMC_DATA3 */ - {EMMC_DATA4, (PTU | IEN | M0)}, /* EMMC_DATA4 */ - {EMMC_DATA5, (PTU | IEN | M0)}, /* EMMC_DATA5 */ - {EMMC_DATA6, (PTU | IEN | M0)}, /* EMMC_DATA6 */ - {EMMC_DATA7, (PTU | IEN | M0)}, /* EMMC_DATA7 */ - {SDCARD_CLK, (PTU | IEN | M0)}, /* SDCARD_CLK */ - {SDCARD_CMD, (PTU | IEN | M0)}, /* SDCARD_CMD */ - {SDCARD_DATA0, (PTU | IEN | M0)}, /* SDCARD_DATA0*/ - {SDCARD_DATA1, (PTU | IEN | M0)}, /* SDCARD_DATA1*/ - {SDCARD_DATA2, (PTU | IEN | M0)}, /* SDCARD_DATA2*/ - {SDCARD_DATA3, (PTU | IEN | M0)}, /* SDCARD_DATA3*/ - {UART3_RX_IRRX, (PTU | IEN | M0)}, /* UART3_RX_IRRX */ - {UART3_TX_IRTX, (M0)}, /* UART3_TX_IRTX */ - {USBB1_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB1_HSIC_STROBE */ - {USBB1_HSIC_DATA, (PTU | IEN | M0)}, /* USBB1_HSIC_DATA */ - {USBB2_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB2_HSIC_STROBE */ - {USBB2_HSIC_DATA, (PTU | IEN | M0)}, /* USBB2_HSIC_DATA */ - {USBB3_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB3_HSIC_STROBE*/ - {USBB3_HSIC_DATA, (PTU | IEN | M0)}, /* USBB3_HSIC_DATA */ - {USBD0_HS_DP, (IEN | M0)}, /* USBD0_HS_DP */ - {USBD0_HS_DM, (IEN | M0)}, /* USBD0_HS_DM */ - {USBD0_SS_RX, (IEN | M0)}, /* USBD0_SS_RX */ - {I2C5_SCL, (IEN | M0)}, /* I2C5_SCL */ - {I2C5_SDA, (IEN | M0)}, /* I2C5_SDA */ - {HSI2_ACWAKE, (PTU | M6)}, /* HSI2_ACWAKE */ - {HSI2_CAFLAG, (PTU | M6)}, /* HSI2_CAFLAG */ -}; - -const struct pad_conf_entry wkup_padconf_array_essential[] = { - - {SR_PMIC_SCL, (PTU | IEN | M0)}, /* SR_PMIC_SCL */ - {SR_PMIC_SDA, (PTU | IEN | M0)}, /* SR_PMIC_SDA */ - {SYS_32K, (IEN | M0)}, /* SYS_32K */ - {FREF_CLK1_OUT, (PTD | IEN | M0)}, /* FREF_CLK1_OUT */ - -}; - -#endif /* _EVM4430_MUX_DATA_H */ diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig deleted file mode 100644 index 487f7f305c..0000000000 --- a/configs/omap5_uevm_defconfig +++ /dev/null @@ -1,55 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_OMAP54XX=y -CONFIG_TARGET_OMAP5_UEVM=y -CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC=16296 -CONFIG_SPL=y -CONFIG_ENV_OFFSET_REDUND=0x280000 -CONFIG_ARMV7_LPAE=y -CONFIG_SPL_TEXT_BASE=0x40300000 -CONFIG_DISTRO_DEFAULTS=y -# CONFIG_USE_BOOTCOMMAND is not set -CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_VERSION_VARIABLE=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_OS_BOOT=y -CONFIG_CMD_SPL=y -CONFIG_CMD_ASKENV=y -CONFIG_CMD_DFU=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_GPT=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_EXT4_WRITE=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_SCSI_AHCI=y -CONFIG_DFU_MMC=y -CONFIG_DFU_RAM=y -CONFIG_CMD_TCA642X=y -CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_MMC_OMAP_HS=y -CONFIG_SCSI=y -CONFIG_CONS_INDEX=3 -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_OMAP3_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_OMAP=y -CONFIG_USB_DWC3_PHY_OMAP=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" -CONFIG_USB_GADGET_VENDOR_NUM=0x0403 -CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USB_HOST_ETHER=y -CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_FAT_WRITE=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h deleted file mode 100644 index 53589c03ea..0000000000 --- a/include/configs/omap5_uevm.h +++ /dev/null @@ -1,62 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2013 - * Texas Instruments Incorporated. - * Sricharan R - * - * Configuration settings for the TI EVM5430 board. - * See ti_omap5_common.h for omap5 common settings. - */ - -#ifndef __CONFIG_OMAP5_EVM_H -#define __CONFIG_OMAP5_EVM_H - -#include - -#ifndef CONFIG_SPL_BUILD -/* Define the default GPT table for eMMC */ -#define PARTS_DEFAULT \ - "uuid_disk=${uuid_gpt_disk};" \ - "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}" -#endif - -#define DFUARGS \ - "dfu_bufsiz=0x10000\0" \ - DFU_ALT_INFO_MMC \ - DFU_ALT_INFO_EMMC \ - DFU_ALT_INFO_RAM - -#include - -#define CONFIG_SYS_NS16550_COM3 UART3_BASE - -/* MMC ENV related defines */ -#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ - -/* Enhance our eMMC support / experience. */ -#define CONFIG_HSMMC2_8BIT - -/* Required support for the TCA642X GPIO we have on the uEVM */ -#define CONFIG_TCA642X -#define CONFIG_SYS_I2C_TCA642X_BUS_NUM 4 -#define CONFIG_SYS_I2C_TCA642X_ADDR 0x22 - -/* USB UHH support options */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET - -#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80 -#define CONFIG_OMAP_EHCI_PHY3_RESET_GPIO 79 - -/* Enabled commands */ - -/* USB Networking options */ - -#define CONSOLEDEV "ttyS2" - -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - -#endif /* __CONFIG_OMAP5_EVM_H */ From patchwork Tue May 26 17:47:16 2020 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id j11sor893983plj.44.2020.05.26.10.47.35 for (Google Transport Security); Tue, 26 May 2020 10:47:35 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:902:a989:: with SMTP id bh9mr2179365plb.44.1590515255125; Tue, 26 May 2020 10:47:35 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id o201sm175153pfd.115.2020.05.26.10.47.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:47:34 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 13/14] spi: omap3: Drop nondm code Date: Tue, 26 May 2020 23:17:16 +0530 Message-Id: <20200526174717.262151-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174717.262151-1-jagan@amarulasolutions.com> References: <20200526174717.262151-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=YsdcsZUM; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Now all boards are using this omap3 spi driver in dm model, so drop the nondm code. Signed-off-by: Jagan Teki --- drivers/spi/Kconfig | 14 ++--- drivers/spi/omap3_spi.c | 136 ---------------------------------------- 2 files changed, 7 insertions(+), 143 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 09b9cb17d8..8fccfbf20d 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -226,6 +226,13 @@ config NXP_FSPI Enable the NXP FlexSPI (FSPI) driver. This driver can be used to access the SPI NOR flash on platforms embedding this NXP IP core. +config OMAP3_SPI + bool "McSPI driver for OMAP" + help + SPI master controller for OMAP24XX and later Multichannel SPI + (McSPI). This driver be used to access SPI chips on platforms + embedding this OMAP3 McSPI IP core. + config PIC32_SPI bool "Microchip PIC32 SPI driver" depends on MACH_PIC32 @@ -429,11 +436,4 @@ config MXC_SPI Enable the MXC SPI controller driver. This driver can be used on various i.MX SoCs such as i.MX31/35/51/6/7. -config OMAP3_SPI - bool "McSPI driver for OMAP" - help - SPI master controller for OMAP24XX and later Multichannel SPI - (McSPI). This driver be used to access SPI chips on platforms - embedding this OMAP3 McSPI IP core. - endif # menu "SPI Support" diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index 6a615d1498..39e6813469 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -25,16 +25,6 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_AM33XX) || defined(CONFIG_AM43XX) -#define OMAP3_MCSPI1_BASE 0x48030100 -#define OMAP3_MCSPI2_BASE 0x481A0100 -#else -#define OMAP3_MCSPI1_BASE 0x48098000 -#define OMAP3_MCSPI2_BASE 0x4809A000 -#define OMAP3_MCSPI3_BASE 0x480B8000 -#define OMAP3_MCSPI4_BASE 0x480BA000 -#endif - #define OMAP4_MCSPI_REG_OFFSET 0x100 struct omap2_mcspi_platform_config { @@ -109,9 +99,6 @@ struct mcspi { }; struct omap3_spi_priv { -#ifndef CONFIG_DM_SPI - struct spi_slave slave; -#endif struct mcspi *regs; unsigned int cs; unsigned int freq; @@ -455,128 +442,6 @@ static void _omap3_spi_claim_bus(struct omap3_spi_priv *priv) writel(conf, &priv->regs->modulctrl); } -#ifndef CONFIG_DM_SPI - -static inline struct omap3_spi_priv *to_omap3_spi(struct spi_slave *slave) -{ - return container_of(slave, struct omap3_spi_priv, slave); -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - free(priv); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - spi_reset(priv->regs); - - _omap3_spi_claim_bus(priv); - _omap3_spi_set_wordlen(priv); - _omap3_spi_set_mode(priv); - _omap3_spi_set_speed(priv); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - writel(OMAP3_MCSPI_MODULCTRL_MS, &priv->regs->modulctrl); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct omap3_spi_priv *priv; - struct mcspi *regs; - - /* - * OMAP3 McSPI (MultiChannel SPI) has 4 busses (modules) - * with different number of chip selects (CS, channels): - * McSPI1 has 4 CS (bus 0, cs 0 - 3) - * McSPI2 has 2 CS (bus 1, cs 0 - 1) - * McSPI3 has 2 CS (bus 2, cs 0 - 1) - * McSPI4 has 1 CS (bus 3, cs 0) - */ - - switch (bus) { - case 0: - regs = (struct mcspi *)OMAP3_MCSPI1_BASE; - break; -#ifdef OMAP3_MCSPI2_BASE - case 1: - regs = (struct mcspi *)OMAP3_MCSPI2_BASE; - break; -#endif -#ifdef OMAP3_MCSPI3_BASE - case 2: - regs = (struct mcspi *)OMAP3_MCSPI3_BASE; - break; -#endif -#ifdef OMAP3_MCSPI4_BASE - case 3: - regs = (struct mcspi *)OMAP3_MCSPI4_BASE; - break; -#endif - default: - printf("SPI error: unsupported bus %i. Supported busses 0 - 3\n", bus); - return NULL; - } - - if (((bus == 0) && (cs > 3)) || - ((bus == 1) && (cs > 1)) || - ((bus == 2) && (cs > 1)) || - ((bus == 3) && (cs > 0))) { - printf("SPI error: unsupported chip select %i on bus %i\n", cs, bus); - return NULL; - } - - if (max_hz > OMAP3_MCSPI_MAX_FREQ) { - printf("SPI error: unsupported frequency %i Hz. Max frequency is 48 MHz\n", - max_hz); - return NULL; - } - - if (mode > SPI_MODE_3) { - printf("SPI error: unsupported SPI mode %i\n", mode); - return NULL; - } - - priv = spi_alloc_slave(struct omap3_spi_priv, bus, cs); - if (!priv) { - printf("SPI error: malloc of SPI structure failed\n"); - return NULL; - } - - priv->regs = regs; - priv->cs = cs; - priv->freq = max_hz; - priv->mode = mode; - priv->wordlen = priv->slave.wordlen; -#if 0 - /* Please migrate to DM_SPI support for this feature. */ - priv->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN; -#endif - - return &priv->slave; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - return _spi_xfer(priv, bitlen, dout, din, flags); -} - -#else - static int omap3_spi_claim_bus(struct udevice *dev) { struct udevice *bus = dev->parent; @@ -701,4 +566,3 @@ U_BOOT_DRIVER(omap3_spi) = { .ops = &omap3_spi_ops, .priv_auto_alloc_size = sizeof(struct omap3_spi_priv), }; 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[209.85.220.65]) by mx.google.com with SMTPS id ce7sor294272pjb.3.2020.05.26.10.47.38 for (Google Transport Security); Tue, 26 May 2020 10:47:38 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90a:de8b:: with SMTP id n11mr406715pjv.87.1590515257903; Tue, 26 May 2020 10:47:37 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:34bf:6d2b:f49c:646b]) by smtp.gmail.com with ESMTPSA id o201sm175153pfd.115.2020.05.26.10.47.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 10:47:37 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 14/14] doc: driver-model: Update SPI migration status Date: Tue, 26 May 2020 23:17:17 +0530 Message-Id: <20200526174717.262151-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200526174717.262151-1-jagan@amarulasolutions.com> References: <20200526174717.262151-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=FGz5Q1ME; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , ompa3 and fsl_dspi are fully converted into DM_SPI. Update it. Signed-off-by: Jagan Teki --- doc/driver-model/migration.rst | 2 -- 1 file changed, 2 deletions(-) diff --git a/doc/driver-model/migration.rst b/doc/driver-model/migration.rst index 2c0e2c7f06..408643974c 100644 --- a/doc/driver-model/migration.rst +++ b/doc/driver-model/migration.rst @@ -75,10 +75,8 @@ No dm conversion yet:: Partially converted:: - drivers/spi/fsl_dspi.c drivers/spi/kirkwood_spi.c drivers/spi/mxc_spi.c - drivers/spi/omap3_spi.c drivers/spi/sh_qspi.c * Status: In progress