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[209.85.220.65]) by mx.google.com with SMTPS id q13sor10790061pgn.2.2020.06.08.11.17.25 for (Google Transport Security); Mon, 08 Jun 2020 11:17:25 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:c501:: with SMTP id f1mr9536927pgd.324.1591640245008; Mon, 08 Jun 2020 11:17:25 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:9043:af95:b7b4:3ade]) by smtp.gmail.com with ESMTPSA id t7sm180213pju.42.2020.06.08.11.17.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jun 2020 11:17:24 -0700 (PDT) From: Jagan Teki To: Kever Yang , Philipp Tomsich , Simon Glass Cc: Suniel Mahesh , U-Boot-Denx , linux-rockchip@lists.infradead.org, linux-amarula , Jagan Teki Subject: [PATCH v4 1/4] Makefile: Drop to handle rkspi image type Date: Mon, 8 Jun 2020 14:17:05 -0400 Message-Id: <20200608181708.17842-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200608181708.17842-1-jagan@amarulasolutions.com> References: <20200608181708.17842-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Yo6Ldylo; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , On rockchip platforms, SPI boot image creation is not straightforward like MMC boot image creation where former requires to specify tpl, spl in multimage format in mkimage, and later simply do a concatenate mkimaged-tpl with spl. On this note, let drop rkspi image type creation via kbuild and let inform via rockchip.rst Reviewed-by: Kever Yang Signed-off-by: Jagan Teki --- Changes for v4: - none Makefile | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/Makefile b/Makefile index 3851dd9fa0..db3b6b9991 100644 --- a/Makefile +++ b/Makefile @@ -1438,22 +1438,15 @@ u-boot-with-spl.bin: $(SPL_IMAGE) $(SPL_PAYLOAD) FORCE ifeq ($(CONFIG_ARCH_ROCKCHIP),y) -# rockchip image type -ifeq ($(CONFIG_SPL_SPI_LOAD),y) -ROCKCHIP_IMG_TYPE := rkspi -else -ROCKCHIP_IMG_TYPE := rksd -endif - # TPL + SPL ifeq ($(CONFIG_SPL)$(CONFIG_TPL),yy) -MKIMAGEFLAGS_u-boot-tpl-rockchip.bin = -n $(CONFIG_SYS_SOC) -T $(ROCKCHIP_IMG_TYPE) +MKIMAGEFLAGS_u-boot-tpl-rockchip.bin = -n $(CONFIG_SYS_SOC) -T rksd tpl/u-boot-tpl-rockchip.bin: tpl/u-boot-tpl.bin FORCE $(call if_changed,mkimage) idbloader.img: tpl/u-boot-tpl-rockchip.bin spl/u-boot-spl.bin FORCE $(call if_changed,cat) else -MKIMAGEFLAGS_idbloader.img = -n $(CONFIG_SYS_SOC) -T $(ROCKCHIP_IMG_TYPE) +MKIMAGEFLAGS_idbloader.img = -n $(CONFIG_SYS_SOC) -T rksd idbloader.img: spl/u-boot-spl.bin FORCE $(call if_changed,mkimage) endif From patchwork Mon Jun 8 18:17:06 2020 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id h17sor10731009pgn.37.2020.06.08.11.17.30 for (Google Transport Security); Mon, 08 Jun 2020 11:17:30 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:4a1d:: with SMTP id x29mr20750552pga.53.1591640249774; Mon, 08 Jun 2020 11:17:29 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:9043:af95:b7b4:3ade]) by smtp.gmail.com with ESMTPSA id t7sm180213pju.42.2020.06.08.11.17.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jun 2020 11:17:29 -0700 (PDT) From: Jagan Teki To: Kever Yang , Philipp Tomsich , Simon Glass Cc: Suniel Mahesh , U-Boot-Denx , linux-rockchip@lists.infradead.org, linux-amarula , Jagan Teki Subject: [PATCH v4 2/4] roc-rk3399-pc: Mark default env from SPI Date: Mon, 8 Jun 2020 14:17:06 -0400 Message-Id: <20200608181708.17842-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200608181708.17842-1-jagan@amarulasolutions.com> References: <20200608181708.17842-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=BqSAR8s6; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Mark the default U-Boot environment as SPI flash since this is an on board flash device. Updated env offset, size in contrast with default since the U-Boot proper has starting from 384K. Signed-off-by: Jagan Teki --- Changes for v4: - adjust env offset, size configs/roc-pc-mezzanine-rk3399_defconfig | 4 +++- configs/roc-pc-rk3399_defconfig | 4 +++- include/configs/roc-pc-rk3399.h | 4 ---- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 1c1539bcb9..9c6fd0c98c 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -1,7 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROC_PC_RK3399=y CONFIG_NR_DRAM_BANKS=1 @@ -25,7 +27,7 @@ CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 76e76c160e..b225eb38fe 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -1,7 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROC_PC_RK3399=y CONFIG_NR_DRAM_BANKS=1 @@ -24,7 +26,7 @@ CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y diff --git a/include/configs/roc-pc-rk3399.h b/include/configs/roc-pc-rk3399.h index d4cbc3532e..59fe22289c 100644 --- a/include/configs/roc-pc-rk3399.h +++ b/include/configs/roc-pc-rk3399.h @@ -13,10 +13,6 @@ #include -#if defined(CONFIG_ENV_IS_IN_MMC) -# define CONFIG_SYS_MMC_ENV_DEV 0 -#endif - #define SDRAM_BANK_SIZE (2UL << 30) #endif From patchwork Mon Jun 8 18:17:07 2020 Content-Type: text/plain; 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[209.85.220.41]) by mx.google.com with SMTPS id k16sor10741395pgi.18.2020.06.08.11.17.35 for (Google Transport Security); Mon, 08 Jun 2020 11:17:35 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a63:d34a:: with SMTP id u10mr20189048pgi.297.1591640254749; Mon, 08 Jun 2020 11:17:34 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:9043:af95:b7b4:3ade]) by smtp.gmail.com with ESMTPSA id t7sm180213pju.42.2020.06.08.11.17.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jun 2020 11:17:33 -0700 (PDT) From: Jagan Teki To: Kever Yang , Philipp Tomsich , Simon Glass Cc: Suniel Mahesh , U-Boot-Denx , linux-rockchip@lists.infradead.org, linux-amarula , Jagan Teki Subject: [PATCH v4 3/4] roc-rk3399-pc: Add SPI boot Date: Mon, 8 Jun 2020 14:17:07 -0400 Message-Id: <20200608181708.17842-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200608181708.17842-1-jagan@amarulasolutions.com> References: <20200608181708.17842-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=hGa1nFfL; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , U-Boot TPL 2020.07-rc3-00090-gd4e919f927-dirty (Jun 01 2020 - 23:45:53) Channel 0: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Channel 1: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB 256B stride 256B stride lpddr4_set_rate: change freq to 400000000 mhz 0, 1 lpddr4_set_rate: change freq to 800000000 mhz 1, 0 Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530) Trying to boot from MMC1 NOTICE: BL31: v2.2(release): NOTICE: BL31: Built : 15:05:37, May 12 2020 U-Boot 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530) SoC: Rockchip rk3399 Reset cause: POR Model: Firefly ROC-RK3399-PC Board DRAM: 3.9 GiB PMIC: RK808 MMC: mmc@fe320000: 1, sdhci@fe330000: 0 Loading Environment from SPI Flash... SF: Detected w25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Model: Firefly ROC-RK3399-PC Board Reviewed-by: Kever Yang Signed-off-by: Jagan Teki --- Changes for v4: - none arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 12 +++++++++++- configs/roc-pc-mezzanine-rk3399_defconfig | 3 +++ configs/roc-pc-rk3399_defconfig | 3 +++ 3 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi index 141dd0b306..fc155e6903 100644 --- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi +++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi @@ -12,7 +12,11 @@ }; chosen { - u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; + u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdhci, &sdmmc; + }; + + config { + u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */ }; vcc_hub_en: vcc_hub_en-regulator { @@ -40,6 +44,12 @@ vin-supply = <&vcc_vbus_typec0>; }; +&spi1 { + spi_flash: flash@0 { + u-boot,dm-pre-reloc; + }; +}; + &vdd_log { regulator-min-microvolt = <430000>; regulator-init-microvolt = <950000>; diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 9c6fd0c98c..03ba519af1 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -9,12 +9,15 @@ CONFIG_TARGET_ROC_PC_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_SPI_LOAD=y CONFIG_TPL=y CONFIG_TPL_GPIO_SUPPORT=y CONFIG_CMD_BOOTZ=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index b225eb38fe..b59b54bd89 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -9,12 +9,15 @@ CONFIG_TARGET_ROC_PC_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_SPI_LOAD=y CONFIG_TPL=y CONFIG_TPL_GPIO_SUPPORT=y CONFIG_CMD_BOOTZ=y From patchwork Mon Jun 8 18:17:08 2020 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id gl12sor494735pjb.18.2020.06.08.11.17.40 for (Google Transport Security); Mon, 08 Jun 2020 11:17:40 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90a:9292:: with SMTP id n18mr537029pjo.3.1591640260445; Mon, 08 Jun 2020 11:17:40 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:9043:af95:b7b4:3ade]) by smtp.gmail.com with ESMTPSA id t7sm180213pju.42.2020.06.08.11.17.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jun 2020 11:17:39 -0700 (PDT) From: Jagan Teki To: Kever Yang , Philipp Tomsich , Simon Glass Cc: Suniel Mahesh , U-Boot-Denx , linux-rockchip@lists.infradead.org, linux-amarula , Jagan Teki , Hugh Cole-Baker Subject: [PATCH v4 4/4] doc: rockchip: Document SPI flash program steps Date: Mon, 8 Jun 2020 14:17:08 -0400 Message-Id: <20200608181708.17842-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200608181708.17842-1-jagan@amarulasolutions.com> References: <20200608181708.17842-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=qKYhoLFy; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Document SPI flash program steps for rockchip platforms. Suggested-by: Hugh Cole-Baker Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- Changes for v4: - none doc/board/rockchip/rockchip.rst | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 7b72fab496..76b228a046 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -162,6 +162,30 @@ Program the flash:: Note: for rockchip 32-bit platforms the U-Boot proper image is u-boot-dtb.img +SPI +^^^ + +Generating idbloader for SPI boot would require to input a multi image +image format to mkimage tool instead of concerting (like for MMC boot). + +SPL-alone SPI boot image:: + + ./tools/mkimage -n rk3399 -T rkspi -d spl/u-boot-spl.bin idbloader.img + +TPL+SPL SPI boot image:: + + ./tools/mkimage -n rk3399 -T rkspi -d tpl/u-boot-tpl.bin:spl/u-boot-spl.bin idbloader.img + +Copy SPI boot images into SD card and boot from SD:: + + sf probe + load mmc 1:1 $kernel_addr_r idbloader.img + sf erase 0 +$filesize + sf write $kernel_addr_r 0 ${filesize} + load mmc 1:1 ${kernel_addr_r} u-boot.itb + sf erase 0x60000 +$filesize + sf write $kernel_addr_r 0x60000 ${filesize} + TODO ---- @@ -171,4 +195,4 @@ TODO - Add missing SoC's with it boards list .. Jagan Teki -.. Sunday 24 May 2020 10:08:41 PM IST +.. Tuesday 02 June 2020 12:18:57 AM IST