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[209.85.220.41]) by mx.google.com with SMTPS id 71sor11124503plc.71.2020.07.02.01.03.11 for (Google Transport Security); Thu, 02 Jul 2020 01:03:11 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:902:c252:: with SMTP id 18mr19314017plg.39.1593676991446; Thu, 02 Jul 2020 01:03:11 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:a961:9b2e:1b93:8ca7]) by smtp.gmail.com with ESMTPSA id h9sm6754120pjs.50.2020.07.02.01.03.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Jul 2020 01:03:10 -0700 (PDT) From: Jagan Teki To: Rick Chen , Atish Patra , Palmer Dabbelt , Bin Meng , Paul Walmsley , Anup Patel , Sagar Kadam Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki , Bin Meng Subject: [PATCH v4 2/6] sifive: fu540: Add Booting from SPI Date: Thu, 2 Jul 2020 13:32:58 +0530 Message-Id: <20200702080259.12417-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=CR0D8Nae; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add booting from SPI for SiFive Unleashed board. Signed-off-by: Jagan Teki Reviewed-by: Bin Meng Tested-by: Bin Meng --- Changes for v4: - drop BOARD configs .../dts/hifive-unleashed-a00-u-boot.dtsi | 12 ++++++ configs/sifive_fu540_defconfig | 4 ++ doc/board/sifive/fu540.rst | 41 +++++++++++++++++++ 3 files changed, 57 insertions(+) diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi index 303806454b..4b2b242deb 100644 --- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi @@ -12,6 +12,10 @@ spi2 = &qspi2; }; + config { + u-boot,spl-payload-offset = <0x105000>; /* loader2 @1044KB */ + }; + hfclk { u-boot,dm-spl; }; @@ -22,6 +26,14 @@ }; +&qspi0 { + u-boot,dm-spl; + + flash@0 { + u-boot,dm-spl; + }; +}; + &qspi2 { mmc@0 { u-boot,dm-spl; diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig index 8d412f8d6a..551d4b04a5 100644 --- a/configs/sifive_fu540_defconfig +++ b/configs/sifive_fu540_defconfig @@ -2,9 +2,11 @@ CONFIG_RISCV=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_ENV_SIZE=0x20000 +CONFIG_SPL_DM_SPI=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_TARGET_SIFIVE_FU540=y CONFIG_ARCH_RV64I=y @@ -15,9 +17,11 @@ CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_OF_BOARD_FIXUP=y CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_CLK=y CONFIG_DM_MTD=y diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst index 739eefa669..1ce9ab14f5 100644 --- a/doc/board/sifive/fu540.rst +++ b/doc/board/sifive/fu540.rst @@ -533,3 +533,44 @@ Sample boot log from HiFive Unleashed board type: 0fc63daf-8483-4772-8e79-3d69d8477de4 type: linux guid: 9faa81b6-39b1-4418-af5e-89c48f29c20d + +Booting from SPI +---------------- + +Use Building steps from "Booting from MMC using U-Boot SPL" section. + +Partition the SPI in Linux via mtdblock. (Require to boot the board in +SD boot mode by enabling MTD block in Linux) + +Use prebuilt image from here [1], which support to partition the SPI flash. + +.. code-block:: none + + # sgdisk --clear \ + > --set-alignment=2 \ + > --new=1:40:2087 --change-name=1:loader1 --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \ + > --new=2:2088:10279 --change-name=2:loader2 --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ + > --new=3:10536:65494 --change-name=3:rootfs --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \ + > /dev/mtdblock0 + +Program the SPI (Require to boot the board in SD boot mode) + +Execute below steps on U-Boot proper, + +.. code-block:: none + + tftpboot $kernel_addr_r u-boot-spl.bin + sf erase 0x5000 $filesize + sf write $kernel_addr_r 0x5000 $filesize + + tftpboot $kernel_addr_r u-boot.itb + sf erase 0x105000 $filesize + sf write $kernel_addr_r 0x105000 $filesize + +Power off the board + +Change DIP switches MSEL[3:0] are set to 0110 + +Power up the board. + +[1] https://github.com/amarula/bsp-sifive From patchwork Thu Jul 2 08:02:59 2020 Content-Type: text/plain; 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[209.85.220.65]) by mx.google.com with SMTPS id m15sor10405759pjf.33.2020.07.02.01.03.16 for (Google Transport Security); Thu, 02 Jul 2020 01:03:16 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90b:4d08:: with SMTP id mw8mr31905393pjb.119.1593676996184; Thu, 02 Jul 2020 01:03:16 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:a961:9b2e:1b93:8ca7]) by smtp.gmail.com with ESMTPSA id h9sm6754120pjs.50.2020.07.02.01.03.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Jul 2020 01:03:15 -0700 (PDT) From: Jagan Teki To: Rick Chen , Atish Patra , Palmer Dabbelt , Bin Meng , Paul Walmsley , Anup Patel , Sagar Kadam Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki , Bin Meng Subject: [PATCH v4 3/6] env: Enable SPI flash env for SiFive FU540 Date: Thu, 2 Jul 2020 13:32:59 +0530 Message-Id: <20200702080259.12417-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200702080259.12417-1-jagan@amarulasolutions.com> References: <20200702080259.12417-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="DzOr/JHW"; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , SPI flash device on HiFive Unleashed has 32MiB Size. This patch adds SPI flash environment after U-Boot proper partition with a size of 128KiB. SPI flash partition layout(32MiB): 0 - 34 : reserved for GPT header 35 - 39 : unused 40 - 2087 : loader1 (SPL, FSBL) 2088 - 10279 : loader2 (U-Boot proper, U-Boot) 10280 - 10535 : environment 10536 - 65494 : rootfs 65528 - 65536 : distro script Note: the loader1 must start from 40th sector even though there are 6 free sectors prior since 40th sector is nearest flash sector boundary.  Signed-off-by: Jagan Teki Reviewed-by: Bin Meng Tested-by: Bin Meng --- Changes for v4: - %s/add/adds arch/riscv/cpu/fu540/Kconfig | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/riscv/cpu/fu540/Kconfig b/arch/riscv/cpu/fu540/Kconfig index e9302e87c0..2dcad8e27f 100644 --- a/arch/riscv/cpu/fu540/Kconfig +++ b/arch/riscv/cpu/fu540/Kconfig @@ -13,3 +13,16 @@ config SIFIVE_FU540 imply SPL_CPU_SUPPORT imply SPL_OPENSBI imply SPL_LOAD_FIT + +if ENV_IS_IN_SPI_FLASH + +config ENV_OFFSET + default 0x505000 + +config ENV_SIZE + default 0x20000 + +config ENV_SECT_SIZE + default 0x10000 + +endif # ENV_IS_IN_SPI_FLASH