From patchwork Thu Nov 18 14:01:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michael Nazzareno Trimarchi X-Patchwork-Id: 1778 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f69.google.com (mail-ed1-f69.google.com [209.85.208.69]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id F2C683F158 for ; Thu, 18 Nov 2021 15:01:16 +0100 (CET) Received: by mail-ed1-f69.google.com with SMTP id v10-20020aa7d9ca000000b003e7bed57968sf5313231eds.23 for ; Thu, 18 Nov 2021 06:01:16 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1637244076; cv=pass; d=google.com; s=arc-20160816; b=bP/ysvvdHdGplRlo+Am+acEC6Dq+1NSjss7k2PFvWFXGMsi6J4qwomroWArEwEpWQ7 2UlIXN7YpokZyKPS96yfr5X40y8/lca11OOPDBWFle88rKF69hdQ/0ttTHgRp2GPgvsG ArOsxdUEBGQmYUM3IQBWy2Lceq2Vham2U/48L/8q9jLcTsblcNIrQLXK0YXIwqaCxXd8 +VbfZa1HotxjxwhSjZ4mAPtE7AQl7JsSnKwA7BVdiziKicgiozHPBwdc519DYbSE5ZAR kSCEyltswxjplnQ6SP/HFDgSn0jWxUCPK3ld4ZoM7xq1Khj173h3uJD/1sgAp2rpul25 DEvQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=oXGOqWwQ4YEn4/h+Fi358x+FJ6u+XPAIWfoo/qBTU4Q=; b=V1dzRV5FEJ5ctQn8AUkRtPLGeR1i6gDJg/7nAvbMAfWYDPHhSIZluzJFaZIx+bTF3P 8cBPNoSFsiP2GRE31q2GroOkInjY47++VjeI/T9Whb5dNeCQYPfQCcVyMaH2FheyGUW3 VvDCe/e1dpSEG5C72AN3anIDtjv8gvoz7IrPt/zvQ4iZYC8zPUzuFK0H8thzRUnUlr/q ZMaPq8+CvXyAkEB9N3SAGX5slUbqqzrA05jN9Hn+kS8SedCznJh9vDAkO8QTh7FsVtlj sEl4I2M+89f3+dIbuxKZJ1e7ONOn14hmkCHQBjxCU0AxgO7VuGS/7/oC75p51Xt7v095 yjfg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=f1kqnWM2; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=oXGOqWwQ4YEn4/h+Fi358x+FJ6u+XPAIWfoo/qBTU4Q=; b=Az2DKRHdDLisQluF2AIixltdZwtELbqC0L5T7S87vigjbEhjRkENCYyrD812g+SXte 84KTrArikOXxN3MSGpWz+TMiNCuvaaNi9I/QPsxBahafQ/ZRkyJvauvqbl45b2UBAPyX ZYgj2gDq5x16+4v3FnyrHdIjqw7RxWLlH8N3M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=oXGOqWwQ4YEn4/h+Fi358x+FJ6u+XPAIWfoo/qBTU4Q=; b=jaWHZxpwVYkCRitCkB9QAGIzybagCM5Jcu6eGBFbHEU/n5+MFWiEtxDodGgBZ/XvVC Ku1TjmmRoreWsJntl8/6zMD4XzbrCMK995V5fhX23ov2JVkilxzEfTmXFIldOjl83IpM GTJV7ypEYUYEFFcKMPvfctBfMRLWVZsCg3vmXn3a+DxgIUsQioQCdWSfAKPZMpLFYp7/ HN+QvF4VtwLJxEXa3sefeAgsXBNA6e7UtRfmzJ/5zO7VUYk4t7epDrEuRkFHje1RfQrq nhfp8he1W7nXkB23GIVRs2z5l1WREOBjiaAYTAj9SS671iXM/FQN6Ovzzrqcbo/jcVb5 LMZQ== X-Gm-Message-State: AOAM531Nw4ZZ3D0/ltq3ICi2kV9oITJcbhsqpA3TJW1MmQCN3pl94EX9 txjsCGf3f2uKqzxT1Psld8/quWk7 X-Google-Smtp-Source: ABdhPJw97iuGgZZ7bPJXwm+dlaPPvKI8tReEWVqKVdCwTRjpN/fy9mLYlGaWaE9O3jESOGJ4S/BfVA== X-Received: by 2002:a17:906:8a62:: with SMTP id hy2mr33656226ejc.347.1637244076583; Thu, 18 Nov 2021 06:01:16 -0800 (PST) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:907:3e9d:: with SMTP id hs29ls1525322ejc.2.gmail; Thu, 18 Nov 2021 06:01:15 -0800 (PST) X-Received: by 2002:a17:907:3f9d:: with SMTP id hr29mr34698921ejc.369.1637244075431; Thu, 18 Nov 2021 06:01:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1637244075; cv=none; d=google.com; s=arc-20160816; b=rFnbQEB8puoucSGR1QUeezyWZLhtQpGry4ekREUCqxu96eFayB69e3O2IG187xdznz fcpLf50CPH5anf3yI5BXG8kAj3DtZIwe4hh/X8pmFVk9x64xMk/hWYNjs1oP97K4UgRf yAOWAY42q0Dgm2CPy1UnVdRl4QnuxMCXJFDwZddBfmkRTLZHRaNru8M/BQ7+NPfsuBng BxW50SHOUY5qJ20JDRH/KMzPMhtKtwB4E68iog6XCWYgQ5HHjye7bx9aPANU8dSms4Qv KyclQC3iAqkPuGmnVFrdF48d6sYl7bs5bzOYHKoq5ZdWQyUUJ8uBvvzY3a9MFg68lBN4 h/NA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:dkim-signature; bh=z1rrOGK55cpoJNNzMvUybruu+xjbl/E+n7Uq+UmypC8=; b=vdIN8x51ho9NhnQN5PALiCIci3uf2E1atzJvcyuLrlk/b7zijjUsOA+WJY+X5A6rTn NxFYj9QLBZ2WkA/tq+Vra3YkvkDW9LwtVhp34uazcxYapZ0hNGBf5yd2Wu9bdNCGKjpB AE0ymv233jNqPVMlXGcQJMtNiWUSqHFDrv69P/KHVGge5oDWkgB54oYBjcig25VlIg79 qOebrAhuPcDD+FCHpkZPte96b72tRgt/vNPU+sBVodrR+c1fx0QB8Jhe1K3MJ31KdSQQ AqIQk71czDA5clHFTHvcSfuyjpoOIf5E3hBjqUfaaFjgAsKkYFMJ4FAP9T9CJCR5wVH7 LCgA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=f1kqnWM2; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id ne19sor2141638ejc.22.2021.11.18.06.01.15 for (Google Transport Security); Thu, 18 Nov 2021 06:01:15 -0800 (PST) Received-SPF: pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:907:2d12:: with SMTP id gs18mr34064036ejc.126.1637244075158; Thu, 18 Nov 2021 06:01:15 -0800 (PST) Received: from panicking.amarulasolutions.com ([62.18.234.25]) by smtp.gmail.com with ESMTPSA id oz13sm1390477ejc.65.2021.11.18.06.01.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Nov 2021 06:01:14 -0800 (PST) From: Michael Trimarchi To: Ye Li , Stefano Babic , Fabio Estevam Cc: u-boot@lists.denx.de, Ariel D'Alessandro , linux-amarula@amarulasolutions.com, Anthony Brandon Subject: [PATCH V2] cmd_nandbcb: Support secondary boot address of imx8mn Date: Thu, 18 Nov 2021 15:01:12 +0100 Message-Id: <20211118140112.326532-1-michael@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=f1kqnWM2; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add support of secondary boot address for imx8mn. The secondary boot address is hardcoded in the fuse. The value is calculated from there according to the following description: The fuse IMG_CNTN_SET1_OFFSET (0x490[22:19]) is defined as follows: • Secondary boot is disabled if fuse value is bigger than 10, n = fuse value bigger than 10. • n == 0: Offset = 4MB • n == 2: Offset = 1MB • Others & n <= 10 : Offset = 1MB*2^n • For FlexSPI boot, the valid values are: 0, 1, 2, 3, 4, 5, 6, and 7. Signed-off-by: Michael Trimarchi --- Changes V1->V2: - adjust commit message - drop and extra blank line --- arch/arm/mach-imx/cmd_nandbcb.c | 40 +++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index 09622c13c9..bd14b8583a 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -132,6 +132,7 @@ static struct platform_config imx8q_plat_config = { /* boot search related variables and definitions */ static int g_boot_search_count = 4; +static int g_boot_secondary_offset; static int g_boot_search_stride; static int g_pages_per_stride; @@ -275,9 +276,9 @@ static int nandbcb_set_boot_config(int argc, char * const argv[], boot_stream2_address = ((maxsize - boot_stream1_address) / 2 + boot_stream1_address); - if (boot_cfg->secondary_boot_stream_off_in_MB) + if (g_boot_secondary_offset) boot_stream2_address = - (loff_t)boot_cfg->secondary_boot_stream_off_in_MB * 1024 * 1024; + (loff_t)g_boot_secondary_offset * 1024 * 1024; max_boot_stream_size = boot_stream2_address - boot_stream1_address; @@ -1269,6 +1270,36 @@ static bool check_fingerprint(void *data, int fingerprint) return (*(int *)(data + off) == fingerprint); } +static int fuse_secondary_boot(u32 bank, u32 word, u32 mask, u32 off) +{ + int err; + u32 val; + int ret; + + err = fuse_read(bank, word, &val); + if (err) + return 0; + + val = (val & mask) >> off; + + if (val > 10) + return 0; + + switch (val) { + case 0: + ret = 4; + break; + case 1: + ret = 1; + break; + default: + ret = 2 << val; + break; + } + + return ret; +}; + static int fuse_to_search_count(u32 bank, u32 word, u32 mask, u32 off) { int err; @@ -1506,6 +1537,11 @@ static int do_nandbcb(struct cmd_tbl *cmdtp, int flag, int argc, g_boot_search_count); } + if ((plat_config.misc_flags) & FIRMWARE_SECONDARY_FIXED_ADDR) { + if (is_imx8mn()) + g_boot_secondary_offset = fuse_secondary_boot(2, 1, 0xff0000, 16); + } + cmd = argv[1]; --argc; ++argv;