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[109.118.140.232]) by smtp.gmail.com with ESMTPSA id p6-20020a17090664c600b006f3ef214de8sm2516582ejn.78.2022.05.15.02.35.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 02:35:40 -0700 (PDT) From: Michael Trimarchi To: Han Xu , U-Boot-Denx Cc: Ye Li , Stefano Babic , Miquel Raynal , Fabio Estevam , Dario Binacchi , Sean Anderson , linux-amarula@amarulasolutions.com, Jagan Teki , Ariel D'Alessandro , Tom Rini , Fabio Estevam , Tim Harvey Subject: [PATCH V4 1/5] nand: raw: mxs_nand: Fix specific hook registration Date: Sun, 15 May 2022 11:35:30 +0200 Message-Id: <20220515093534.1737172-2-michael@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220515093534.1737172-1-michael@amarulasolutions.com> References: <20220515093534.1737172-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=XmqEpzgl; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Move the hook after nand_scan_tail is called. The hook must be replaced to the mxs specific one but those must to be assignment later in the probe function. With this fix markbad is working again. Before this change: nand markbad 0xDEC00 NXS NAND: Writing OOB isn't supported NXS NAND: Writing OOB isn't supported block 0x000dec00 NOT marked as bad! ERROR 0 Cc: Han Xu Cc: Fabio Estevam Acked-by: Han Xu Tested-By: Tim Harvey Signed-off-by: Michael Trimarchi --- V3->V4: - none V2->V3: - Add tested-by from Tim - Add ack from Han Xu V1->V2: - Adjust the commit message - Add Cc Han Xu and Fabio --- drivers/mtd/nand/raw/mxs_nand.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c index ee5d7fde9c..53f24b9c4b 100644 --- a/drivers/mtd/nand/raw/mxs_nand.c +++ b/drivers/mtd/nand/raw/mxs_nand.c @@ -1246,22 +1246,6 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd) /* Enable BCH complete interrupt */ writel(BCH_CTRL_COMPLETE_IRQ_EN, &bch_regs->hw_bch_ctrl_set); - /* Hook some operations at the MTD level. */ - if (mtd->_read_oob != mxs_nand_hook_read_oob) { - nand_info->hooked_read_oob = mtd->_read_oob; - mtd->_read_oob = mxs_nand_hook_read_oob; - } - - if (mtd->_write_oob != mxs_nand_hook_write_oob) { - nand_info->hooked_write_oob = mtd->_write_oob; - mtd->_write_oob = mxs_nand_hook_write_oob; - } - - if (mtd->_block_markbad != mxs_nand_hook_block_markbad) { - nand_info->hooked_block_markbad = mtd->_block_markbad; - mtd->_block_markbad = mxs_nand_hook_block_markbad; - } - return 0; } @@ -1467,6 +1451,22 @@ int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info) if (err) goto err_free_buffers; + /* Hook some operations at the MTD level. */ + if (mtd->_read_oob != mxs_nand_hook_read_oob) { + nand_info->hooked_read_oob = mtd->_read_oob; + mtd->_read_oob = mxs_nand_hook_read_oob; + } + + if (mtd->_write_oob != mxs_nand_hook_write_oob) { + nand_info->hooked_write_oob = mtd->_write_oob; + mtd->_write_oob = mxs_nand_hook_write_oob; + } + + if (mtd->_block_markbad != mxs_nand_hook_block_markbad) { + nand_info->hooked_block_markbad = mtd->_block_markbad; + mtd->_block_markbad = mxs_nand_hook_block_markbad; + } + err = nand_register(0, mtd); if (err) goto err_free_buffers; From patchwork Sun May 15 09:35:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Trimarchi X-Patchwork-Id: 1952 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f71.google.com (mail-ed1-f71.google.com [209.85.208.71]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 952A83F1F5 for ; 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[109.118.140.232]) by smtp.gmail.com with ESMTPSA id p6-20020a17090664c600b006f3ef214de8sm2516582ejn.78.2022.05.15.02.35.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 02:35:43 -0700 (PDT) From: Michael Trimarchi To: Han Xu , U-Boot-Denx Cc: Ye Li , Stefano Babic , Miquel Raynal , Fabio Estevam , Dario Binacchi , Sean Anderson , linux-amarula@amarulasolutions.com, Jagan Teki , Ariel D'Alessandro , Tom Rini , Fabio Estevam , Tim Harvey Subject: [PATCH V4 2/5] mtd: nand: mxs_nand_spl: Fix bad block skipping Date: Sun, 15 May 2022 11:35:31 +0200 Message-Id: <20220515093534.1737172-3-michael@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220515093534.1737172-1-michael@amarulasolutions.com> References: <20220515093534.1737172-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=pgGeQV7n; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The specific implementation was having bug. Those bugs are since the beginning of the implementation. Some manufactures can already experience this bug in their SPL code. This bug can be more visible on architecture that has complicated boot process like imx8mn. Older version of uboot can be affected if the bad block appear in correspoding of the beginning of u-boot image. In order to adjust the function we scan from the first erase block. The problematic part of old code was in this part: while (is_badblock(mtd, offs, 1)) { page = page + nand_page_per_block; /* Check i we've reached the end of flash. */ if (page >= mtd->size >> chip->page_shift) { free(page_buf); return -ENOMEM; } } Even we fix it adding increment of the offset of one erase block size , we don't fix the problem, because the first erase block where the image start is not checked. The code was tested on an imx8mn where the boot rom api was not able to skip it. This code is used by other architecures like imx6 and imx8mm Cc: Han Xu Cc: Fabio Estevam Acked-by: Han Xu Tested-By: Tim Harvey Signed-off-by: Michael Trimarchi --- V3->V4: - none V2->V3: - Add tested-by from Tim - Add ack from Han Xu - Rework english of commit message V1->V2: - Adjust the commit message - Add Cc Han Xu and Fabio - fix size >= 0 to > 0 --- drivers/mtd/nand/raw/mxs_nand_spl.c | 90 ++++++++++++++++------------- 1 file changed, 49 insertions(+), 41 deletions(-) diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c index 59a67ee414..2bfb181007 100644 --- a/drivers/mtd/nand/raw/mxs_nand_spl.c +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c @@ -218,14 +218,14 @@ void nand_init(void) mxs_nand_setup_ecc(mtd); } -int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf) +int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) { - struct nand_chip *chip; - unsigned int page; + unsigned int sz; + unsigned int block, lastblock; + unsigned int page, page_offset; unsigned int nand_page_per_block; - unsigned int sz = 0; + struct nand_chip *chip; u8 *page_buf = NULL; - u32 page_off; chip = mtd_to_nand(mtd); if (!chip->numchips) @@ -235,47 +235,42 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf) if (!page_buf) return -ENOMEM; - page = offs >> chip->page_shift; - page_off = offs & (mtd->writesize - 1); + /* offs has to be aligned to a page address! */ + block = offs / mtd->erasesize; + lastblock = (offs + size - 1) / mtd->erasesize; + page = (offs % mtd->erasesize) / mtd->writesize; + page_offset = offs % mtd->writesize; nand_page_per_block = mtd->erasesize / mtd->writesize; - debug("%s offset:0x%08x len:%d page:%x\n", __func__, offs, size, page); - - while (size) { - if (mxs_read_page_ecc(mtd, page_buf, page) < 0) - return -1; - - if (size > (mtd->writesize - page_off)) - sz = (mtd->writesize - page_off); - else - sz = size; - - memcpy(buf, page_buf + page_off, sz); - - offs += mtd->writesize; - page++; - buf += (mtd->writesize - page_off); - page_off = 0; - size -= sz; - - /* - * Check if we have crossed a block boundary, and if so - * check for bad block. - */ - if (!(page % nand_page_per_block)) { - /* - * Yes, new block. See if this block is good. If not, - * loop until we find a good block. - */ - while (is_badblock(mtd, offs, 1)) { - page = page + nand_page_per_block; - /* Check i we've reached the end of flash. */ - if (page >= mtd->size >> chip->page_shift) { + while (block <= lastblock && size > 0) { + if (!is_badblock(mtd, mtd->erasesize * block, 1)) { + /* Skip bad blocks */ + while (page < nand_page_per_block) { + int curr_page = nand_page_per_block * block + page; + + if (mxs_read_page_ecc(mtd, page_buf, curr_page) < 0) { free(page_buf); - return -ENOMEM; + return -EIO; } + + if (size > (mtd->writesize - page_offset)) + sz = (mtd->writesize - page_offset); + else + sz = size; + + memcpy(dst, page_buf + page_offset, sz); + dst += sz; + size -= sz; + page_offset = 0; + page++; } + + page = 0; + } else { + lastblock++; } + + block++; } free(page_buf); @@ -294,6 +289,19 @@ void nand_deselect(void) u32 nand_spl_adjust_offset(u32 sector, u32 offs) { - /* Handle the offset adjust in nand_spl_load_image,*/ + unsigned int block, lastblock; + + block = sector / mtd->erasesize; + lastblock = (sector + offs) / mtd->erasesize; + + while (block <= lastblock) { + if (is_badblock(mtd, block * mtd->erasesize, 1)) { + offs += mtd->erasesize; + lastblock++; + } + + block++; + } + return offs; } From patchwork Sun May 15 09:35:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Trimarchi X-Patchwork-Id: 1953 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id D37A13F18B for ; Sun, 15 May 2022 11:35:48 +0200 (CEST) Received: by mail-ed1-f72.google.com with SMTP id r8-20020a056402018800b00428b43999fesf7801914edv.5 for ; Sun, 15 May 2022 02:35:48 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1652607348; cv=pass; d=google.com; s=arc-20160816; b=n1TLy6FqCIDllsJWZnPj5KQmropKIoQcAXo+gHfsmsJAfcu1kzhyTeezemIQ6asQkX NbPUQhZa5Paovpf979UUbic6mGFJIc5KBXvYu6OHKguihztFlklTk+VuRV8X3ePltxBH dYEe56QzyPt9tK6zrKfVxXdrFASyWq2AFwWs/bLEc9s1lxT6BUe3imEuROZSJ6cAOtS3 P/JHwRzmzDGrmFbr0XUQWEr0FaxwHsK7cWAoyj5rqs53xtUc/UIzzr3iI12oRbWYyd04 Z6B47eWY98dFwdd4rbyQ8x+xRPjOVaeM5IuXYcOK3MmsdlfcVi6ij5q3ahtz5neZGYXY +9lQ== ARC-Message-Signature: i=2; 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[109.118.140.232]) by smtp.gmail.com with ESMTPSA id p6-20020a17090664c600b006f3ef214de8sm2516582ejn.78.2022.05.15.02.35.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 02:35:46 -0700 (PDT) From: Michael Trimarchi To: Han Xu , U-Boot-Denx Cc: Ye Li , Stefano Babic , Miquel Raynal , Fabio Estevam , Dario Binacchi , Sean Anderson , linux-amarula@amarulasolutions.com, Jagan Teki , Ariel D'Alessandro , Tom Rini , Tim Harvey Subject: [PATCH V4 3/5] arm: mach-imx: cmd_nandbcb fix bad block handling Date: Sun, 15 May 2022 11:35:32 +0200 Message-Id: <20220515093534.1737172-4-michael@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220515093534.1737172-1-michael@amarulasolutions.com> References: <20220515093534.1737172-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=U0dlHY63; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The badblock should be skipped properly in reading and writing. Fix the logic. The bcb struct is written, skipping the bad block, so we need to read using the same logic. This was tested create bad block in the area and then flash it and read it back. Acked-by: Han Xu Tested-By: Tim Harvey Signed-off-by: Michael Trimarchi --- V3->V4: - none V2->V3: - Add tested-by from Tim - Add ack from Han Xu V1->V2: - Adjust the commit message - Add Cc Han Xu and Fabio - move out from RFC --- arch/arm/mach-imx/cmd_nandbcb.c | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index f119e9f88d..c54f52b343 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -506,10 +506,6 @@ static int read_fcb(struct boot_config *boot_cfg, struct fcb_block *fcb, int ret = 0; mtd = boot_cfg->mtd; - if (mtd_block_isbad(mtd, off)) { - printf("Block %d is bad, skipped\n", (int)CONV_TO_BLOCKS(off)); - return 1; - } fcb_raw_page = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); if (!fcb_raw_page) { @@ -530,7 +526,7 @@ static int read_fcb(struct boot_config *boot_cfg, struct fcb_block *fcb, else if (plat_config.misc_flags & FCB_ENCODE_BCH_40b) mxs_nand_mode_fcb_40bit(mtd); - ret = nand_read(mtd, off, &size, (u_char *)fcb); + ret = nand_read_skip_bad(mtd, off, &size, NULL, mtd->size, (u_char *)fcb); /* switch BCH back */ mxs_nand_mode_normal(mtd); @@ -617,6 +613,7 @@ static int write_fcb(struct boot_config *boot_cfg, struct fcb_block *fcb) for (i = 0; i < g_boot_search_count; i++) { if (mtd_block_isbad(mtd, off)) { printf("Block %d is bad, skipped\n", i); + off += mtd->erasesize; continue; } @@ -676,20 +673,15 @@ static int read_dbbt(struct boot_config *boot_cfg, struct dbbt_block *dbbt, void *dbbt_data_page, loff_t off) { size_t size; + size_t actual_size; struct mtd_info *mtd; loff_t to; int ret; mtd = boot_cfg->mtd; - if (mtd_block_isbad(mtd, off)) { - printf("Block %d is bad, skipped\n", - (int)CONV_TO_BLOCKS(off)); - return 1; - } - size = sizeof(struct dbbt_block); - ret = nand_read(mtd, off, &size, (u_char *)dbbt); + ret = nand_read_skip_bad(mtd, off, &size, &actual_size, mtd->size, (u_char *)dbbt); printf("NAND DBBT read from 0x%llx offset 0x%zx read: %s\n", off, size, ret ? "ERROR" : "OK"); if (ret) @@ -697,9 +689,9 @@ static int read_dbbt(struct boot_config *boot_cfg, struct dbbt_block *dbbt, /* dbbtpages == 0 if no bad blocks */ if (dbbt->dbbtpages > 0) { - to = off + 4 * mtd->writesize; + to = off + 4 * mtd->writesize + actual_size - size; size = mtd->writesize; - ret = nand_read(mtd, to, &size, dbbt_data_page); + ret = nand_read_skip_bad(mtd, to, &size, NULL, mtd->size, dbbt_data_page); printf("DBBT data read from 0x%llx offset 0x%zx read: %s\n", to, size, ret ? "ERROR" : "OK"); @@ -729,6 +721,7 @@ static int write_dbbt(struct boot_config *boot_cfg, struct dbbt_block *dbbt, if (mtd_block_isbad(mtd, off)) { printf("Block %d is bad, skipped\n", (int)(i + CONV_TO_BLOCKS(off))); + off += mtd->erasesize; continue; } From patchwork Sun May 15 09:35:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Trimarchi X-Patchwork-Id: 1954 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ej1-f71.google.com (mail-ej1-f71.google.com [209.85.218.71]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 88E0C3F1F5 for ; Sun, 15 May 2022 11:35:51 +0200 (CEST) Received: by mail-ej1-f71.google.com with SMTP id gn26-20020a1709070d1a00b006f453043956sf4956720ejc.15 for ; Sun, 15 May 2022 02:35:51 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1652607351; cv=pass; d=google.com; s=arc-20160816; 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[109.118.140.232]) by smtp.gmail.com with ESMTPSA id p6-20020a17090664c600b006f3ef214de8sm2516582ejn.78.2022.05.15.02.35.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 02:35:49 -0700 (PDT) From: Michael Trimarchi To: Han Xu , U-Boot-Denx Cc: Ye Li , Stefano Babic , Miquel Raynal , Fabio Estevam , Dario Binacchi , Sean Anderson , linux-amarula@amarulasolutions.com, Jagan Teki , Ariel D'Alessandro , Tom Rini , Fabio Estevam , Tim Harvey Subject: [PATCH V4 4/5] spl: spl_nand: Fix bad block handling in fitImage Date: Sun, 15 May 2022 11:35:33 +0200 Message-Id: <20220515093534.1737172-5-michael@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220515093534.1737172-1-michael@amarulasolutions.com> References: <20220515093534.1737172-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=ikLw7IIz; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , If the fitImage has some bad block in fit image area, the offset must be recalulcated. This should be done always. After implementing it in mxs now is possible to call the function even for that platform. Cc: Fabio Estevam Tested-By: Tim Harvey Reviewed-by: Tom Rini Signed-off-by: Michael Trimarchi --- V3->V4: - none V2->V3: - Add tested-by from Tim - Add ack from Han Xu V1->V2: - move out from RFC --- common/spl/spl_nand.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c index fc61b447a5..82a10ffa63 100644 --- a/common/spl/spl_nand.c +++ b/common/spl/spl_nand.c @@ -43,15 +43,12 @@ static ulong spl_nand_fit_read(struct spl_load_info *load, ulong offs, ulong size, void *dst) { int err; -#ifdef CONFIG_SYS_NAND_BLOCK_SIZE ulong sector; sector = *(int *)load->priv; - offs = sector + nand_spl_adjust_offset(sector, offs - sector); -#else offs *= load->bl_len; size *= load->bl_len; -#endif + offs = sector + nand_spl_adjust_offset(sector, offs - sector); err = nand_spl_load_image(offs, size, dst); if (err) return 0; From patchwork Sun May 15 09:35:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Trimarchi X-Patchwork-Id: 1955 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f70.google.com (mail-ed1-f70.google.com [209.85.208.70]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 5E6903F18B for ; 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[109.118.140.232]) by smtp.gmail.com with ESMTPSA id p6-20020a17090664c600b006f3ef214de8sm2516582ejn.78.2022.05.15.02.35.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 02:35:51 -0700 (PDT) From: Michael Trimarchi To: Han Xu , U-Boot-Denx Cc: Ye Li , Stefano Babic , Miquel Raynal , Fabio Estevam , Dario Binacchi , Sean Anderson , linux-amarula@amarulasolutions.com, Jagan Teki , Ariel D'Alessandro , Tom Rini Subject: [PATCH V4 5/5] board: bsh: Switch to nand spl load instead of romapi Date: Sun, 15 May 2022 11:35:34 +0200 Message-Id: <20220515093534.1737172-6-michael@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220515093534.1737172-1-michael@amarulasolutions.com> References: <20220515093534.1737172-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=VDKNMBIo; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , romapi is not eble to skip bad block so we need to workaround using the spl Signed-off-by: Michael Trimarchi --- board/bsh/imx8mn_smm_s2/spl.c | 3 +++ 1 file changed, 3 insertions(+) --- V3->V4: - none V2->V3: - Add to series and fix if condition V1->V2: - none --- diff --git a/board/bsh/imx8mn_smm_s2/spl.c b/board/bsh/imx8mn_smm_s2/spl.c index 0f61acc630..097b60c055 100644 --- a/board/bsh/imx8mn_smm_s2/spl.c +++ b/board/bsh/imx8mn_smm_s2/spl.c @@ -18,6 +18,9 @@ int spl_board_boot_device(enum boot_device boot_dev_spl) { + if (IS_ENABLED(CONFIG_NAND_MXS) && get_boot_device() != USB_BOOT) + return BOOT_DEVICE_NAND; + return BOOT_DEVICE_BOOTROM; }