From patchwork Wed Jul 13 11:06:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Nazzareno Trimarchi X-Patchwork-Id: 2128 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ej1-f69.google.com (mail-ej1-f69.google.com [209.85.218.69]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id F11863F066 for ; Wed, 13 Jul 2022 13:06:21 +0200 (CEST) Received: by mail-ej1-f69.google.com with SMTP id l2-20020a170906078200b006fed42bfeacsf3293411ejc.16 for ; Wed, 13 Jul 2022 04:06:21 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1657710381; cv=pass; d=google.com; s=arc-20160816; b=CJpmUtKdw6Cyl1cv6IVfFG1mCnlzJGksiCK+rZlNlk9K1RfGTA7kOXSKkI8IguxU11 g/J7DkAUE36XUTVBEAoH6ep140poySrunf2VF2gwWfPSlJkK3pY+l6drUcvj1my7EnsD KLflWF4mg2CmuL9m71vg81FodzTXirDahJB47HG7BbvtiV7iulpFo+b1GANEV7jGTAeG rpNOp+jEKRV8pTBcuxpcsfmt1T4PbTuZ9c8vfZPZ4NfL/U0ixQpYiBj15CQBKF0cLMmr /uZBSs+CnCitGm5GjHxpGZGgCVxr60ZFYTvVGaLFMjz7pDhTozWCfdwXS/s7fy2f2tLt rRSQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:message-id:date:subject:to :from:dkim-signature; bh=ibuk6iijeVnWsvDmCkJ4JvKF1GNHzpHwVAaMYrAcGGk=; b=roLvbru5zyRM6hxl2/C+bvbFyiVkjGhmm+ULyS2vdkO5KBAHRtoC9+fq1Ho8x8jvn9 JvcVT5RpvTTabEVTJ0zwI/gtuVriwlvuW76MUz64bsZnCQjilsmsS7qoOGWBChUnJlA6 xUcWXmp7eybLIMWhH3EuFzn2Xz0eK0UA3lghcTH8e4YxHauTOhZT8uIynueXhK5oA6F8 0dW0x0DUamw6IyXxyon2ZkT6YwxS5fCyGaeuV4IoLe+qKRfbeS9QC79+Vl/ofOkpPqIR qSjgNRPUBnTkb3Qw4xkXOGGzXCllzJP2ERlMbwiSBv8kDLM4DaVxjXy0Ra1kR8hBAgnl 6ocg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="JZ/0KeUY"; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:subject:date:message-id:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=ibuk6iijeVnWsvDmCkJ4JvKF1GNHzpHwVAaMYrAcGGk=; b=YodjzadH1DlZjIcLhsEQR4qPxZKv9Cw5VrDtt+HlXZlK++fRawapm3i/FLo23iCsjr 62eUJmOewrj9oQxnfE48WsIUAvY/2p1zBFBH69r7RkdNpmoAJHPa51d7f1galXxkyd8d As5S7KPc+vvbo3HaLYkrpFtbC6BQFXt0Pddbo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:mime-version :x-original-sender:x-original-authentication-results:precedence :mailing-list:list-id:x-spam-checked-in-group:list-post:list-help :list-archive:list-unsubscribe; bh=ibuk6iijeVnWsvDmCkJ4JvKF1GNHzpHwVAaMYrAcGGk=; b=dnSAUnTbw+UYO+30QIhUwsRG6pQYuxZS2Oziso5EKyhWb2BmwMoUtaMcUHwd6ptACk PlAMH9ocQcszK2fQDqX+venkcVsrbZlXqmbtetmaqiP5SB2FQnvB4BTtjDmxW9/Gt7Px B65yaCphfGwM0xt13HzZSM2sAcwGvJv5n0LDI9b9GR3R4lr3AYHrtHGEeZnOD2LG++Of T0c6s5y0/1CXi54igUFbrR+Wyp84LQZH+9l2H15tco6Vcfu0Nqicae+NBqR873Xo1446 NlQJHbnpKDFsVbevlxedJMBDgbZ6ckqb5CLAcUClMntCEg1/3qT7S/jTg2LExvFsXLxD xk3A== X-Gm-Message-State: AJIora9nh1uWOh5iBfAZehRFHp0MFzWWE284Y7AfHd/zr6iQM9mBFCZC D0bOCAOXOfy7pSH7AxHLhZEtcVUb X-Google-Smtp-Source: AGRyM1sNr1KF3AyOwQzBu8CDQoR6m769HF/uLhENsRbSWFggZWj8F+DiZ4Dm3SMIpgawcHsv/IJ6zg== X-Received: by 2002:a05:6402:1115:b0:43a:f5db:b891 with SMTP id u21-20020a056402111500b0043af5dbb891mr4022049edv.315.1657710381583; Wed, 13 Jul 2022 04:06:21 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:907:7f27:b0:72b:6e70:8c8c with SMTP id qf39-20020a1709077f2700b0072b6e708c8cls971351ejc.10.gmail; Wed, 13 Jul 2022 04:06:20 -0700 (PDT) X-Received: by 2002:a17:907:7628:b0:72b:4d6f:ce8a with SMTP id jy8-20020a170907762800b0072b4d6fce8amr2897193ejc.59.1657710380218; Wed, 13 Jul 2022 04:06:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1657710380; cv=none; d=google.com; s=arc-20160816; b=EThfa3e5gf4mkoNnZHzuj0wYZ/rVkIimXzNtMG1fkYahwXPg2Qiy9XrcrSjg1JcFeE 5PogexmrBX3fXD0nkuGs1zBkQvrxKP8W93eUcevbYNL51tr/hlYakSGY+fZhVbW78tMU DFXAXaTWETJLYCservELADkKCaf5mzN5fv/UjODJ77LXbx4s9S5smIXqJt1KN4PXcT/I Jd07REUi0/bJhTeCurIcAJAXM/it0LefeVVlWZv7azLhCGa45tQyVK6Q4mAA8ODF9gFE 0bvsaK2RA3HmPxtgkglGN38sfPDk5R1SVI4VKIAZCRp8FajSSNY5et+tZQ/JpDoYYTY2 Uv4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:message-id:date:subject:to :from:dkim-signature; bh=scgZb0bC4B0X7WUv3UyK3BSDdHPIjlgd8bR1EBbI9lI=; b=NZ/zi3PbnAKjnJNqrRFlqpL4YJ8gFoIZXradHqWKhlMOM+uX669XSd/OK6V4V806qC S4uEheukQKuHz54JWOBJ9bbsRHzylnuKwR3euXQiJtAeNS6bfgPh/THvbVQSR9rgbu1U 7XLZ77rhWD++Xt5QQn9o67Ln6bIbqSS9/2LeS7YwIm3ZY2qPmXoIsWM0R5jaFIehQICA NImNGEOMWndFNnG8bgkF24dOFnwYCoCGclaFuKVOy8gb7zpOVWOWoXnsJmjxdaJLASaw 6qY8V95HmIaUSzvJnbkCQEfyEf9/S22/vtUmH/0nC1eI8KpqaH8Bck3uviJmVxJpc+gb W+JA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="JZ/0KeUY"; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id h2-20020a50cdc2000000b0043a507ac036sor4900974edj.33.2022.07.13.04.06.20 for (Google Transport Security); Wed, 13 Jul 2022 04:06:20 -0700 (PDT) Received-SPF: pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a05:6402:40d6:b0:43a:cc69:1db9 with SMTP id z22-20020a05640240d600b0043acc691db9mr4125239edb.380.1657710379449; Wed, 13 Jul 2022 04:06:19 -0700 (PDT) Received: from panicking.amarulasolutions.com ([2.198.242.86]) by smtp.gmail.com with ESMTPSA id fg16-20020a1709069c5000b006fec27575f1sm4830767ejc.123.2022.07.13.04.06.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Jul 2022 04:06:18 -0700 (PDT) From: Michael Trimarchi To: linux-amarula@amarulasolutions.com, Dario Binacchi , Tommaso Merciai Subject: [PATCH V2 1/4] mtd: nand: Drop busw variable and use chip->options field Date: Wed, 13 Jul 2022 13:06:13 +0200 Message-Id: <20220713110616.305444-1-michael@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="JZ/0KeUY"; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , No functional change. Reduce the function parameters in preparation of support specific nand manufacture Signed-off-by: Michael Trimarchi --- V1->V2: - reset the prefix as suggested by Dario - only drop busw assigment in find_full_id_nand --- drivers/mtd/nand/raw/nand_base.c | 60 +++++++++++++++++++------------- 1 file changed, 35 insertions(+), 25 deletions(-) diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 6f81257cf1..0f45fe676f 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -3890,8 +3890,7 @@ static void nand_onfi_detect_micron(struct nand_chip *chip, /* * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise. */ -static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, - int *busw) +static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip) { struct nand_onfi_params *p = &chip->onfi_params; char id[4]; @@ -3963,9 +3962,9 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, chip->bits_per_cell = p->bits_per_cell; if (onfi_feature(chip) & ONFI_FEATURE_16_BIT_BUS) - *busw = NAND_BUSWIDTH_16; + chip->options |= NAND_BUSWIDTH_16; else - *busw = 0; + chip->options &= ~NAND_BUSWIDTH_16; if (p->ecc_bits != 0xff) { chip->ecc_strength_ds = p->ecc_bits; @@ -3995,8 +3994,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, return 1; } #else -static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, - int *busw) +static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip) { return 0; } @@ -4005,8 +4003,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, /* * Check if the NAND chip is JEDEC compliant, returns 1 if it is, 0 otherwise. */ -static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip, - int *busw) +static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip) { struct nand_jedec_params *p = &chip->jedec_params; struct jedec_ecc_info *ecc; @@ -4068,9 +4065,9 @@ static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip, chip->bits_per_cell = p->bits_per_cell; if (jedec_feature(chip) & JEDEC_FEATURE_16_BIT_BUS) - *busw = NAND_BUSWIDTH_16; + chip->options |= NAND_BUSWIDTH_16; else - *busw = 0; + chip->options &= ~NAND_BUSWIDTH_16; /* ECC info */ ecc = &p->ecc_info[0]; @@ -4160,7 +4157,7 @@ static int nand_get_bits_per_cell(u8 cellinfo) * manufacturer-specific "extended ID" decoding patterns. */ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, - u8 id_data[8], int *busw) + u8 id_data[8]) { int extid, id_len; /* The 3rd id byte holds MLC / multichip data */ @@ -4213,7 +4210,7 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, /* Calc blocksize */ mtd->erasesize = (128 * 1024) << (((extid >> 1) & 0x04) | (extid & 0x03)); - *busw = 0; + chip->options &= ~NAND_BUSWIDTH_16; } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX && !nand_is_slc(chip)) { unsigned int tmp; @@ -4254,7 +4251,7 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, mtd->erasesize = 768 * 1024; else mtd->erasesize = (64 * 1024) << tmp; - *busw = 0; + chip->options &= ~NAND_BUSWIDTH_16; } else { /* Calc pagesize */ mtd->writesize = 1024 << (extid & 0x03); @@ -4267,7 +4264,7 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, mtd->erasesize = (64 * 1024) << (extid & 0x03); extid >>= 2; /* Get buswidth information */ - *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; + chip->options |= (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; /* * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per @@ -4293,15 +4290,14 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, * the chip. */ static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip, - struct nand_flash_dev *type, u8 id_data[8], - int *busw) + struct nand_flash_dev *type, u8 id_data[8]) { int maf_id = id_data[0]; mtd->erasesize = type->erasesize; mtd->writesize = type->pagesize; mtd->oobsize = mtd->writesize / 32; - *busw = type->options & NAND_BUSWIDTH_16; + chip->options |= (type->options & NAND_BUSWIDTH_16) ? NAND_BUSWIDTH_16 : 0; /* All legacy ID NAND are small-page, SLC */ chip->bits_per_cell = 1; @@ -4363,7 +4359,7 @@ static inline bool is_full_id_nand(struct nand_flash_dev *type) } static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip, - struct nand_flash_dev *type, u8 *id_data, int *busw) + struct nand_flash_dev *type, u8 *id_data) { if (!strncmp((char *)type->id, (char *)id_data, type->id_len)) { mtd->writesize = type->pagesize; @@ -4378,8 +4374,6 @@ static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip, chip->onfi_timing_mode_default = type->onfi_timing_mode_default; - *busw = type->options & NAND_BUSWIDTH_16; - if (!mtd->name) mtd->name = type->name; @@ -4441,9 +4435,24 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, if (!type) type = nand_flash_ids; + /* + * Save the NAND_BUSWIDTH_16 flag before letting auto-detection logic + * override it. + * This is required to make sure initial NAND bus width set by the + * NAND controller driver is coherent with the real NAND bus width + * (extracted by auto-detection code). + */ + busw = chip->options & NAND_BUSWIDTH_16; + + /* + * The flag is only set (never cleared), reset it to its default value + * before starting auto-detection. + */ + chip->options &= ~NAND_BUSWIDTH_16; + for (; type->name != NULL; type++) { if (is_full_id_nand(type)) { - if (find_full_id_nand(mtd, chip, type, id_data, &busw)) + if (find_full_id_nand(mtd, chip, type, id_data)) goto ident_done; } else if (*dev_id == type->dev_id) { break; @@ -4453,11 +4462,11 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, chip->onfi_version = 0; if (!type->name || !type->pagesize) { /* Check if the chip is ONFI compliant */ - if (nand_flash_detect_onfi(mtd, chip, &busw)) + if (nand_flash_detect_onfi(mtd, chip)) goto ident_done; /* Check if the chip is JEDEC compliant */ - if (nand_flash_detect_jedec(mtd, chip, &busw)) + if (nand_flash_detect_jedec(mtd, chip)) goto ident_done; } @@ -4471,10 +4480,11 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, if (!type->pagesize) { /* Decode parameters from extended ID */ - nand_decode_ext_id(mtd, chip, id_data, &busw); + nand_decode_ext_id(mtd, chip, id_data); } else { - nand_decode_id(mtd, chip, type, id_data, &busw); + nand_decode_id(mtd, chip, type, id_data); } + /* Get chip options */ chip->options |= type->options; From patchwork Wed Jul 13 11:06:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Nazzareno Trimarchi X-Patchwork-Id: 2129 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f69.google.com (mail-ed1-f69.google.com [209.85.208.69]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id AB5863F066 for ; Wed, 13 Jul 2022 13:06:23 +0200 (CEST) Received: by mail-ed1-f69.google.com with SMTP id i9-20020a05640242c900b0043aeffc5cf1sf3052000edc.18 for ; Wed, 13 Jul 2022 04:06:23 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1657710383; cv=pass; d=google.com; s=arc-20160816; b=pojEc/dgAl1QJIFoP6bi9CPsfcxEdKxr4q9PaitZDGxmVunhL5j7UYojvL/KEPO/5M G5cd4ZHzKB75nCqQoiZ4cBQZ2uusSXhWd02kPurdY25YaFoUTGoH2FdZAg0ur8yYB+rM ZH6Xhid+oOGCqSNJ3rk+OTTKmEzK2BgpaFwGW/rf1tjJGzEgDJYs2+nbcst8dm8hcxI1 sPwlguT3dSuUAdrn/zQlI24pwnldWgOGHWk3pI/dz6zuwl7IHju7hwGq20QO7EoG3rCA FuiaLtNP98jrleh6HASmxUDGE5PS06fP9yXiLX+wt9xgylnnH+qb4fJH3kTpygryfzze KLHw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=brsw+ljoGUeQHRmimzC3/3m7iGXz3ZgKhHapPUWWizs=; b=HNXDZn4krAFkrU/L8+JGMbY0GsbA3qKuuf5UlhAo2O6mZdzxtfm4n7n25O3wKo4u0e qldhQwEbwRhqlZzR4bqA8v5CTs96cbDVEiwlAo+fZoIK8wNkBbT53pu3H7j1KjACELQW DzAnP9A9HcmraqBsJomaEWelMVYL1YqbivFNHC1qW7WwNwwlJxK0HthCB6vMy3OooySg xzX1iezE+Y2JO1fziDZFsPL6wMYWA6iwREPd1B8oi80HQD5diDYK8LSs5HnP13g44P0c TTZL8VB5XvYmQ0xpzdVvH9P+mfMgMYiLCj2yCibkkJjOglixgbtKw8xI7KEkknwsjIFT h/mA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=obJ9I6n7; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :x-original-sender:x-original-authentication-results:precedence :mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=brsw+ljoGUeQHRmimzC3/3m7iGXz3ZgKhHapPUWWizs=; b=oGs4CnI5IvWRXdQlerblfNB4SV7OKz0oOeIGmszo5fSyoDvyp/UNg6hK0Z4TVU8KHG JX2uf7z4nd0hV+5hkw2WZxgy5z4JsS7oXwPQAVSFj8WzrXLpkRKYObntIP05ttPD13Le 6hM/sT9K0dCT7tK3gE9XowIgCr1DhgXJGXXJs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=brsw+ljoGUeQHRmimzC3/3m7iGXz3ZgKhHapPUWWizs=; b=FNJRo6o2h97ijAVfPy7XDAOMuc+iTvnrN7ZXgydWxQwWEqCb5nvwMGFmrODb0ii79t lhhvOOJg3ZAnzgy9gLA4oE2Bt1B6md1byRHezXAsDkTN+m/hfesGuR4RNuDJHSMJgtA0 C0dsAefRUeUqd1YKVpSVtH7r5xTB6abAut5KJGTmcv64SKiBPZukFQ3Qf0iRbepbi58u M649TCJ5q4FBEFWb7MABrUdOrystxGr3ULC3utHSTtEMg4Yn8kh8u10lzVH7IzSPIJLE Jgw1IpAw/BdXCMjQc3cnsWg0m5MN6aaFDZZZGrWdL++aNgSIUp+LxqUVpmGItqFrV9id VpHg== X-Gm-Message-State: AJIora8m/0gJLg72JqjS6hQOKmwzfmWk4yaa4O9vpD3Ny8mW9GpVvEFk +pe1Zadsa/R7C5859Qtwf/A2nNon X-Google-Smtp-Source: AGRyM1uQHTGP82QD0I6NN6zcFwy1TNWXt9jVcejVHM9y/s0BWK5MXw1/2K78UsV0tVHey4XQoseNtg== X-Received: by 2002:a17:907:160a:b0:72b:51e0:d90b with SMTP id hb10-20020a170907160a00b0072b51e0d90bmr2729787ejc.609.1657710383508; Wed, 13 Jul 2022 04:06:23 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:906:95c1:b0:6ff:45d:c05d with SMTP id n1-20020a17090695c100b006ff045dc05dls2832042ejy.5.gmail; Wed, 13 Jul 2022 04:06:22 -0700 (PDT) X-Received: by 2002:a17:906:29d:b0:6f0:18d8:7be0 with SMTP id 29-20020a170906029d00b006f018d87be0mr2762860ejf.561.1657710382125; Wed, 13 Jul 2022 04:06:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1657710382; cv=none; d=google.com; s=arc-20160816; b=cUTUG8FThznlsFNMGcCf9p+MkAOEU8pszwjWk67c9aDhe7dfi0U/U/lZ/gPnLyMomN wTttwG6WsgPAQ4qsfqqIDGXEqb1RB1XUlYCseM04RMA4lBGOj8m5qNnUtMhlI38SATMx ZbJd+xns4VrDyHZZ66Q1GJmsxI/BJI9EPg6P1c6yyNZtr8QG8ZfsCcEeAl9o/HDT2ja8 fA/vzEOxbZdvQwIpk31kvp9mJIhmy0yVcC/x8oQYD4P+EIfM8y+9sryk8ztncxfhIeF5 dhC+7lpn+j9O7Og6pc2uqvBQhkEzzl0IlzPMN7saW43XQrDdQYJJs6SHQ314Y/fEJ0cw kiuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=NEQ4T0nvxUUcLMTu5uklxCBhhYPI8Ayr6eGwfWsWU3E=; b=AlPYJJXTbUuPalAjlB27VwEtT/CsGMbin8NcQV6Sf3Bj6GINHots6BL1hiobQRnuoB FfeiUvBlbwz6HQr5fdVi1nlB1SGmhZrBcwgq+ZO9COBRQmqy2Pz9DD++geHuzA72crrg WAJdOmNAKp5AGcI83xYqhlkpAdHhRuIu4Liu1enuItqmGJsBK4vSgh2FsYPM7cL62aHo RI07DKU9lIERXm9x35wkAynyehRNBsi4jTgggersq0OENJNMVTdHDrLfh1D6++lG5x6U lZM0OigIiU819oU/Kc6UHcRjjWth5j66sUsJVL1cPZc0hUAGHFq3U4n9aCkERy+jok4F VpAw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=obJ9I6n7; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id z12-20020a509e0c000000b0043abde1dcbasor5201396ede.52.2022.07.13.04.06.22 for (Google Transport Security); Wed, 13 Jul 2022 04:06:22 -0700 (PDT) Received-SPF: pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a05:6402:2395:b0:43a:6d91:106c with SMTP id j21-20020a056402239500b0043a6d91106cmr4079397eda.299.1657710381424; Wed, 13 Jul 2022 04:06:21 -0700 (PDT) Received: from panicking.amarulasolutions.com ([2.198.242.86]) by smtp.gmail.com with ESMTPSA id fg16-20020a1709069c5000b006fec27575f1sm4830767ejc.123.2022.07.13.04.06.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Jul 2022 04:06:20 -0700 (PDT) From: Michael Trimarchi To: linux-amarula@amarulasolutions.com, Dario Binacchi , Tommaso Merciai Subject: [PATCH V2 2/4] mtd: nand: Store nand ID in struct nand_chip Date: Wed, 13 Jul 2022 13:06:14 +0200 Message-Id: <20220713110616.305444-2-michael@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220713110616.305444-1-michael@amarulasolutions.com> References: <20220713110616.305444-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=obJ9I6n7; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Upstream commit 7f501f0a72036dc29ad9a53811474c393634b401 Store the NAND ID in struct nand_chip to avoid passing id_data and id_len as function parameters. Signed-off-by: Boris Brezillon Acked-by: Richard Weinberger Reviewed-by: Marek Vasut Signed-off-by: Michael Trimarchi --- drivers/mtd/nand/raw/nand_base.c | 54 ++++++++++++++++---------------- include/linux/mtd/rawnand.h | 15 +++++++++ 2 files changed, 42 insertions(+), 27 deletions(-) diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 0f45fe676f..0c0e4fbb6d 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4156,16 +4156,14 @@ static int nand_get_bits_per_cell(u8 cellinfo) * chip. The rest of the parameters must be decoded according to generic or * manufacturer-specific "extended ID" decoding patterns. */ -static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, - u8 id_data[8]) +static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip) { int extid, id_len; /* The 3rd id byte holds MLC / multichip data */ - chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); + chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]); /* The 4th id byte is the important one */ - extid = id_data[3]; - - id_len = nand_id_len(id_data, 8); + extid = chip->id.data[3]; + id_len = chip->id.len; /* * Field definitions are in the following datasheets: @@ -4176,8 +4174,8 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung * ID to decide what to do. */ - if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG && - !nand_is_slc(chip) && id_data[5] != 0x00) { + if (id_len == 6 && chip->id.data[0] == NAND_MFR_SAMSUNG && + !nand_is_slc(chip) && chip->id.data[5] != 0x00) { /* Calc pagesize */ mtd->writesize = 2048 << (extid & 0x03); extid >>= 2; @@ -4211,7 +4209,7 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, mtd->erasesize = (128 * 1024) << (((extid >> 1) & 0x04) | (extid & 0x03)); chip->options &= ~NAND_BUSWIDTH_16; - } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX && + } else if (id_len == 6 && chip->id.data[0] == NAND_MFR_HYNIX && !nand_is_slc(chip)) { unsigned int tmp; @@ -4274,10 +4272,10 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, * 110b -> 24nm * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC */ - if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA && + if (id_len >= 6 && chip->id.data[0] == NAND_MFR_TOSHIBA && nand_is_slc(chip) && - (id_data[5] & 0x7) == 0x6 /* 24nm */ && - !(id_data[4] & 0x80) /* !BENAND */) { + (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ && + !(chip->id.data[4] & 0x80) /* !BENAND */) { mtd->oobsize = 32 * mtd->writesize >> 9; } @@ -4290,9 +4288,9 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, * the chip. */ static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip, - struct nand_flash_dev *type, u8 id_data[8]) + struct nand_flash_dev *type) { - int maf_id = id_data[0]; + int maf_id = chip->id.data[0]; mtd->erasesize = type->erasesize; mtd->writesize = type->pagesize; @@ -4308,11 +4306,11 @@ static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip, * listed in nand_ids table. * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39) */ - if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00 - && id_data[6] == 0x00 && id_data[7] == 0x00 + if (maf_id == NAND_MFR_AMD && chip->id.data[4] != 0x00 && chip->id.data[5] == 0x00 + && chip->id.data[6] == 0x00 && chip->id.data[7] == 0x00 && mtd->writesize == 512) { mtd->erasesize = 128 * 1024; - mtd->erasesize <<= ((id_data[3] & 0x03) << 1); + mtd->erasesize <<= ((chip->id.data[3] & 0x03) << 1); } } @@ -4322,9 +4320,9 @@ static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip, * page size, cell-type information). */ static void nand_decode_bbm_options(struct mtd_info *mtd, - struct nand_chip *chip, u8 id_data[8]) + struct nand_chip *chip) { - int maf_id = id_data[0]; + int maf_id = chip->id.data[0]; /* Set the bad block position */ if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16)) @@ -4359,14 +4357,14 @@ static inline bool is_full_id_nand(struct nand_flash_dev *type) } static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip, - struct nand_flash_dev *type, u8 *id_data) + struct nand_flash_dev *type) { - if (!strncmp((char *)type->id, (char *)id_data, type->id_len)) { + if (!strncmp((char *)type->id, (char *)chip->id.data, type->id_len)) { mtd->writesize = type->pagesize; mtd->erasesize = type->erasesize; mtd->oobsize = type->oobsize; - chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); + chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]); chip->chipsize = (uint64_t)type->chipsize << 20; chip->options |= type->options; chip->ecc_strength_ds = NAND_ECC_STRENGTH(type); @@ -4392,7 +4390,7 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, { int busw, ret; int maf_idx; - u8 id_data[8]; + u8 *id_data = chip->id.data; /* * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) @@ -4450,9 +4448,11 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, */ chip->options &= ~NAND_BUSWIDTH_16; + chip->id.len = nand_id_len(id_data, ARRAY_SIZE(chip->id.data)); + for (; type->name != NULL; type++) { if (is_full_id_nand(type)) { - if (find_full_id_nand(mtd, chip, type, id_data)) + if (find_full_id_nand(mtd, chip, type)) goto ident_done; } else if (*dev_id == type->dev_id) { break; @@ -4480,9 +4480,9 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, if (!type->pagesize) { /* Decode parameters from extended ID */ - nand_decode_ext_id(mtd, chip, id_data); + nand_decode_ext_id(mtd, chip); } else { - nand_decode_id(mtd, chip, type, id_data); + nand_decode_id(mtd, chip, type); } /* Get chip options */ @@ -4520,7 +4520,7 @@ ident_done: return ERR_PTR(-EINVAL); } - nand_decode_bbm_options(mtd, chip, id_data); + nand_decode_bbm_options(mtd, chip); /* Calculate the address shift from the page size */ chip->page_shift = ffs(mtd->writesize) - 1; diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 3417ca2a0d..f2c6a978cb 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -507,6 +507,19 @@ static inline void nand_hw_control_init(struct nand_hw_control *nfc) init_waitqueue_head(&nfc->wq); } +/* The maximum expected count of bytes in the NAND ID sequence */ +#define NAND_MAX_ID_LEN 8 + +/** + * struct nand_id - NAND id structure + * @data: buffer containing the id bytes. + * @len: ID length. + */ +struct nand_id { + u8 data[NAND_MAX_ID_LEN]; + int len; +}; + /** * struct nand_ecc_step_info - ECC step information of ECC engine * @stepsize: data bytes per ECC step @@ -888,6 +901,8 @@ nand_get_sdr_timings(const struct nand_data_interface *conf) struct nand_chip { struct mtd_info mtd; + struct nand_id id; + void __iomem *IO_ADDR_R; void __iomem *IO_ADDR_W; From patchwork Wed Jul 13 11:06:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Nazzareno Trimarchi X-Patchwork-Id: 2130 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f69.google.com (mail-ed1-f69.google.com [209.85.208.69]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 9934D3F066 for ; Wed, 13 Jul 2022 13:06:25 +0200 (CEST) Received: by mail-ed1-f69.google.com with SMTP id f13-20020a0564021e8d00b00437a2acb543sf8073074edf.7 for ; Wed, 13 Jul 2022 04:06:25 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1657710385; cv=pass; d=google.com; s=arc-20160816; b=0c/t806NQLDJw5pHaBI+1y8z7ms1Fcy9Db3YnVzaFigWgjwTX3KxPkRQ0AzsAH37x5 3zPqfYJUgpr9QiKzGlDi4xod/qkYwU5sOIwhQoIB5cSj7OEWxvK8DBdkDKxTR3vFH8xD j3eCiKLwoB/DYzyGFYGioLmINHR1e33cNukC2VSG2R8ovMHpI9hmUGzbDCUXODN9ARqN 396vlDHzGFuy62qxEE7/hvHvM0pbMurOjYKnLxOM6PsSiCmwh/wGR0VW6a3Pj/grwTbx Z4neAbAJ8d/K4rUVt0MT74fmqNooRZ4vt6XBypidIm6C+CAajkusetuRCfZ86UXT1d5k r/hQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=b1IHRYnDEyvn3k/n6sa6jiCIYOI8teZsswOQj2t8xNI=; b=RgYF9Qj66beU2voVDHDqU/1M3J0MXJ25mdfuKxXVkGtd0MW0vxRz3KA5nOgUApAD1w F9s78X9H3+e2dFg5CKYuNsxPRt2txAnmnhmDmfpBPPlqQJjeb/Wsh+9UHwlJWz47yumq 9l/6Y+SbAtspOqbZ4IOF/BLxmwgOcdRrhmm80kWxGzMiHGIsBrlfMv0NjcjOnsnlq5x9 4kseb8srhXu8u+ydlb/lH67VmwIfdlEb6ox65ozb5t0vQKzqKe/9otqm000nEPWbACan zgq32VYxqkVgPsjnyBuWJ4rUOBgpXmV+O5Mbqt+OxIklq2wy9L3eH5A8QEHPEcU5jxPy yhVw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=FS5wJehs; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :x-original-sender:x-original-authentication-results:precedence :mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=b1IHRYnDEyvn3k/n6sa6jiCIYOI8teZsswOQj2t8xNI=; b=XAS1ZRiBqApwv7GHnHpRb66418QjKMFJyGKRBUJDcllJD0gxUqeU2TvubgAd7Df0Sd 5sBhxGsMxpr5ig6gQaIDu6OlmqjabZD/fqGci4I6LnkNF1gKNM4I9Mt0/HrLOTL2MUDF bFErigaAE82/cPj9OOi3eQCc/qI9IkTzolw9w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=b1IHRYnDEyvn3k/n6sa6jiCIYOI8teZsswOQj2t8xNI=; b=7j38u52EyJCB0YVOazrBrw4J7gGW6d2PQnxSS/uTUdvnsATdSDlR814srZyNAD34al R2po7SxSjKSsH5RGLnYyYg+qn3qKPRYQK+f+Qkn4zljXYZs3SwDHLg8iaUeogaWwWg2P 6BSXIq3vcn+yv/HBEeSDl2svtwpOIsFAvI6w0LH6VM2YBfasXANvSSaFmirL5EwwYxoi /4F/bUpZFEbnRmuGDDvOKmpR1B+qUVuhcLrgSUBA+sz45mpiUEZgfC+6dSygY4m6KaMd OFFV7kgVP/GVXWiJiWbMUgHP/GnfbT68uW+To5Ynt7HO0Zwo0q9z2VGaXxMtZZ953ya7 tg0g== X-Gm-Message-State: AJIora/+4kCMB5S52R2G3d2fOOOfguoOrb6+WOAtLLoK+440TDWCBrsr HDAcXEVhKBQm8dfuGPlS0VV5mV6K X-Google-Smtp-Source: AGRyM1sav66f3dsuY7tfBlnnPYMPS4MrM4QAnErq3DbKvW7PToyUxWYkVskA4LUQMQqwF8l5p0VvsA== X-Received: by 2002:a17:907:2c68:b0:72b:3a2c:e5b5 with SMTP id ib8-20020a1709072c6800b0072b3a2ce5b5mr2806520ejc.619.1657710385408; Wed, 13 Jul 2022 04:06:25 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:907:1c0d:b0:72b:7c6f:2e73 with SMTP id nc13-20020a1709071c0d00b0072b7c6f2e73ls2593851ejc.9.gmail; Wed, 13 Jul 2022 04:06:24 -0700 (PDT) X-Received: by 2002:a17:907:6287:b0:6e1:6ac:c769 with SMTP id nd7-20020a170907628700b006e106acc769mr2944835ejc.388.1657710383978; Wed, 13 Jul 2022 04:06:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1657710383; cv=none; d=google.com; s=arc-20160816; b=GlnFXvitngf4IL9Q2auFYHAgxkZAtJw4bkAhJRh6MupzYciA01xjgumjDb0zVdr6Pf aP3mwEhH8WT4AqaOPTco+RBrI31wZpMUQ4fBf+JBor+XdinbTwiz2RIVP6vAOcm53rO8 vFYa3hSmy7rtny+7l0Npl5Vpan9jbg0ln956uuMMNv7kVVx08td00b2TpDHkwtKJ//6d ZkiMh2kzDWj7/9Lv+qn1wDvOPSjZIwwGZnD9bdN7OvMj4VAKv60H6p0i3LEiP1JQJqf9 y+ZeUS9GPeXkoe/4JKqgZupyybVDaoabHDkG/0iEs7lInwVuUZaUq698Uww+o4uu33y7 kkCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=3zfc72Q9ZPrMWX2d8HLpfnVU/ABDFmB8Hclz+8wfWmc=; b=N3vpOCMjBRnECma0ZzacPO8NHECHX6cVLu8Sr52S65UA46DJmRlBA006uONRS8BD8S IDxJ/W48ptPSv2RcdV5QCtP5ElwWP0l+D1XOMQoCjVuqfrpu6nHFGAWAW7UEHHTmKIeC 8BtDf1YC1Y8z7JaBiU8mplmkrHp+hUXoQqvdX5xvfx64x8PDF73OI0nw8+I0RvluBXM/ Rpx6Eg9nyl9NKVFGnaLzu65WtwZwUiBGrJdBn9YDBdwYeOqCAJIDI5iwbdWgwf4L6Ti8 2d9//WTBOFY88+F4B180KpFfa0DEj1OlAWGs0Rxdv6lHOftUFDDQQLDO/pL3DYAurHSc nYOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=FS5wJehs; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id h4-20020a50c384000000b0043573b35f10sor5123171edf.64.2022.07.13.04.06.23 for (Google Transport Security); Wed, 13 Jul 2022 04:06:23 -0700 (PDT) Received-SPF: pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a05:6402:2cd:b0:43a:70f7:1af2 with SMTP id b13-20020a05640202cd00b0043a70f71af2mr3982587edx.357.1657710383211; Wed, 13 Jul 2022 04:06:23 -0700 (PDT) Received: from panicking.amarulasolutions.com ([2.198.242.86]) by smtp.gmail.com with ESMTPSA id fg16-20020a1709069c5000b006fec27575f1sm4830767ejc.123.2022.07.13.04.06.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Jul 2022 04:06:22 -0700 (PDT) From: Michael Trimarchi To: linux-amarula@amarulasolutions.com, Dario Binacchi , Tommaso Merciai Subject: [PATCH V2 3/4] mtd: nand: Add manufacturer specific initialization/detection steps Date: Wed, 13 Jul 2022 13:06:15 +0200 Message-Id: <20220713110616.305444-3-michael@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220713110616.305444-1-michael@amarulasolutions.com> References: <20220713110616.305444-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=FS5wJehs; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Upstream commit abbe26d144ec22bb067fa414d717b9f7ca2e12bd A lot of NANDs are implementing generic features in a non-generic way, or are providing advanced auto-detection logic where the NAND ID bytes meaning changes with the NAND generation. Providing this vendor specific initialization step will allow us to get rid of full-id entries in the nand_ids table or all the vendor specific cases added over the time in the generic NAND ID decoding logic. Signed-off-by: Boris Brezillon Signed-off-by: Michael Trimarchi --- drivers/mtd/nand/raw/nand_base.c | 86 ++++++++++++++++++++++++++------ include/linux/mtd/rawnand.h | 30 +++++++++++ 2 files changed, 100 insertions(+), 16 deletions(-) diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 0c0e4fbb6d..d58451196c 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4282,6 +4282,39 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip) } } +/* + * Manufacturer detection. Only used when the NAND is not ONFI or JEDEC + * compliant and does not have a full-id or legacy-id entry in the nand_ids + * table. + */ +static void nand_manufacturer_detect(struct mtd_info *mtd, struct nand_chip *chip) +{ + /* + * Try manufacturer detection if available and use + * nand_decode_ext_id() otherwise. + */ + if (chip->manufacturer.desc && chip->manufacturer.desc->ops && + chip->manufacturer.desc->ops->detect) + chip->manufacturer.desc->ops->detect(chip); + else + nand_decode_ext_id(mtd, chip); +} + +/* + * Manufacturer initialization. This function is called for all NANDs including + * ONFI and JEDEC compliant ones. + * Manufacturer drivers should put all their specific initialization code in + * their ->init() hook. + */ +static int nand_manufacturer_init(struct nand_chip *chip) +{ + if (!chip->manufacturer.desc || !chip->manufacturer.desc->ops || + !chip->manufacturer.desc->ops->init) + return 0; + + return chip->manufacturer.desc->ops->init(chip); +} + /* * Old devices have chip data hardcoded in the device ID table. nand_decode_id * decodes a matching ID table entry and assigns the MTD size parameters for @@ -4380,6 +4413,26 @@ static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip, return false; } +/** + * nand_get_manufacturer_desc - Get manufacturer information from the + * manufacturer ID + * @id: manufacturer ID + * + * Returns a nand_manufacturer_desc object if the manufacturer is defined + * in the NAND manufacturers database, NULL otherwise. + */ +static const struct nand_manufacturers *nand_get_manufacturer_desc(u8 id) +{ + int i; + + for (i = 0; nand_manuf_ids[i].id != 0x0; i++) { + if (nand_manuf_ids[i].id == id) + return &nand_manuf_ids[i]; + } + + return NULL; +} + /* * Get the flash and manufacturer id and lookup if the type is supported. */ @@ -4388,8 +4441,8 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, int *maf_id, int *dev_id, struct nand_flash_dev *type) { + const struct nand_manufacturers *manufacturer_desc; int busw, ret; - int maf_idx; u8 *id_data = chip->id.data; /* @@ -4450,6 +4503,10 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, chip->id.len = nand_id_len(id_data, ARRAY_SIZE(chip->id.data)); + /* Try to identify manufacturer */ + manufacturer_desc = nand_get_manufacturer_desc(*maf_id); + chip->manufacturer.desc = manufacturer_desc; + for (; type->name != NULL; type++) { if (is_full_id_nand(type)) { if (find_full_id_nand(mtd, chip, type)) @@ -4479,8 +4536,7 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, chip->chipsize = (uint64_t)type->chipsize << 20; if (!type->pagesize) { - /* Decode parameters from extended ID */ - nand_decode_ext_id(mtd, chip); + nand_manufacturer_detect(mtd, chip); } else { nand_decode_id(mtd, chip, type); } @@ -4496,12 +4552,6 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; ident_done: - /* Try to identify manufacturer */ - for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) { - if (nand_manuf_ids[maf_idx].id == *maf_id) - break; - } - if (chip->options & NAND_BUSWIDTH_AUTO) { WARN_ON(chip->options & NAND_BUSWIDTH_16); chip->options |= busw; @@ -4513,7 +4563,7 @@ ident_done: */ pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n", *maf_id, *dev_id); - pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, mtd->name); + pr_info("%s %s\n", manufacturer_desc->name, mtd->name); pr_warn("bus width %d instead %d bit\n", (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, busw ? 16 : 8); @@ -4546,28 +4596,32 @@ ident_done: if (mtd->writesize > 512 && chip->cmdfunc == nand_command) chip->cmdfunc = nand_command_lp; + ret = nand_manufacturer_init(chip); + if (ret) + return ERR_PTR(ret); + pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n", *maf_id, *dev_id); #ifdef CONFIG_SYS_NAND_ONFI_DETECTION if (chip->onfi_version) - pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, + pr_info("%s %s\n", manufacturer_desc->name, chip->onfi_params.model); else if (chip->jedec_version) - pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, + pr_info("%s %s\n", manufacturer_desc->name, chip->jedec_params.model); else - pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, + pr_info("%s %s\n", manufacturer_desc->name, type->name); #else if (chip->jedec_version) - pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, + pr_info("%s %s\n", manufacturer_desc->name, chip->jedec_params.model); else - pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, + pr_info("%s %s\n", manufacturer_desc->name, type->name); - pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, + pr_info("%s %s\n", manufacturer_desc->name, type->name); #endif diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index f2c6a978cb..57fe7fb47b 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -796,6 +796,17 @@ nand_get_sdr_timings(const struct nand_data_interface *conf) return &conf->timings.sdr; } +/** + * struct nand_manufacturer_ops - NAND Manufacturer operations + * @detect: detect the NAND memory organization and capabilities + * @init: initialize all vendor specific fields (like the ->read_retry() + * implementation) if any. + */ +struct nand_manufacturer_ops { + void (*detect)(struct nand_chip *chip); + int (*init)(struct nand_chip *chip); +}; + /** * struct nand_chip - NAND Private Flash Chip Data * @mtd: MTD device registered to the MTD framework @@ -897,6 +908,7 @@ nand_get_sdr_timings(const struct nand_data_interface *conf) * devices. * @priv: [OPTIONAL] pointer to private chip data * @write_page: [REPLACEABLE] High-level page write function + * @manufacturer: [INTERN] Contains manufacturer information */ struct nand_chip { @@ -983,6 +995,11 @@ struct nand_chip { struct nand_bbt_descr *badblock_pattern; void *priv; + + struct { + const struct nand_manufacturers *desc; + void *priv; + } manufacturer; }; static inline void nand_set_flash_node(struct nand_chip *chip, @@ -1016,6 +1033,17 @@ static inline void nand_set_controller_data(struct nand_chip *chip, void *priv) chip->priv = priv; } +static inline void nand_set_manufacturer_data(struct nand_chip *chip, + void *priv) +{ + chip->manufacturer.priv = priv; +} + +static inline void *nand_get_manufacturer_data(struct nand_chip *chip) +{ + return chip->manufacturer.priv; +} + /* * NAND Flash Manufacturer ID Codes */ @@ -1120,10 +1148,12 @@ struct nand_flash_dev { * struct nand_manufacturers - NAND Flash Manufacturer ID Structure * @name: Manufacturer name * @id: manufacturer ID code of device. + * @ops: manufacturer operations */ struct nand_manufacturers { int id; char *name; + const struct nand_manufacturer_ops *ops; }; extern struct nand_flash_dev nand_flash_ids[]; From patchwork Wed Jul 13 11:06:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Nazzareno Trimarchi X-Patchwork-Id: 2131 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f70.google.com (mail-ed1-f70.google.com [209.85.208.70]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 2CB8F3F066 for ; Wed, 13 Jul 2022 13:06:27 +0200 (CEST) Received: by mail-ed1-f70.google.com with SMTP id b15-20020a056402278f00b0043acaf76f8dsf6750477ede.21 for ; Wed, 13 Jul 2022 04:06:27 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1657710387; cv=pass; d=google.com; s=arc-20160816; b=s221L0KXZngD/lhCuhStjhUK8HLhFDyo00Ls27eiICSdU8pTL322xE/joKZeJHq64X RqSNX1SK4dryyVn7bcOl5mlquA7YYEiDySGHLJCEAXBgk78OYiq+k7AafV9NlEsOFVnA J8nRxPZ8oh7cIQTNH2t+ts53bSSDhUY4WFAY2o7zTl9W2Ysz/pcjzvjoLu4Ee3tGNt5L fuZ5NtZ79qZxxG50OTmBBPx20xhf2rFcN1WTlAPXo29pTHaPuNQV0rMRE+pCnIAlfnGc yFFZoyRt5tr1/hQQb/9eUnvI3XDBUMEoaT6ROoS8J4ATcc1/dtcYX5T7BCDNiDO9C3DD GVwQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=Ub9GlIAwsfk/NXblOfvbR+CjNnnC6msfiCklC7i6EF8=; b=qehiIF4zJF5Ok7f9H/NBB6RkyvehO5AyLfzvIHw/MzKQ/JjF3jiS0XdbgqmWDmJTmm 9+PODaK8O3CEj3Fni08oxrAh3L+4bdy0rWxApeHMkdGcWLFTbdAB7leBwfj6JrUy0xDC VfsylR4QzhrIqCiHD+6Q9u6XwvrEUECyZMDvBu6HmayAbjbzQPi7txCLpeRJk4bdmbqq 61EuFpvnzPGcmfNyVOAQ1CgThkpejZ2HxPclelRqVCeUsX4plcRs6tbzRm4awWm5ig9o hLI9FFulVfE4Q6B/pnza874/PfsS3E4NYgy54ZKMiTOl5bmvhTOnX8Rhd1uxN1DI+BO2 8z3w== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=qmQSSeao; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :x-original-sender:x-original-authentication-results:precedence :mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=Ub9GlIAwsfk/NXblOfvbR+CjNnnC6msfiCklC7i6EF8=; b=Z8D855fjzLYUKzhF+wyvmYY/eRJOB+ofCtcmO0OZOrsxhtExEoQBQUER0JY3nY74C1 YoIByq8r98F+cc1WfU3UDOBi6RxoHXGE43/g7UQvVcbfCsNjiMv8/nDq/oGlWzYAG+S+ 3m5WdqOickbyR7KkevpZEaHNkEJEXaGcKek5k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=Ub9GlIAwsfk/NXblOfvbR+CjNnnC6msfiCklC7i6EF8=; b=lko5JutATJKq5aTswc+sHALF+kdi06F1sSZfXrVFKcaL5ME+jIhfJG3mdtoVW0IQg3 lXYGA1dfca+Q9MtpK0ptjgpaVseMPoYGZVHKrt99elwtCBhTVIlgC6lvQDK5c/Jqei3h BUQa8YXmA48srI7jtpkcC3PkCgd37kBspoHivCdywYSoHzPO3tmZhuCkstrzCNN8iv3I uQP8RCwFPeeTC3WGSYlraQdEinCKJfG2TSVxp+0uqdrh3oGafNAD4Uwq+2iIWTkSZzCg 1bTVlnUuZWxexF+LCTz43HtarIziNDHa+69XR5Kw68GGomj+Xn2zKR/MSGHO+Jd/soPZ CyDg== X-Gm-Message-State: AJIora/+Q7DOpseg63iVqJtvtFAO98CpLdRSt794vK9TpvUrMlfmJQ+B x+DpquTWPo8KtznVd+9uf4wCBK3X X-Google-Smtp-Source: AGRyM1tPDRsHbzPtfxgquMyApEn9SIiQnAKLQfes9edS7JhnjNyP5X0VYsKnI5SUmHjDx4LSgiux+A== X-Received: by 2002:a05:6402:3681:b0:43a:7c29:466a with SMTP id ej1-20020a056402368100b0043a7c29466amr3985335edb.367.1657710387002; Wed, 13 Jul 2022 04:06:27 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:906:70cf:b0:6fe:d027:3c1f with SMTP id g15-20020a17090670cf00b006fed0273c1fls2841711ejk.2.gmail; Wed, 13 Jul 2022 04:06:25 -0700 (PDT) X-Received: by 2002:a17:907:c06:b0:701:eb60:ded with SMTP id ga6-20020a1709070c0600b00701eb600dedmr2989506ejc.178.1657710385630; Wed, 13 Jul 2022 04:06:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1657710385; cv=none; d=google.com; s=arc-20160816; b=Y5ZiHLAqWPvQrhpVWQ8gMxQ9BxAL8EfSXsQBVL6AX5gU7WQh7U1Hxvwf0z19CInDij 3aHE+KwfQQWEuqvkCa+r/9IyZXmEXTrWR1mCiG8B8geLOMRllhP0zT4WtaGMyTHJexEV qTSATy3hw9BsTes8KB6L/EnGX3VGWS2PVTLLxzuuXDu8SLNejvhSzDHNiBk/kbXESdkf i6oWDiaHV/eLWFfZizX794iDlt5eJBV1GJsEr2aqmoQe/7K1LS/+EVutyCWAC2AQQZlt z5pihuyGA1cuDFZHeHEurIr5yCBQsVTZDcmQiyHQEJPvrMXr5t9xkgMIFGUetzACZ1YL AHGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=tSANhVcCLmGJcfXnFUh4H/uYqqsHsinco2iBfELb9xk=; b=MQzSU+O7USSfRWwpT/grA1ME3cnv9RR3kXQ52QMEbTrVOp9UNP9DaTzumuJmFz/Osq mUdeEPIb8nREijjbYH71TH6rZ+lMuPzxsCHDOj1UIBky8fGUWRDoFKmnGtvLe+tyGv7k qWGsGv4JaZhryhxoQbR4Rs7FOIp926J5K1tQ3nNuGedvv8yILcnpM2GaMz538s9DXJv/ 0oJHSa8uqsQEdJZNHxKL0at27iiXQc/bDS8gGXtYvD0fvjVS1xG3mb5x4pRj3egZlF+G DdgHkziF5r0F9W5mgoZ1rY09BjOV+zzglF4EUJo4RE3Zh8/nowopEHbg+7yRZ8moYZ6p fc3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=qmQSSeao; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id gv49-20020a1709072bf100b007033fef81a4sor3831329ejc.56.2022.07.13.04.06.25 for (Google Transport Security); Wed, 13 Jul 2022 04:06:25 -0700 (PDT) Received-SPF: pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:906:9b8a:b0:722:e50e:2a6d with SMTP id dd10-20020a1709069b8a00b00722e50e2a6dmr2949573ejc.724.1657710384882; Wed, 13 Jul 2022 04:06:24 -0700 (PDT) Received: from panicking.amarulasolutions.com ([2.198.242.86]) by smtp.gmail.com with ESMTPSA id fg16-20020a1709069c5000b006fec27575f1sm4830767ejc.123.2022.07.13.04.06.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Jul 2022 04:06:24 -0700 (PDT) From: Michael Trimarchi To: linux-amarula@amarulasolutions.com, Dario Binacchi , Tommaso Merciai Subject: [PATCH V2 4/4] mtd: nand: Get rid of mtd variable in function calls Date: Wed, 13 Jul 2022 13:06:16 +0200 Message-Id: <20220713110616.305444-4-michael@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220713110616.305444-1-michael@amarulasolutions.com> References: <20220713110616.305444-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=qmQSSeao; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , chip points to mtd. Passing chip is enough to have a reference to mtd when is necessary Signed-off-by: Michael Trimarchi --- drivers/mtd/nand/raw/mxs_nand_spl.c | 2 +- drivers/mtd/nand/raw/nand_base.c | 24 +++++++++++++----------- include/linux/mtd/rawnand.h | 3 +-- 3 files changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c index 05886fa025..29c25f774e 100644 --- a/drivers/mtd/nand/raw/mxs_nand_spl.c +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c @@ -83,7 +83,7 @@ static int mxs_flash_full_ident(struct mtd_info *mtd) struct nand_chip *chip = mtd_to_nand(mtd); struct nand_flash_dev *type; - type = nand_get_flash_type(mtd, chip, &nand_maf_id, &nand_dev_id, NULL); + type = nand_get_flash_type(chip, &nand_maf_id, &nand_dev_id, NULL); if (IS_ERR(type)) { chip->select_chip(mtd, -1); diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index d58451196c..f666d8ef5d 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4156,8 +4156,9 @@ static int nand_get_bits_per_cell(u8 cellinfo) * chip. The rest of the parameters must be decoded according to generic or * manufacturer-specific "extended ID" decoding patterns. */ -static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip) +static void nand_decode_ext_id(struct nand_chip *chip) { + struct mtd_info *mtd = &chip->mtd; int extid, id_len; /* The 3rd id byte holds MLC / multichip data */ chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]); @@ -4287,7 +4288,7 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip) * compliant and does not have a full-id or legacy-id entry in the nand_ids * table. */ -static void nand_manufacturer_detect(struct mtd_info *mtd, struct nand_chip *chip) +static void nand_manufacturer_detect(struct nand_chip *chip) { /* * Try manufacturer detection if available and use @@ -4297,7 +4298,7 @@ static void nand_manufacturer_detect(struct mtd_info *mtd, struct nand_chip *chi chip->manufacturer.desc->ops->detect) chip->manufacturer.desc->ops->detect(chip); else - nand_decode_ext_id(mtd, chip); + nand_decode_ext_id(chip); } /* @@ -4320,9 +4321,10 @@ static int nand_manufacturer_init(struct nand_chip *chip) * decodes a matching ID table entry and assigns the MTD size parameters for * the chip. */ -static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip, +static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type) { + struct mtd_info *mtd = &chip->mtd; int maf_id = chip->id.data[0]; mtd->erasesize = type->erasesize; @@ -4436,11 +4438,11 @@ static const struct nand_manufacturers *nand_get_manufacturer_desc(u8 id) /* * Get the flash and manufacturer id and lookup if the type is supported. */ -struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, - struct nand_chip *chip, - int *maf_id, int *dev_id, - struct nand_flash_dev *type) +struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip, + int *maf_id, int *dev_id, + struct nand_flash_dev *type) { + struct mtd_info *mtd = &chip->mtd; const struct nand_manufacturers *manufacturer_desc; int busw, ret; u8 *id_data = chip->id.data; @@ -4536,9 +4538,9 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, chip->chipsize = (uint64_t)type->chipsize << 20; if (!type->pagesize) { - nand_manufacturer_detect(mtd, chip); + nand_manufacturer_detect(chip); } else { - nand_decode_id(mtd, chip, type); + nand_decode_id(chip, type); } /* Get chip options */ @@ -4728,7 +4730,7 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips, nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16); /* Read the flash type */ - type = nand_get_flash_type(mtd, chip, &nand_maf_id, + type = nand_get_flash_type(chip, &nand_maf_id, &nand_dev_id, table); if (IS_ERR(type)) { diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 57fe7fb47b..d8141cb4d1 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -29,8 +29,7 @@ struct nand_flash_dev; struct device_node; /* Get the flash and manufacturer id and lookup if the type is supported. */ -struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, - struct nand_chip *chip, +struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip, int *maf_id, int *dev_id, struct nand_flash_dev *type);