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([37.159.114.163]) by smtp.gmail.com with ESMTPSA id m6-20020adff386000000b0030630120e56sm14385127wro.57.2023.06.06.23.31.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 23:31:44 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Raphael Gallais-Pou , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Philippe Cornu , Amarula patchwork , Maxime Coquelin , michael@amarulasolutions.com, linux-stm32@st-md-mailman.stormreply.com, Alexandre Torgue , Dario Binacchi , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org Subject: [RESEND PATCH v2 1/6] ARM: dts: stm32: add ltdc support on stm32f746 MCU Date: Wed, 7 Jun 2023 08:31:34 +0200 Message-Id: <20230607063139.621351-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> References: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="g2j6/JCV"; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add LTDC (Lcd-tft Display Controller) support. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/boot/dts/stm32f746.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index dc868e6da40e..9c4ba0b7f239 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -507,6 +507,16 @@ pwm { }; }; + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + interrupts = <88>, <89>; + resets = <&rcc STM32F7_APB2_RESET(LTDC)>; + clocks = <&rcc 1 CLK_LCD>; + clock-names = "lcd"; + status = "disabled"; + }; + pwrcfg: power-config@40007000 { compatible = "st,stm32-power-config", "syscon"; reg = <0x40007000 0x400>; From patchwork Wed Jun 7 06:31:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2911 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 2C0123F080 for ; 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([37.159.114.163]) by smtp.gmail.com with ESMTPSA id m6-20020adff386000000b0030630120e56sm14385127wro.57.2023.06.06.23.31.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 23:31:46 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Raphael Gallais-Pou , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Philippe Cornu , Amarula patchwork , Maxime Coquelin , michael@amarulasolutions.com, linux-stm32@st-md-mailman.stormreply.com, Alexandre Torgue , Dario Binacchi , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org Subject: [RESEND PATCH v2 2/6] ARM: dts: stm32: add pin map for LTDC on stm32f7 Date: Wed, 7 Jun 2023 08:31:35 +0200 Message-Id: <20230607063139.621351-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> References: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=h2Pc0QIy; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add pin configurations for using LTDC (LCD-tft Display Controller) on stm32f746-disco board. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 35 ++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi index 9f65403295ca..f3f90b9bcd61 100644 --- a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi @@ -365,6 +365,41 @@ pins2 { bias-pull-up; }; }; + + + ltdc_pins_a: ltdc-pins-a-0 { + pins { + pinmux = , /* LCD_B0 */ + , /* LCD_B4 */ + , /* LCD_VSYNC */ + , /* LCD_HSYNC */ + , /* LCD_CLK */ + , /* LCD_R0 */ + , /* LCD_R1 */ + , /* LCD_R2 */ + , /* LCD_R3 */ + , /* LCD_R4 */ + , /* LCD_R5 */ + , /* LCD_R6 */ + , /* LCD_R7 */ + , /* LCD_G0 */ + , /* LCD_G1 */ + , /* LCD_G2 */ + , /* LCD_G3 */ + , /* LCD_G4 */ + , /* LCD_B1 */ + , /* LCD_B2 */ + , /* LCD_B3 */ + , /* LCD_G5 */ + , /* LCD_G6 */ + , /* LCD_G7 */ + , /* LCD_B5 */ + , /* LCD_B6 */ + , /* LCD_B7 */ + ; /* LCD_DE */ + slew-rate = <2>; + }; + }; }; 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([37.159.114.163]) by smtp.gmail.com with ESMTPSA id m6-20020adff386000000b0030630120e56sm14385127wro.57.2023.06.06.23.31.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 23:31:48 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Raphael Gallais-Pou , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Philippe Cornu , Amarula patchwork , Maxime Coquelin , michael@amarulasolutions.com, linux-stm32@st-md-mailman.stormreply.com, Alexandre Torgue , Dario Binacchi , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org Subject: [RESEND PATCH v2 3/6] ARM: dts: stm32: support display on stm32f746-disco board Date: Wed, 7 Jun 2023 08:31:36 +0200 Message-Id: <20230607063139.621351-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> References: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=bzMNTxZK; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add support to Rocktech RK043FN48H display on stm32f746-disco board. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/boot/dts/stm32f746-disco.dts | 51 +++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm/boot/dts/stm32f746-disco.dts b/arch/arm/boot/dts/stm32f746-disco.dts index c11616ed5fc6..cda423b6a874 100644 --- a/arch/arm/boot/dts/stm32f746-disco.dts +++ b/arch/arm/boot/dts/stm32f746-disco.dts @@ -60,10 +60,41 @@ memory@c0000000 { reg = <0xC0000000 0x800000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + no-map; + size = <0x80000>; + linux,dma-default; + }; + }; + aliases { serial0 = &usart1; }; + backlight: backlight { + compatible = "gpio-backlight"; + gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + panel_rgb: panel-rgb { + compatible = "rocktech,rk043fn48h"; + backlight = <&backlight>; + enable-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>; + status = "okay"; + port { + panel_in_rgb: endpoint { + remote-endpoint = <<dc_out_rgb>; + }; + }; + }; + usbotg_hs_phy: usb-phy { #phy-cells = <0>; compatible = "usb-nop-xceiv"; @@ -99,6 +130,26 @@ &i2c1 { status = "okay"; }; +&dma1 { + status = "okay"; +}; + +&dma2 { + status = "okay"; +}; + +<dc { + pinctrl-0 = <<dc_pins_a>; + pinctrl-names = "default"; + status = "okay"; + + port { + ltdc_out_rgb: endpoint { + remote-endpoint = <&panel_in_rgb>; + }; + }; +}; + &sdio1 { status = "okay"; vmmc-supply = <&mmc_vcard>; From patchwork Wed Jun 7 06:31:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2913 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-wm1-f72.google.com (mail-wm1-f72.google.com [209.85.128.72]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 17B453F080 for ; Wed, 7 Jun 2023 08:31:53 +0200 (CEST) Received: by mail-wm1-f72.google.com with SMTP id 5b1f17b1804b1-3f60911a417sf34691375e9.2 for ; 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([37.159.114.163]) by smtp.gmail.com with ESMTPSA id m6-20020adff386000000b0030630120e56sm14385127wro.57.2023.06.06.23.31.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 23:31:50 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Raphael Gallais-Pou , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Philippe Cornu , Amarula patchwork , Maxime Coquelin , michael@amarulasolutions.com, linux-stm32@st-md-mailman.stormreply.com, Alexandre Torgue , Dario Binacchi , Conor Dooley , Conor Dooley , Daniel Vetter , David Airlie , Krzysztof Kozlowski , Neil Armstrong , Rob Herring , Sam Ravnborg , Thierry Reding , devicetree@vger.kernel.org Subject: [RESEND PATCH v2 4/6] dt-bindings: display: simple: add Rocktech RK043FN48H Date: Wed, 7 Jun 2023 08:31:37 +0200 Message-Id: <20230607063139.621351-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> References: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=iSFhC91P; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add compatible to panel-simple for Rocktech Displays Limited RK043FN48H 4.3" 480x272 LCD-TFT panel. Signed-off-by: Dario Binacchi Acked-by: Conor Dooley Reviewed-by: Jagan Teki Reviewed-by: Raphael Gallais-Pou --- Changes in v2: - Add 'Acked-by' tag of Conor Dooley. .../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 01560fe226dd..bd6a92d2b41c 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -280,6 +280,8 @@ properties: - rocktech,rk101ii01d-ct # Rocktech Display Ltd. RK070ER9427 800(RGB)x480 TFT LCD panel - rocktech,rk070er9427 + # Rocktech Display Ltd. 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([37.159.114.163]) by smtp.gmail.com with ESMTPSA id m6-20020adff386000000b0030630120e56sm14385127wro.57.2023.06.06.23.31.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 23:31:52 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Raphael Gallais-Pou , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Philippe Cornu , Amarula patchwork , Maxime Coquelin , michael@amarulasolutions.com, linux-stm32@st-md-mailman.stormreply.com, Alexandre Torgue , Dario Binacchi , kernel test robot , Daniel Vetter , David Airlie , Neil Armstrong , Sam Ravnborg Subject: [RESEND PATCH v2 5/6] drm/panel: simple: add support for Rocktech RK043FN48H panel Date: Wed, 7 Jun 2023 08:31:38 +0200 Message-Id: <20230607063139.621351-6-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> References: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=UYvhY2b4; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add support for Rocktech RK043FN48H 4.3" (480x272) LCD-TFT panel. Signed-off-by: Dario Binacchi Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202306020343.jNTWeM0P-lkp@intel.com/ Reviewed-by: Jagan Teki --- Changes in v2: - Fix build warning reported by kernel test robot. - Add 'Reported-by' tag of kernel test robot. drivers/gpu/drm/panel/panel-simple.c | 29 ++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 065f378bba9d..3b10e78d07d9 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -3188,6 +3188,32 @@ static const struct panel_desc qishenglong_gopher2b_lcd = { .connector_type = DRM_MODE_CONNECTOR_DPI, }; +static const struct display_timing rocktech_rk043fn48h_timing = { + .pixelclock = { 6000000, 9000000, 12000000 }, + .hactive = { 480, 480, 480 }, + .hback_porch = { 8, 43, 43 }, + .hfront_porch = { 2, 8, 8 }, + .hsync_len = { 1, 1, 1 }, + .vactive = { 272, 272, 272 }, + .vback_porch = { 2, 12, 12 }, + .vfront_porch = { 1, 4, 4 }, + .vsync_len = { 1, 10, 10 }, + .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW | + DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE, +}; + +static const struct panel_desc rocktech_rk043fn48h = { + .timings = &rocktech_rk043fn48h_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 95, + .height = 54, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .connector_type = DRM_MODE_CONNECTOR_DPI, +}; + static const struct display_timing rocktech_rk070er9427_timing = { .pixelclock = { 26400000, 33300000, 46800000 }, .hactive = { 800, 800, 800 }, @@ -4218,6 +4244,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "qishenglong,gopher2b-lcd", .data = &qishenglong_gopher2b_lcd, + }, { + .compatible = "rocktech,rk043fn48h", + .data = &rocktech_rk043fn48h, }, { .compatible = "rocktech,rk070er9427", .data = &rocktech_rk070er9427, From patchwork Wed Jun 7 06:31:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2915 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id A6F403F080 for ; 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([37.159.114.163]) by smtp.gmail.com with ESMTPSA id m6-20020adff386000000b0030630120e56sm14385127wro.57.2023.06.06.23.31.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 23:31:54 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Raphael Gallais-Pou , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Philippe Cornu , Amarula patchwork , Maxime Coquelin , michael@amarulasolutions.com, linux-stm32@st-md-mailman.stormreply.com, Alexandre Torgue , Dario Binacchi , Daniel Vetter , David Airlie , Yannick Fertre Subject: [RESEND PATCH v2 6/6] drm/stm: add an option to change FB bpp Date: Wed, 7 Jun 2023 08:31:39 +0200 Message-Id: <20230607063139.621351-7-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> References: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=oij5WgWk; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Boards that use the STM32F{4,7} series have limited amounts of RAM. The added parameter allows users to size, within certain limits, the memory footprint required by the framebuffer. Signed-off-by: Dario Binacchi --- (no changes since v1) drivers/gpu/drm/stm/drv.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/stm/drv.c b/drivers/gpu/drm/stm/drv.c index 422220df7d8c..65be2b442a6a 100644 --- a/drivers/gpu/drm/stm/drv.c +++ b/drivers/gpu/drm/stm/drv.c @@ -30,6 +30,11 @@ #define STM_MAX_FB_WIDTH 2048 #define STM_MAX_FB_HEIGHT 2048 /* same as width to handle orientation */ +static uint stm_bpp = 16; + +MODULE_PARM_DESC(bpp, "bits-per-pixel (default: 16)"); +module_param_named(bpp, stm_bpp, uint, 0644); + static const struct drm_mode_config_funcs drv_mode_config_funcs = { .fb_create = drm_gem_fb_create, .atomic_check = drm_atomic_helper_check, @@ -93,6 +98,7 @@ static int drv_load(struct drm_device *ddev) ddev->mode_config.min_height = 0; ddev->mode_config.max_width = STM_MAX_FB_WIDTH; ddev->mode_config.max_height = STM_MAX_FB_HEIGHT; + ddev->mode_config.preferred_depth = stm_bpp; ddev->mode_config.funcs = &drv_mode_config_funcs; ddev->mode_config.normalize_zpos = true; @@ -203,7 +209,7 @@ static int stm_drm_platform_probe(struct platform_device *pdev) if (ret) goto err_put; - drm_fbdev_dma_setup(ddev, 16); + drm_fbdev_dma_setup(ddev, stm_bpp); return 0;