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[79.25.27.4]) by smtp.gmail.com with ESMTPSA id p23-20020a05620a15f700b0075d49ce31c3sm109103qkm.91.2023.06.19.09.55.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 09:55:37 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Philippe Cornu , Raphael Gallais-Pou , Amarula patchwork , michael@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v4 1/6] ARM: dts: stm32: add ltdc support on stm32f746 MCU Date: Mon, 19 Jun 2023 18:55:20 +0200 Message-Id: <20230619165525.1035243-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230619165525.1035243-1-dario.binacchi@amarulasolutions.com> References: <20230619165525.1035243-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=fbehQPIE; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add LTDC (Lcd-tft Display Controller) support. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/boot/dts/stm32f746.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index dc868e6da40e..9c4ba0b7f239 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -507,6 +507,16 @@ pwm { }; }; + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + interrupts = <88>, <89>; + resets = <&rcc STM32F7_APB2_RESET(LTDC)>; + clocks = <&rcc 1 CLK_LCD>; + clock-names = "lcd"; + status = "disabled"; + }; + pwrcfg: power-config@40007000 { compatible = "st,stm32-power-config", "syscon"; reg = <0x40007000 0x400>; From patchwork Mon Jun 19 16:55:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2923 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-qt1-f199.google.com (mail-qt1-f199.google.com [209.85.160.199]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id CE1093F1DB for ; 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Signed-off-by: Dario Binacchi --- (no changes since v3) Changes in v3: - rename ltdc-pins-a-0 to ltdc-0. arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 35 ++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi index 9f65403295ca..36dad40dd0c7 100644 --- a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi @@ -365,6 +365,41 @@ pins2 { bias-pull-up; }; }; + + + ltdc_pins_a: ltdc-0 { + pins { + pinmux = , /* LCD_B0 */ + , /* LCD_B4 */ + , /* LCD_VSYNC */ + , /* LCD_HSYNC */ + , /* LCD_CLK */ + , /* LCD_R0 */ + , /* LCD_R1 */ + , /* LCD_R2 */ + , /* LCD_R3 */ + , /* LCD_R4 */ + , /* LCD_R5 */ + , /* LCD_R6 */ + , /* LCD_R7 */ + , /* LCD_G0 */ + , /* LCD_G1 */ + , /* LCD_G2 */ + , /* LCD_G3 */ + , /* LCD_G4 */ + , /* LCD_B1 */ + , /* LCD_B2 */ + , /* LCD_B3 */ + , /* LCD_G5 */ + , /* LCD_G6 */ + , /* LCD_G7 */ + , /* LCD_B5 */ + , /* LCD_B6 */ + , /* LCD_B7 */ + ; /* LCD_DE */ + slew-rate = <2>; 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[79.25.27.4]) by smtp.gmail.com with ESMTPSA id p23-20020a05620a15f700b0075d49ce31c3sm109103qkm.91.2023.06.19.09.55.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 09:55:45 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Philippe Cornu , Raphael Gallais-Pou , Amarula patchwork , michael@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v4 3/6] ARM: dts: stm32: support display on stm32f746-disco board Date: Mon, 19 Jun 2023 18:55:22 +0200 Message-Id: <20230619165525.1035243-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230619165525.1035243-1-dario.binacchi@amarulasolutions.com> References: <20230619165525.1035243-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=SbYaNKhZ; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add support to Rocktech RK043FN48H display on stm32f746-disco board. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/boot/dts/stm32f746-disco.dts | 51 +++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm/boot/dts/stm32f746-disco.dts b/arch/arm/boot/dts/stm32f746-disco.dts index c11616ed5fc6..cda423b6a874 100644 --- a/arch/arm/boot/dts/stm32f746-disco.dts +++ b/arch/arm/boot/dts/stm32f746-disco.dts @@ -60,10 +60,41 @@ memory@c0000000 { reg = <0xC0000000 0x800000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + no-map; + size = <0x80000>; + linux,dma-default; + }; + }; + aliases { serial0 = &usart1; }; + backlight: backlight { + compatible = "gpio-backlight"; + gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + panel_rgb: panel-rgb { + compatible = "rocktech,rk043fn48h"; + backlight = <&backlight>; + enable-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>; + status = "okay"; + port { + panel_in_rgb: endpoint { + remote-endpoint = <<dc_out_rgb>; + }; + }; + }; + usbotg_hs_phy: usb-phy { #phy-cells = <0>; compatible = "usb-nop-xceiv"; @@ -99,6 +130,26 @@ &i2c1 { status = "okay"; }; +&dma1 { + status = "okay"; +}; + +&dma2 { + status = "okay"; +}; + +<dc { + pinctrl-0 = <<dc_pins_a>; + pinctrl-names = "default"; + status = "okay"; + + port { + ltdc_out_rgb: endpoint { + remote-endpoint = <&panel_in_rgb>; + }; + }; +}; + &sdio1 { status = "okay"; vmmc-supply = <&mmc_vcard>; From patchwork Mon Jun 19 16:55:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2925 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-qv1-f70.google.com (mail-qv1-f70.google.com [209.85.219.70]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id D27003F1DB for ; Mon, 19 Jun 2023 18:55:51 +0200 (CEST) Received: by mail-qv1-f70.google.com with SMTP id 6a1803df08f44-63015df952csf24102586d6.0 for ; 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[79.25.27.4]) by smtp.gmail.com with ESMTPSA id p23-20020a05620a15f700b0075d49ce31c3sm109103qkm.91.2023.06.19.09.55.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 09:55:49 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Philippe Cornu , Raphael Gallais-Pou , Amarula patchwork , michael@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Daniel Vetter , David Airlie , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , Yannick Fertre , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v4 4/6] dt-bindings: display: stm32-ltdc: add optional st, fb-bpp property Date: Mon, 19 Jun 2023 18:55:23 +0200 Message-Id: <20230619165525.1035243-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230619165525.1035243-1-dario.binacchi@amarulasolutions.com> References: <20230619165525.1035243-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=PouTpA+2; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Boards that use the STM32F{4,7} series have limited amounts of RAM. The added property allows to size, within certain limits, the memory footprint required by the framebuffer. Signed-off-by: Dario Binacchi --- (no changes since v1) .../devicetree/bindings/display/st,stm32-ltdc.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml b/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml index d6ea4d62a2cf..1c3a3653579f 100644 --- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml +++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml @@ -42,6 +42,12 @@ properties: - for internal dpi input of the MIPI DSI host controller. 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[79.25.27.4]) by smtp.gmail.com with ESMTPSA id p23-20020a05620a15f700b0075d49ce31c3sm109103qkm.91.2023.06.19.09.55.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 09:55:53 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Philippe Cornu , Raphael Gallais-Pou , Amarula patchwork , michael@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v4 5/6] ARM: dts: stm32: set framebuffer bit depth on stm32f746-disco Date: Mon, 19 Jun 2023 18:55:24 +0200 Message-Id: <20230619165525.1035243-6-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230619165525.1035243-1-dario.binacchi@amarulasolutions.com> References: <20230619165525.1035243-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=YzxNxTeb; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The board uses a limited amounts of RAM. The added property halves the memory footprint required by the framebuffer. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/boot/dts/stm32f746-disco.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/stm32f746-disco.dts b/arch/arm/boot/dts/stm32f746-disco.dts index cda423b6a874..36612b4c2504 100644 --- a/arch/arm/boot/dts/stm32f746-disco.dts +++ b/arch/arm/boot/dts/stm32f746-disco.dts @@ -142,6 +142,7 @@ <dc { pinctrl-0 = <<dc_pins_a>; pinctrl-names = "default"; status = "okay"; + st,fb-bpp = <8>; port { ltdc_out_rgb: endpoint { From patchwork Mon Jun 19 16:55:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2927 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-qt1-f200.google.com (mail-qt1-f200.google.com [209.85.160.200]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 6AC8F3F1DB for ; Mon, 19 Jun 2023 18:55:59 +0200 (CEST) Received: by mail-qt1-f200.google.com with SMTP id d75a77b69052e-3ff29d0dd21sf1025201cf.3 for ; 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[79.25.27.4]) by smtp.gmail.com with ESMTPSA id p23-20020a05620a15f700b0075d49ce31c3sm109103qkm.91.2023.06.19.09.55.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 09:55:57 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Philippe Cornu , Raphael Gallais-Pou , Amarula patchwork , michael@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Daniel Vetter , David Airlie , Maxime Coquelin , Yannick Fertre , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v4 6/6] drm/stm: set framebuffer bit depth through DTS property Date: Mon, 19 Jun 2023 18:55:25 +0200 Message-Id: <20230619165525.1035243-7-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230619165525.1035243-1-dario.binacchi@amarulasolutions.com> References: <20230619165525.1035243-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=FZytthrb; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The patch, which is backwards compatible, sets the bit depth of the framebuffer using the optional property 'st,fb-bpp' in the DTS. Signed-off-by: Dario Binacchi --- Changes in v4: - Use DTS property instead of module parameter to set the framebuffer bit depth. Changes in v3: - drop [4/6] dt-bindings: display: simple: add Rocktech RK043FN48H Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next): https://cgit.freedesktop.org/drm/drm-misc/commit/?id=c42a37a27c777d63961dd634a30f7c887949491a - drop [5/6] drm/panel: simple: add support for Rocktech RK043FN48H panel Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) https://cgit.freedesktop.org/drm/drm-misc/commit/?id=13cdd12a9f934158f4ec817cf048fcb4384aa9dc drivers/gpu/drm/stm/drv.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/stm/drv.c b/drivers/gpu/drm/stm/drv.c index 422220df7d8c..7a61a3c63469 100644 --- a/drivers/gpu/drm/stm/drv.c +++ b/drivers/gpu/drm/stm/drv.c @@ -180,7 +180,9 @@ static const struct dev_pm_ops drv_pm_ops = { static int stm_drm_platform_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; + struct device_node *np = pdev->dev.of_node; struct drm_device *ddev; + u32 fb_bpp = 16; int ret; DRM_DEBUG("%s\n", __func__); @@ -203,7 +205,9 @@ static int stm_drm_platform_probe(struct platform_device *pdev) if (ret) goto err_put; - drm_fbdev_dma_setup(ddev, 16); + of_property_read_u32(np, "st,fb-bpp", &fb_bpp); + + drm_fbdev_dma_setup(ddev, fb_bpp); return 0;