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[82.52.12.96]) by smtp.gmail.com with ESMTPSA id j15-20020a170906430f00b0099b76c3041csm2491083ejm.7.2023.08.05.02.32.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Aug 2023 02:32:08 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Amarula patchwork , Philippe Cornu , Raphael Gallais-Pou , michael@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [RESEND PATCH v7 1/3] ARM: dts: stm32: add ltdc support on stm32f746 MCU Date: Sat, 5 Aug 2023 11:32:00 +0200 Message-Id: <20230805093203.3988194-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230805093203.3988194-1-dario.binacchi@amarulasolutions.com> References: <20230805093203.3988194-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Dh2UTNNM; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add LTDC (Lcd-tft Display Controller) support. Signed-off-by: Dario Binacchi Reviewed-by: Raphaël Gallais-Pou --- Changes in v7: - Add 'Reviewed-by' tag I forgot in v6. https://lore.kernel.org/linux-arm-kernel/20230629083726.84910-1-dario.binacchi@amarulasolutions.com/T/ arch/arm/boot/dts/st/stm32f746.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi index d1802efd067c..36eda1562e83 100644 --- a/arch/arm/boot/dts/st/stm32f746.dtsi +++ b/arch/arm/boot/dts/st/stm32f746.dtsi @@ -507,6 +507,16 @@ pwm { }; }; + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + interrupts = <88>, <89>; + resets = <&rcc STM32F7_APB2_RESET(LTDC)>; + clocks = <&rcc 1 CLK_LCD>; + clock-names = "lcd"; + status = "disabled"; + }; + pwrcfg: power-config@40007000 { compatible = "st,stm32-power-config", "syscon"; reg = <0x40007000 0x400>; From patchwork Sat Aug 5 09:32:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2953 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 6238B3F1DB for ; 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[82.52.12.96]) by smtp.gmail.com with ESMTPSA id j15-20020a170906430f00b0099b76c3041csm2491083ejm.7.2023.08.05.02.32.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Aug 2023 02:32:09 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Amarula patchwork , Philippe Cornu , Raphael Gallais-Pou , michael@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [RESEND PATCH v7 2/3] ARM: dts: stm32: add pin map for LTDC on stm32f7 Date: Sat, 5 Aug 2023 11:32:01 +0200 Message-Id: <20230805093203.3988194-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230805093203.3988194-1-dario.binacchi@amarulasolutions.com> References: <20230805093203.3988194-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=ShcmEtOx; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add pin configurations for using LTDC (LCD-tft Display Controller) on stm32f746-disco board. Signed-off-by: Dario Binacchi Reviewed-by: Raphaël Gallais-Pou --- Changes in v7: - Add 'Reviewed-by' tag I forgot in v6. https://lore.kernel.org/linux-arm-kernel/20230629083726.84910-1-dario.binacchi@amarulasolutions.com/T/ Changes in v3: - rename ltdc-pins-a-0 to ltdc-0. arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi | 35 +++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi index 9f65403295ca..36dad40dd0c7 100644 --- a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi @@ -365,6 +365,41 @@ pins2 { bias-pull-up; }; }; + + + ltdc_pins_a: ltdc-0 { + pins { + pinmux = , /* LCD_B0 */ + , /* LCD_B4 */ + , /* LCD_VSYNC */ + , /* LCD_HSYNC */ + , /* LCD_CLK */ + , /* LCD_R0 */ + , /* LCD_R1 */ + , /* LCD_R2 */ + , /* LCD_R3 */ + , /* LCD_R4 */ + , /* LCD_R5 */ + , /* LCD_R6 */ + , /* LCD_R7 */ + , /* LCD_G0 */ + , /* LCD_G1 */ + , /* LCD_G2 */ + , /* LCD_G3 */ + , /* LCD_G4 */ + , /* LCD_B1 */ + , /* LCD_B2 */ + , /* LCD_B3 */ + , /* LCD_G5 */ + , /* LCD_G6 */ + , /* LCD_G7 */ + , /* LCD_B5 */ + , /* LCD_B6 */ + , /* LCD_B7 */ + ; /* LCD_DE */ + slew-rate = <2>; + }; + }; }; }; }; From patchwork Sat Aug 5 09:32:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2954 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f70.google.com (mail-ed1-f70.google.com [209.85.208.70]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id E1FFC3F1DB for ; Sat, 5 Aug 2023 11:32:13 +0200 (CEST) Received: by mail-ed1-f70.google.com with SMTP id 4fb4d7f45d1cf-521a38098fasf1868695a12.2 for ; Sat, 05 Aug 2023 02:32:13 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1691227933; cv=pass; d=google.com; s=arc-20160816; b=cxCgeisGYkCNkf+VVXA3ANSS10Wao4xoSU8gfq1soWWBNu/MSEwxv0sqpYLYZi267J e7Hv8TjLyRZTC8oBrttrM0DfIkPE5mFrwN/JvstjvGmCKPSX8sXqrsaz5pSJh4+JYgQm 1dh6avIvREhqN/r8oscxzixcII/yUNLY84u9yGPG40R0k507F1gJSPjpxK+71qURwHTp pSudMmugUKUTYrLOj4LqhDvBFa+3oK+Fx3wkpADG983TjrePDeDFISqTU8XC0TC9+i2j cEBaj3+uYIcKgbq+1tpDgNoFWgAU8uGpaPF885wmDXivaR3mZLuB5N3Cx3xheFQGFhmo OKqg== ARC-Message-Signature: i=2; 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[82.52.12.96]) by smtp.gmail.com with ESMTPSA id j15-20020a170906430f00b0099b76c3041csm2491083ejm.7.2023.08.05.02.32.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Aug 2023 02:32:11 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Amarula patchwork , Philippe Cornu , Raphael Gallais-Pou , michael@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [RESEND PATCH v7 3/3] ARM: dts: stm32: support display on stm32f746-disco board Date: Sat, 5 Aug 2023 11:32:02 +0200 Message-Id: <20230805093203.3988194-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230805093203.3988194-1-dario.binacchi@amarulasolutions.com> References: <20230805093203.3988194-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=LTO+hY60; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add support to Rocktech RK043FN48H display on stm32f746-disco board. Signed-off-by: Dario Binacchi Reviewed-by: Raphaël Gallais-Pou --- Changes in v7: - Add 'Reviewed-by' tag I forgot in v6. https://lore.kernel.org/linux-arm-kernel/20230629083726.84910-1-dario.binacchi@amarulasolutions.com/T/ Changes in v6: - Remove dma nodes from stm32f746-disco.dts, they are not used by LTDC, so there is no need to enable them. Changes in v5: I am confident that framebuffer sizing is a real requirement for STM32 boards, but I need some time to understand if and how to introduce this functionality. Therefore, I drop the following patches to allow the series to be fully merged: - [4/6] dt-bindings: display: stm32-ltdc: add optional st,fb-bpp property - [5/6] ARM: dts: stm32: set framebuffer bit depth on stm32f746-disco - [6/6] drm/stm: set framebuffer bit depth through DTS property Changes in v4: - Use DTS property instead of module parameter to set the framebuffer bit depth. Changes in v3: - drop [4/6] dt-bindings: display: simple: add Rocktech RK043FN48H Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next): https://cgit.freedesktop.org/drm/drm-misc/commit/?id=c42a37a27c777d63961dd634a30f7c887949491a - drop [5/6] drm/panel: simple: add support for Rocktech RK043FN48H panel Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) https://cgit.freedesktop.org/drm/drm-misc/commit/?id=13cdd12a9f934158f4ec817cf048fcb4384aa9dc arch/arm/boot/dts/st/stm32f746-disco.dts | 43 ++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32f746-disco.dts b/arch/arm/boot/dts/st/stm32f746-disco.dts index c11616ed5fc6..c00d34179e2e 100644 --- a/arch/arm/boot/dts/st/stm32f746-disco.dts +++ b/arch/arm/boot/dts/st/stm32f746-disco.dts @@ -60,10 +60,41 @@ memory@c0000000 { reg = <0xC0000000 0x800000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + no-map; + size = <0x80000>; + linux,dma-default; + }; + }; + aliases { serial0 = &usart1; }; + backlight: backlight { + compatible = "gpio-backlight"; + gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + panel_rgb: panel-rgb { + compatible = "rocktech,rk043fn48h"; + backlight = <&backlight>; + enable-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>; + status = "okay"; + port { + panel_in_rgb: endpoint { + remote-endpoint = <<dc_out_rgb>; + }; + }; + }; + usbotg_hs_phy: usb-phy { #phy-cells = <0>; compatible = "usb-nop-xceiv"; @@ -99,6 +130,18 @@ &i2c1 { status = "okay"; }; +<dc { + pinctrl-0 = <<dc_pins_a>; + pinctrl-names = "default"; + status = "okay"; + + port { + ltdc_out_rgb: endpoint { + remote-endpoint = <&panel_in_rgb>; + }; + }; +}; + &sdio1 { status = "okay"; vmmc-supply = <&mmc_vcard>;