From patchwork Sat Apr 27 12:09:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 302 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f198.google.com (mail-pf1-f198.google.com [209.85.210.198]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id ED76E3F08F for ; Sat, 27 Apr 2019 14:09:37 +0200 (CEST) Received: by mail-pf1-f198.google.com with SMTP id d21sf3944375pfr.3 for ; Sat, 27 Apr 2019 05:09:37 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1556366975; cv=pass; d=google.com; s=arc-20160816; b=XUif/4/UeWn+9VQcFAJYc+2E3Qu8+hW8s4555BZvPOnJdoxc8noptmhezRhFyYB6yj caNT+mnNc7rM+nEZ4V3JnbJmSG2bGADw2aL4OicB1+4+ZO19rL5nMEQoarsBLVKm49Bl lqdV7qq6Kil6sx/PPj5EQ+nQoi7HM53RwxmHbWGa2thiJHsdOuaJDmgzew+0337Xj2QN H7MW0FZbZf425Rz/l2CmS1Lv4z4x3VwuLNUP/5MISdOEEmfwB8MWAFgANlj6L09jLHTU /nd2ezfpp30SKigAwz3d9GONk5Y/sWz6xHF+fd1tZh0eNgp+SRKgH9rA6CulZbpk78D6 Imuw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:message-id:date:subject:cc:to :from:dkim-signature; bh=CAf081IYNlLYt414eUkEf6S0NXer6ajSKTcsQ2i05Y4=; b=F6lYyXAe8fhQuM48d7PDj4y2QtuqCyfncDm1kspNuYpURu94ukGWocy6Tk/OncEVxS 1vEWCUOt3hoPZBx5Kue3SWgzOqXDviFga7g/nwdmErdvJEuHXYtsjbLH6gZoT6JDmSLe 5He0RFGy9Pg/LNIwHuv47oWN4IXWSdVxHMwmT2HBKkCotqC648u2eklFWdWOCm+GEQJ6 6L9pBa+2jaEeYTxCECefOu5CD8AnHXlMDsV8cVIvMKTYebgVeg5X1VIyfiCzBfbEyo8i F3Q+gCZE6SVfeqJptq1WBvt2vb1hJiLpz3UJBwpRmbJVgFglb0U6Hf/uFybecqYMO3MW iRTg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=PTZ7s0qj; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=CAf081IYNlLYt414eUkEf6S0NXer6ajSKTcsQ2i05Y4=; b=hcjP1gN3S8dpSsH4wirTG258dP8df6JRw0DJBmuhzT1qQQNTTNeC8Rf00ezfh5pIlH lwI5+uTjSKFE1KQm7r++anCLEwoemxikKEFZiokd+4meDpKkNUgSgBM/cde82mhTqSg8 Xfo9K7uEJtCvBIjj9XceSXbTiIJvawEoZb7C8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :x-original-sender:x-original-authentication-results:precedence :mailing-list:list-id:x-spam-checked-in-group:list-post:list-help :list-archive:list-unsubscribe; bh=CAf081IYNlLYt414eUkEf6S0NXer6ajSKTcsQ2i05Y4=; b=ik/xXVg1QWTDOWYITMCtk4Q8U8sLYnAMDdPkrKliSW1LfEllfjyR8lcga/SCHQ/WOT CPYq0KMVAqTTMkjeu4gXhDTiMJner9k08g9QWBJ4WQJDJcbh2lPT1fJhVwZWTvPHFg+V qbFkc4eLmWCuLBduPzNo93WWoDJ7GXAb1GxGcbQ7mp7jTGSUQ26ksI2aBq4pAIdx20ep 9bK6n42FtoZxQSnC8YeWWUB/cPCGLfyJLDl2AxPl6ieT/XhowUCatoZyrHQmK/dHjqTk zaZbfWPhLQghXjM8u+d1gQZLr9Fp6dIGvxIBkJ0YmwlFTdXJrQUrHjgVB6m0tr13tVZl 4vWg== X-Gm-Message-State: APjAAAVXsUhu+tKs310uENJwdgMI24BdFBatvE7Upo36y4KCdr6AhyJY Atubg/5mFhVZfpReTo92fyADIZCC X-Google-Smtp-Source: APXvYqxS6AqS1aBOxd804zhrWbLE5rvaYEth8uqVkaFlvRGnelBdoQONfxNmnVo9BFTz9NCQhkF7HA== X-Received: by 2002:a17:902:141:: with SMTP id 59mr51381966plb.132.1556366973474; Sat, 27 Apr 2019 05:09:33 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:902:bb8c:: with SMTP id m12ls7705143pls.16.gmail; Sat, 27 Apr 2019 05:09:33 -0700 (PDT) X-Received: by 2002:a17:902:8a4:: with SMTP id 33mr51744362pll.7.1556366973052; Sat, 27 Apr 2019 05:09:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556366973; cv=none; d=google.com; s=arc-20160816; b=L/XQHcxx30ZCktRRLyYdNr8Lrdfee6mzYqYfOV1fj93I9Fn3Bjqcw4O8T6cqAL15Vy HHOtKztur+7NFcrDxoTtagb7wMtO9bJy2UKSppPcNoyfrbIn15uO3Mu7qUg9Dwh8pEhg wgL+NXMitwTQJYFoLndzZIpt77EUhMIHP/vWHfKBPDtXp3TBHby2SUT5GgP4G+1CnG87 1/NATwpPczYoZ438wwYWXMo/VLj5x7LgabwXIcGOYHCSh3PFYRdl4J2oW8/VeBTGPYvd 3x5xFeKKFG6Ci3ObVMsVBEfddWpZS4nc54QSyawF2SjmJH/hyyRw5Ny7onO8BommT28A e79g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:dkim-signature; bh=C5HEva8diuj276XKEvIX5UABlaOPEwKA0TPntC6MVG0=; b=s/mNQVMMQBIARXSikRtYhYKizNgLpXLIKuaSMnkxQkW20PBuTlTYkoDY52zSUDH25M wJScBSreJzpotjtDTBqC6JFuxr1MiBF+YAY6TxqRodl05WcXZpn5qFXPzxybfOZmTgQX 7P1qTXP293e1rkqK9ktV4pB4+BtgJBBMd2hP5RPYRZgBDZ2v5dNBtVqHX8qfRQRd3QQR 9O1raRws+sv955c8yJixskluyuxs7vM5igNx4I91JrzXFepXw5E2S0fouIeMNbQ9zRuO y8WtD/43P8N0gG9NhrRCSdTktQKsWMd6RJ73HHpGPqugMp49YUAwPjfcXLSEkZNgrDwS JV/w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=PTZ7s0qj; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id f12sor3343345pgp.66.2019.04.27.05.09.32 for (Google Transport Security); Sat, 27 Apr 2019 05:09:32 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a65:5089:: with SMTP id r9mr48651830pgp.14.1556366972003; Sat, 27 Apr 2019 05:09:32 -0700 (PDT) Received: from localhost.localdomain ([115.97.185.144]) by smtp.gmail.com with ESMTPSA id f14sm1386872pgj.24.2019.04.27.05.09.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 27 Apr 2019 05:09:31 -0700 (PDT) From: Jagan Teki To: Simon Glass , Philipp Tomsich , Kever Yang , Akash Gajjar , Tom Rini , Manivannan Sadhasivam Cc: Paul Kocialkowski , linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, u-boot@lists.denx.de, Jagan Teki Subject: [PATCH v6 10/13] rockchip: rk3399: Add Nanopi NEO4 board support Date: Sat, 27 Apr 2019 17:39:13 +0530 Message-Id: <20190427120916.9033-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=PTZ7s0qj; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add initial support for Nanopi NEO4 board. Specification - Rockchip RK3399 - 1GB DDR3-1866 - SD card slot - eMMC Socket - RTL8211E 1Gbps - AP6212 WiFI/BT - HDMI In/Out, DP, MIPI CSI - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - DC 5V/3A Commit details of rk3399-nanopi-neo4.dts sync from Linux: "arm64: dts: rockchip: Add Nanopi NEO4 initial support" (sha1: 092470b537f19788d957aed12d835a179b606014) Signed-off-by: Jagan Teki --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi | 6 +++ arch/arm/dts/rk3399-nanopi-neo4.dts | 50 ++++++++++++++++++ board/rockchip/evb_rk3399/MAINTAINERS | 6 +++ configs/nanopi-neo4-rk3399_defconfig | 58 +++++++++++++++++++++ 5 files changed, 121 insertions(+) create mode 100644 arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-nanopi-neo4.dts create mode 100644 configs/nanopi-neo4-rk3399_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index e048565bb6..ede7da23fb 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -89,6 +89,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3399-gru-bob.dtb \ rk3399-nanopc-t4.dtb \ rk3399-nanopi-m4.dtb \ + rk3399-nanopi-neo4.dtb \ rk3399-orangepi.dtb \ rk3399-puma-ddr1333.dtb \ rk3399-puma-ddr1600.dtb \ diff --git a/arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi new file mode 100644 index 0000000000..7d22528f49 --- /dev/null +++ b/arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Jagan Teki + */ + +#include "rk3399-nanopi4-u-boot.dtsi" diff --git a/arch/arm/dts/rk3399-nanopi-neo4.dts b/arch/arm/dts/rk3399-nanopi-neo4.dts new file mode 100644 index 0000000000..195410b089 --- /dev/null +++ b/arch/arm/dts/rk3399-nanopi-neo4.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2019 Amarula Solutions B.V. + * Author: Jagan Teki + */ + +/dts-v1/; + +#include "rk3399-nanopi4.dtsi" + +/ { + model = "FriendlyARM NanoPi NEO4"; + compatible = "friendlyarm,nanopi-neo4", "rockchip,rk3399"; + + vdd_5v: vdd-5v { + compatible = "regulator-fixed"; + regulator-name = "vdd_5v"; + regulator-always-on; + regulator-boot-on; + }; + + vcc5v0_core: vcc5v0-core { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_core"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vdd_5v>; + }; + + vcc5v0_usb1: vcc5v0-usb1 { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb1"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&vcc3v3_sys { + vin-supply = <&vcc5v0_core>; +}; + +&u2phy0_host { + phy-supply = <&vcc5v0_usb1>; +}; + +&vbus_typec { + regulator-always-on; + vin-supply = <&vdd_5v>; +}; diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index 5917abb9c1..ed58861820 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -18,6 +18,12 @@ S: Maintained F: configs/nanopi-m4-rk3399_defconfig F: arch/arm/dts/rk3399-nanopi-m4-u-boot.dtsi +NANOPI-NEO4 +M: Jagan Teki +S: Maintained +F: configs/nanopi-neo4-rk3399_defconfig +F: arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi + ORANGEPI-RK3399 M: Jagan Teki S: Maintained diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig new file mode 100644 index 0000000000..eb9d81ae87 --- /dev/null +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -0,0 +1,58 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-neo4" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_ERRNO_STR=y From patchwork Sat Apr 27 12:09:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 303 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pg1-f199.google.com (mail-pg1-f199.google.com [209.85.215.199]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id B6E053F093 for ; Sat, 27 Apr 2019 14:09:38 +0200 (CEST) Received: by mail-pg1-f199.google.com with SMTP id 33sf3829385pgv.17 for ; Sat, 27 Apr 2019 05:09:38 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1556366977; cv=pass; d=google.com; s=arc-20160816; b=b6SD2Js8PHAuv0F2gRdPXRSmRIhHkUaF1XhXX2hqy9vzOJaijxFfZG+/KkWrUYj2zv P+NGDeG8GT81waMC+YoGzO4J75KR3j4lj85IcAt9TkJbjiJcp/2bR27V1MDT8pKzszw6 zKlBabc+qzgSr/pu5IljpitcCi91Bt5J01yZGW3fjRSefNfUc3Ngm0AWdjZxqZQKF/ks zZsGjxLWNRjerKs5LM1uSBAZDvj71OyO3Oy4h91ChuyDYVr1eS5o8vVt4Wm7tXguqg1O 0iuJ0UNmFPDb+OMUTdrHwoObEy2E5bvw+qc4SYTrgcaN0/zSGythw1asM3ogsiaN3IVK Wh7w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=CqIeE2PDG/K3FBn08Q4ZScQuWV+cSbPEqYI3FG3eqN8=; b=lAtwfo/3gLaLDz/ItIhyFzwMYWtQESOd3WaPXvPgrLTey+/YzfTnU9Iqdhu9RfL17I R/KbbS0Jp049D1ezttr/XHP1N9tTan4R2sMaaIFlYY10jJwLM+KPEnHBbBfiyaM1BeIT q5FX17Zm8tmddAoaptjmEZgSbRlVcTFvPBqNEtzjwg7LGNR9md74QYHiwfgsk/ym+WKM vPCTUntL48pkyduF35IOhJEJfJxXoZj6MueS2AS1Im3mRX6T9H+bt0hx2B/ZQNdgMIPb C1iUq/MTV/7aLnHhXgEuDxYwygqwrhNj7sI1cioT3Mkss5ogS8Ea/bXF62i1ErLP8V5w bXaQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=PFem2gnf; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=CqIeE2PDG/K3FBn08Q4ZScQuWV+cSbPEqYI3FG3eqN8=; b=abLC4VxSfTBZm+N5XNDaU5cDfcsv4zVTxih6ykZWa7Ak5IwdXuj4Tc8KjW0U9N7o1F 7UZa9HxnDt1mCr3FCA8POe6cYyPZTy7+TOma31534ji/z8TAtClt84e4PMywg2Rf9c6G ilurdtlP6K0bxOFlBebyb3qTeHPsE97Ui0ZHQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=CqIeE2PDG/K3FBn08Q4ZScQuWV+cSbPEqYI3FG3eqN8=; b=jJj8lRDgMpXKBtPBPwqD41Em3Z9nfg85LIYp5iGMCat8p/hJMT+wtBJLIkD+dKcQX/ xhSmaseOwMaQiLAicCq9JZLoN0H2kZOe17ZGZA0xxSaMSVShxp9ESBSSSkgxoEJ6jbHK ELBsj/Gd5DMwoq5gR/0Ick9fASJ9AgA1tA/F28D8MmCayYH1OEVdKmrvciaI7rjPIGJb o/sXteOqLJPoL3ZkcXYlzcVP9fhLWcG8jVk0Z9f1eQj/E88AepW42AofBKc7FnNfQ2s9 Y4gXoFR6+vGXhWbMqwSRPGGOR9yTDo8NAN3VLNU7dCQUmvSv++HH+sZ24xNcSi7OtE65 mZRQ== X-Gm-Message-State: APjAAAUFUkTqkCK7bLsbfjiL9O7UOd0NJbZft5wfnqIIVil0HCI7ux9F +g2+bwJsoP95nsowrHWKmOp+yL9I X-Google-Smtp-Source: APXvYqyxgClpEefdR1lPplslCPuRLrvGxSXMD9jlfbEzXoJbHfuUlxwm9GuPhfzwuwL3zODs5DYb1Q== X-Received: by 2002:a63:20f:: with SMTP id 15mr13126668pgc.90.1556366977432; Sat, 27 Apr 2019 05:09:37 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a62:63c4:: with SMTP id x187ls94608pfb.9.gmail; Sat, 27 Apr 2019 05:09:37 -0700 (PDT) X-Received: by 2002:a63:40c2:: with SMTP id n185mr15214570pga.364.1556366976970; Sat, 27 Apr 2019 05:09:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556366976; cv=none; d=google.com; s=arc-20160816; b=BOsiPcnVmxnCZ0QZgac4093/wLjh5GLTTNaKQYypOWKtDak8Xbv6Mzolsk1WVs5Adl uPLPuFEOUCKX3CNgY3tDIAvSbHIIoTVzjPL0bQGNWZxjEVsNthvfy7ojkP1U8llNB4rk C+KxPri59NoM6RpfJhsJ8sf6b/cf5LSNsCcJEoYwjL4pylUHdwR5n1GtlKvQdFLjYZCj skicg6pWeLpHUPOQuhkzgwfyuAVmAmZQqt4SJySJi3UGFVQsAQY0qDynvTsgI4k2lpQ6 Shla2hNe58hp00pBOaKxPZKx5Jy0quaX7Y2JZuOBl9YymHS7Z5OqrxEgfiRwub+ErfdJ xnfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Y+odxb7e2SyviCfoXMG3aZDT9QlLLlBgwlsyzM31e/4=; b=qZEYKjSNU+/5HAnW2/4PSPArcwxDkMGiktQK909LgqPWuMQDe5XTwjSL66x3Uk4Uw2 WF/cphNkM4ehzcMBgSSdN6lM1FoVG4MOBBEp4m5/ItMgK2ooB1oF3zVdE8JyzcabFwtX ac9fMOCv/+zAjDuFj2HM8ESydzesUFprfSzC58tCVHVQa82gPSSgNTmETlWnNrbyJLx6 CQSwN65NZfr2ZeUlkRocMkiUBnYCruF3htBo1+ttXuy/5d/AIYwb/9NjLi5Bho0RKZqW ZWnpHOewGalvbWB2CGGoES6t2607hW8ma7jZZIdDxOvw6rS6kVoDUj6ss+0S6H3OXlqE vxVw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=PFem2gnf; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id u6sor12873784pls.13.2019.04.27.05.09.36 for (Google Transport Security); Sat, 27 Apr 2019 05:09:36 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:902:61:: with SMTP id 88mr50874407pla.166.1556366976433; Sat, 27 Apr 2019 05:09:36 -0700 (PDT) Received: from localhost.localdomain ([115.97.185.144]) by smtp.gmail.com with ESMTPSA id f14sm1386872pgj.24.2019.04.27.05.09.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 27 Apr 2019 05:09:35 -0700 (PDT) From: Jagan Teki To: Simon Glass , Philipp Tomsich , Kever Yang , Akash Gajjar , Tom Rini , Manivannan Sadhasivam Cc: Paul Kocialkowski , linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, u-boot@lists.denx.de, Jagan Teki Subject: [PATCH v6 11/13] rockchip: rk3399: Add Rockpro64 board support Date: Sat, 27 Apr 2019 17:39:14 +0530 Message-Id: <20190427120916.9033-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190427120916.9033-1-jagan@amarulasolutions.com> References: <20190427120916.9033-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=PFem2gnf; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add initial support for Rockpro64 board. Specification - Rockchip RK3399 - 2/4GB Dual-Channel LPDDR3 - SD card slot - eMMC socket - 128Mb SPI Flash - Gigabit ethernet - PCIe 4X slot - WiFI/BT module socket - HDMI In/Out, DP, MIPI DSI/CSI, eDP - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - DC 12V/2A Commit details of rk3399-rockpro64.dts sync from Linux 5.1-rc2: "arm64: dts: rockchip: rockpro64 dts add usb regulator" (sha1: 6db644c79c8d45d73b56bc389aebd85fc3679beb) 'Akash' has sent an initial patch before, so I keep him as board maintainer and I'm co-maintainer based on our conversation. Signed-off-by: Akash Gajjar Signed-off-by: Jagan Teki --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 6 + arch/arm/dts/rk3399-rockpro64.dts | 712 ++++++++++++++++++++++ board/rockchip/evb_rk3399/MAINTAINERS | 7 + configs/rockpro64-rk3399_defconfig | 58 ++ 5 files changed, 784 insertions(+) create mode 100644 arch/arm/dts/rk3399-rockpro64-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-rockpro64.dts create mode 100644 configs/rockpro64-rk3399_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ede7da23fb..23a9807444 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -95,6 +95,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3399-puma-ddr1600.dtb \ rk3399-puma-ddr1866.dtb \ rk3399-rock960.dtb \ + rk3399-rockpro64.dtb \ rv1108-elgin-r1.dtb \ rv1108-evb.dtb dtb-$(CONFIG_ARCH_MESON) += \ diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi new file mode 100644 index 0000000000..7bddc3acdb --- /dev/null +++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Jagan Teki + */ + +#include "rk3399-u-boot.dtsi" diff --git a/arch/arm/dts/rk3399-rockpro64.dts b/arch/arm/dts/rk3399-rockpro64.dts new file mode 100644 index 0000000000..1f2394e058 --- /dev/null +++ b/arch/arm/dts/rk3399-rockpro64.dts @@ -0,0 +1,712 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. + * Copyright (c) 2018 Akash Gajjar + */ + +/dts-v1/; +#include +#include +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { + model = "Pine64 RockPro64"; + compatible = "pine64,rockpro64", "rockchip,rk3399"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + pinctrl-names = "default"; + pinctrl-0 = <&pwrbtn>; + + power { + debounce-interval = <100>; + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; + label = "GPIO Key Power"; + linux,code = ; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>; + + work-led { + label = "work"; + default-state = "on"; + gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; + }; + + diy-led { + label = "diy"; + default-state = "off"; + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk808 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; + + vcc12v_dcin: vcc12v-dcin { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + /* switched by pmic_sleep */ + vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8>; + }; + + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pwr_en>; + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc12v_dcin>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-name = "vcc5v0_host"; + regulator-always-on; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_typec: vcc5v0-typec-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_typec_en>; + regulator-name = "vcc5v0_typec"; + regulator-always-on; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_usb: vcc5v0-usb { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 1>; + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x28>; + rx_delay = <0x11>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c3>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio1>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc6-supply = <&vcc5v0_sys>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + vcc10-supply = <&vcc5v0_sys>; + vcc11-supply = <&vcc5v0_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcca_1v8>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-name = "vdd_center"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-name = "vdd_cpu_l"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc1v8_dvp: LDO_REG1 { + regulator-name = "vcc1v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v0_touch: LDO_REG2 { + regulator-name = "vcc3v0_touch"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_1v8: LDO_REG3 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sdio: LDO_REG4 { + regulator-name = "vcc_sdio"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcca3v0_codec: LDO_REG5 { + regulator-name = "vcca3v0_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name = "vcc_1v5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcca1v8_codec: LDO_REG7 { + regulator-name = "vcca1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v0: LDO_REG8 { + regulator-name = "vcc_3v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc3v3_s3: vcc_lan: SWITCH_REG1 { + regulator-name = "vcc3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_s0: SWITCH_REG2 { + regulator-name = "vcc3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&vsel1_gpio>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&vsel2_gpio>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + i2c-scl-rising-time-ns = <300>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c4 { + i2c-scl-rising-time-ns = <600>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + + fusb0: typec-portc@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio1>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&fusb0_int>; + vbus-supply = <&vcc5v0_typec>; + status = "okay"; + }; +}; + +&i2s0 { + rockchip,playback-channels = <8>; + rockchip,capture-channels = <8>; + status = "okay"; +}; + +&i2s1 { + rockchip,playback-channels = <2>; + rockchip,capture-channels = <2>; + status = "okay"; +}; + +&i2s2 { + status = "okay"; +}; + +&io_domains { + status = "okay"; + + bt656-supply = <&vcc1v8_dvp>; + audio-supply = <&vcca1v8_codec>; + sdmmc-supply = <&vcc_sdio>; + gpio1830-supply = <&vcc_3v0>; +}; + +&pmu_io_domains { + pmu1830-supply = <&vcc_3v0>; + status = "okay"; +}; + +&pinctrl { + buttons { + pwrbtn: pwrbtn { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + fusb302x { + fusb0_int: fusb0-int { + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + work_led_gpio: work_led-gpio { + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + diy_led_gpio: diy_led-gpio { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie_pwr_en: pcie-pwr-en { + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_gpio: vsel1-gpio { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb-typec { + vcc5v0_typec_en: vcc5v0_typec_en { + rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb2 { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca1v8_s3>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + status = "okay"; +}; + +&tcphy0 { + status = "okay"; +}; + +&tcphy1 { + status = "okay"; +}; + +&tsadc { + /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode = <1>; + /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity = <1>; + status = "okay"; +}; + +&u2phy0 { + status = "okay"; + + u2phy0_otg: otg-port { + status = "okay"; + }; + + u2phy0_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&u2phy1 { + status = "okay"; + + u2phy1_otg: otg-port { + status = "okay"; + }; + + u2phy1_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; + dr_mode = "otg"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index ed58861820..c724162ef3 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -30,3 +30,10 @@ S: Maintained F: configs/orangepi-rk3399_defconfig F: arch/arm/dts/rk3399-u-boot.dtsi F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi + +ROCKPRO64 +M: Akash Gajjar +M: Jagan Teki +S: Maintained +F: configs/rockpro64-rk3399_defconfig +F: arch/arm/dts/rk3399-rockpro64-u-boot.dtsi diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig new file mode 100644 index 0000000000..3d0c7d0c6d --- /dev/null +++ b/configs/rockpro64-rk3399_defconfig @@ -0,0 +1,58 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_ERRNO_STR=y From patchwork Sat Apr 27 12:09:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 304 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f198.google.com (mail-pf1-f198.google.com [209.85.210.198]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 6B8C33F08F for ; Sat, 27 Apr 2019 14:09:43 +0200 (CEST) Received: by mail-pf1-f198.google.com with SMTP id u78sf3921075pfa.12 for ; Sat, 27 Apr 2019 05:09:43 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1556366982; cv=pass; d=google.com; s=arc-20160816; b=PFaPf5eQb6g3aLian5lVYRW0atTEgJYAqPfk2K1tkV7f/iKtWBwqs+s8HjMQ7fMrnc ovDI2jSGUYxK1ZEvKO4S65OkjbQ0C7cF+6EiKfLeKtj6A6onUJu57StyfFU9azteMEuK QiGBEndgBrAYM8i7vw+22U3ehXcWOYLTDr0UQrSiSCHmb+L0YjmTtRcNbBfEcrQbPMnF nfuBhM44Jk8MfcPH7shyFNz2YZB2hVcWgL+ihQ9lL7HXKv/vHU1yDZtscgc9HMQhIaiD xTOtgTeACHfzahyHYzb7YSwn8YOyfUJjUMzfdLpKH4UwYx4L2xxcBFCBDetryJ+72wDr pNeA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=eNQEe78HzgJ7Wwuh12NzZ45ijPArtCRMl0L5yor+RHM=; b=IOkV9aa8lSJfEjLG6aBSiq/p3mzPQomaqQKnfdBD3An8e+nO8bL5a+hKsM3p8h65zx o5c3hAjNETFAINjoa9Lzdx10Vae+Ic0LEkdz/Y9pX2051NLISabZQrSPbSR5XkxjR2oh FZjuTdwz7Y0j430pMTHkFtCapZnzAsIE+E0bp2eusrmg/41bfPZwn8oMCh2H/Wa5+VQ/ Bkzy/OIwVblMsxOveX/vyjvXhY0sQrCDVIYhulyG+JTSYq4sQ+EX1uJOzugEXhYHATjk WDIhSJkt9j0L6bSri4kMOMejYw2Lzrme2IjtHJXOr+cOt+gUOj+ftzAhk3E/XKlz33sf hAFQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=L8fCmnCC; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=eNQEe78HzgJ7Wwuh12NzZ45ijPArtCRMl0L5yor+RHM=; b=ZLc+OBnc8mIeAegGOK4oZCEcTLm8qfZCCJm5+YcYqs1/vRJYspVWcLNN2UFBPIX72P rixZXvCj5iMyFUb9QKNjexAtg0Ag0WuZJ0ph3gk1/YUsZIQQsfpCxHUVeh+x3Fu6S1qd E82J7E29oRdsVhEZ4JLTIPSv4LtMHtlzhX29E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=eNQEe78HzgJ7Wwuh12NzZ45ijPArtCRMl0L5yor+RHM=; b=eY1jeKoxBmBkRpSbuDqZ6TnVVXIQFIfipnzCAvrIRSOqFcd677m05kYvMWRgpZ0ZJV 1jMFFo6oBNMX2wGtjGEz/J0KhntIUcxvK1cbe3pXbSnacKCpn6wh1aII46NzFzqoxqib KpIdRkvRq+1aPuawAbES5i40KkjB9KbHY/npe34hS64u2KUsVUkeKkUsGbLfCEL0lNgZ LaJqgxSy/sQ0ZL88/B453NtwWqrVxVQTglr8rozD25czIrd98DbbCLMq0UsiRklSF4cs zFbJMyFMfxMKl6RmhHALvJ+YKmf9ijVofBCIpxUnjhaKxJkPsEXwmtPmfLLHkgyL0eWA ubWg== X-Gm-Message-State: APjAAAXdux6eNBwPpjdQprXi8239mx0aOPoEYUcWX/GGiMAE2wxJsAYL cVkG3nhVjLceZiA9VF7FGJP89xa/ X-Google-Smtp-Source: APXvYqz9HrCJ5ONMePOEq2EH+LCXFzE2Jo1dusxVeUB4OSvYapGkvBlPbnWDcGWSlUiq0EgCIIJcWA== X-Received: by 2002:a63:5715:: with SMTP id l21mr21316154pgb.279.1556366982164; Sat, 27 Apr 2019 05:09:42 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a65:450d:: with SMTP id n13ls29922pgq.5.gmail; Sat, 27 Apr 2019 05:09:41 -0700 (PDT) X-Received: by 2002:aa7:914d:: with SMTP id 13mr52652856pfi.149.1556366981692; Sat, 27 Apr 2019 05:09:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556366981; cv=none; d=google.com; s=arc-20160816; b=EgByGcfqry7I3nrCUuMTNXB3d8NbM2SIyeub31noJ6KlfyP1Snf1ixd6OvoxwgGvCQ 1RwszUdux4H4tjF6uv6UT6UThVjzSBAxRkpHzWncKbKkQ5BOuhKTZdYrK3Wap8ZFQEUr Na0FxJOIgI2h9X4G4cUKqN4YSGvPGzgtPSF7oahA+e30NKl/ONzz0yNhiue2ajAYUcpf m+xFUSTRmmiF/pd3cTN1wUY86wU15+/X+WiKjUUqmgxgeJjfIiUA3fa/Z5QBzk4eiMYl 4UpM1vdq3IOse91rcN3BHnz4uJtFOwwR80ze2HS8Rz97rT8oCs5Id+tmqAkzxF5CXwA7 sRNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=wgid28GwLW06ZDyqOEy6uGBCil4hovFDVOiLqMv18n8=; b=qrmiT3IUIaIBneQamp9e4mgQuWE00ijkQemeO/2t/311pDH/mQ4brWgSV3IRArZso0 ftta6kZFBVXTu6plf4cVAKEjuvqYF6Ju+S1JetaumUnK+TovfmG73l0/ajMW9L8zz1WN ySfCckfXlV07jKwLxWSVPOfXrIYr2666ismtmZJoj0BTMdtiZViMZDJbKPxvRDmlPUWf CEVYQbkkJFb5t1WXzbqU1G17CKF7RXPJugkAI1cfWjMbpKO34/Os/DmPiYA3BwfKr3Pb 31rmXKmPkpqUJWtQTYBA/kmRRLPHYQbdAkdZ+FncGm8B4jorpnbPmMKnjJZS5Zt5slYP AQsg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=L8fCmnCC; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id r10sor3337044pga.28.2019.04.27.05.09.41 for (Google Transport Security); Sat, 27 Apr 2019 05:09:41 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a65:48ca:: with SMTP id o10mr5656542pgs.136.1556366981189; Sat, 27 Apr 2019 05:09:41 -0700 (PDT) Received: from localhost.localdomain ([115.97.185.144]) by smtp.gmail.com with ESMTPSA id f14sm1386872pgj.24.2019.04.27.05.09.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 27 Apr 2019 05:09:40 -0700 (PDT) From: Jagan Teki To: Simon Glass , Philipp Tomsich , Kever Yang , Akash Gajjar , Tom Rini , Manivannan Sadhasivam Cc: Paul Kocialkowski , linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, u-boot@lists.denx.de, Jagan Teki Subject: [PATCH v6 12/13] rockchip: rk3399: Add Rock PI 4 support Date: Sat, 27 Apr 2019 17:39:15 +0530 Message-Id: <20190427120916.9033-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190427120916.9033-1-jagan@amarulasolutions.com> References: <20190427120916.9033-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=L8fCmnCC; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add initial support for Rock PI 4 board. Specification - Rockchip RK3399 - LPDDR4 - eMMC - SD card slot - RTL8211E 1Gbps - HDMI In/Out, DP, MIPI DSI/CSI - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-rock-pi-4.dts sync from Linux 5.1-rc2: "arm64: dts: rockchip: add ROCK Pi 4 DTS support" (sha1: 1b5715c602fda7b812af0e190eddcce2812e5417) Signed-off-by: Akash Gajjar Signed-off-by: Jagan Teki --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi | 6 + arch/arm/dts/rk3399-rock-pi-4.dts | 606 ++++++++++++++++++++++ board/rockchip/evb_rk3399/MAINTAINERS | 7 + configs/rock-pi-4-rk3399_defconfig | 58 +++ 5 files changed, 678 insertions(+) create mode 100644 arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-rock-pi-4.dts create mode 100644 configs/rock-pi-4-rk3399_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 23a9807444..a2911fa2fd 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -94,6 +94,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3399-puma-ddr1333.dtb \ rk3399-puma-ddr1600.dtb \ rk3399-puma-ddr1866.dtb \ + rk3399-rock-pi-4.dtb \ rk3399-rock960.dtb \ rk3399-rockpro64.dtb \ rv1108-elgin-r1.dtb \ diff --git a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi new file mode 100644 index 0000000000..7bddc3acdb --- /dev/null +++ b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Jagan Teki + */ + +#include "rk3399-u-boot.dtsi" diff --git a/arch/arm/dts/rk3399-rock-pi-4.dts b/arch/arm/dts/rk3399-rock-pi-4.dts new file mode 100644 index 0000000000..4a543f2117 --- /dev/null +++ b/arch/arm/dts/rk3399-rock-pi-4.dts @@ -0,0 +1,606 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Akash Gajjar + * Copyright (c) 2019 Pragnesh Patel + */ + +/dts-v1/; +#include +#include +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { + model = "Radxa ROCK Pi 4"; + compatible = "radxa,rockpi4", "rockchip,rk3399"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + vcc12v_dcin: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc5v0_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pwr_en>; + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-name = "vcc5v0_host"; + regulator-always-on; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_typec: vcc5v0-typec-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_typec_en>; + regulator-name = "vcc5v0_typec"; + regulator-always-on; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_lan: vcc3v3-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_lan"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 1>; + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x28>; + rx_delay = <0x11>; + status = "okay"; +}; + +&hdmi { + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio1>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc6-supply = <&vcc5v0_sys>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + vcc10-supply = <&vcc5v0_sys>; + vcc11-supply = <&vcc5v0_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc_1v8>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-name = "vdd_center"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-name = "vdd_cpu_l"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc1v8_codec: LDO_REG1 { + regulator-name = "vcc1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_hdmi: LDO_REG2 { + regulator-name = "vcc1v8_hdmi"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_1v8: LDO_REG3 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sdio: LDO_REG4 { + regulator-name = "vcc_sdio"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcca3v0_codec: LDO_REG5 { + regulator-name = "vcca3v0_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name = "vcc_1v5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcc0v9_hdmi: LDO_REG7 { + regulator-name = "vcc0v9_hdmi"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v0: LDO_REG8 { + regulator-name = "vcc_3v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc_cam: SWITCH_REG1 { + regulator-name = "vcc_cam"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_mipi: SWITCH_REG2 { + regulator-name = "vcc_mipi"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&vsel1_gpio>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&vsel2_gpio>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + i2c-scl-rising-time-ns = <300>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c4 { + i2c-scl-rising-time-ns = <600>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; +}; + +&i2s0 { + rockchip,playback-channels = <8>; + rockchip,capture-channels = <8>; + status = "okay"; +}; + +&i2s1 { + rockchip,playback-channels = <2>; + rockchip,capture-channels = <2>; + status = "okay"; +}; + +&i2s2 { + status = "okay"; +}; + +&io_domains { + status = "okay"; + + bt656-supply = <&vcc_3v0>; + audio-supply = <&vcc_3v0>; + sdmmc-supply = <&vcc_sdio>; + gpio1830-supply = <&vcc_3v0>; +}; + +&pmu_io_domains { + status = "okay"; + + pmu1830-supply = <&vcc_3v0>; +}; + +&pinctrl { + pcie { + pcie_pwr_en: pcie-pwr-en { + rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_gpio: vsel1-gpio { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + usb-typec { + vcc5v0_typec_en: vcc5v0-typec-en { + rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb2 { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm2 { + status = "okay"; +}; + +&saradc { + status = "okay"; + + vref-supply = <&vcc_1v8>; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + status = "okay"; +}; + +&tcphy0 { + status = "okay"; +}; + +&tcphy1 { + status = "okay"; +}; + +&tsadc { + status = "okay"; + + /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode = <1>; + /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity = <1>; +}; + +&u2phy0 { + status = "okay"; + + u2phy0_otg: otg-port { + status = "okay"; + }; + + u2phy0_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&u2phy1 { + status = "okay"; + + u2phy1_otg: otg-port { + status = "okay"; + }; + + u2phy1_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; + dr_mode = "otg"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index c724162ef3..6da4381df6 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -31,6 +31,13 @@ F: configs/orangepi-rk3399_defconfig F: arch/arm/dts/rk3399-u-boot.dtsi F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi +ROCK-PI-4 +M: Akash Gajjar +M: Jagan Teki +S: Maintained +F: configs/rock-pi-4-rk3399_defconfig +F: arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi + ROCKPRO64 M: Akash Gajjar M: Jagan Teki diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig new file mode 100644 index 0000000000..626cb7faea --- /dev/null +++ b/configs/rock-pi-4-rk3399_defconfig @@ -0,0 +1,58 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_ERRNO_STR=y From patchwork Sat Apr 27 12:09:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 305 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pl1-f199.google.com (mail-pl1-f199.google.com [209.85.214.199]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id B10FF3F08F for ; Sat, 27 Apr 2019 14:09:49 +0200 (CEST) Received: by mail-pl1-f199.google.com with SMTP id x9sf3514060pln.0 for ; Sat, 27 Apr 2019 05:09:49 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1556366987; cv=pass; d=google.com; s=arc-20160816; b=yXk6DUn/mCIU1ttlzQd7MDxLZBZo0DgS3Dae/SEqhUmH+YYlUd9e1U0SoHM04eS7zL S6H55w3MJ65h2mXEopNRqcDZ8HPaESM6Ys0RUP1fTlksOqa75E55ugnp67qiQ41hE9Ul cRMyTEEJR41uamgkRlPAUXZXf6DBwqYiQgTI7lEiNkn4LME9Rz4KcvkJ0tBt6+2RM0WA X9eiNyXQgNvcTZgWQwz9oPfqLSvo97rUvwz5V9+8DWSYGJH7nsypFQjcY9Z7duLMCndX y/9aZPvqdUYVrpFhh8Y+HiBVE2wfmSW3HJa73Q25YzJLcgmJKK4bQ6HgtXLWZc1z1T97 GZ8A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Do7ulJzwtdHhlb3mb7DwOrqSkYXNVDJNGCB2Q+CRAKU=; b=teKMV+gJIScp3b5tAiRiG/xgIqLbqW8kyIeOmGcwgkrux+pn5i4etNwAxTGpvmhgik UuAhtw/n5uv8e2RjDosjMmGPJEzhjzFYbKa1+Bk5hL4uy6JMLuopBvX3cWEf4e1czYAf yKCh8BRwXczgqpED/TTcWHzf8/fNAjgOuLx9Woy+Mzd7FEpcth0xZE30XlK2I1aM0poy 02mfwD7alV6hAVTArFkfgQckEG+LKDcuQsy+HdrM7+iAICc2M98jOC16qYAxwIAqbYJ8 R5m3vljQNZPqBIfkYy5s7YuYg9VYLpEab6HMxmAhS3dV2YN1Tm0TIeIeFShlyt5zsvaf re3w== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=N3KcFRQV; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=Do7ulJzwtdHhlb3mb7DwOrqSkYXNVDJNGCB2Q+CRAKU=; b=LZQIwt1HvsEusMqplGKXQfrsJyHGK3YE1SY+oWbbXRKRn7YTv0ZZy0stvDLo7iMKe2 ykkHx2ks0cgVnUsQvHeRqBtlPZ1In+pLmOT6OuxciPZEtTcHCOckWOWUIPEQT2u4is5X mnH5El9bYGRxsivuAxIBqv7TYUP6QIrErNQBc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=Do7ulJzwtdHhlb3mb7DwOrqSkYXNVDJNGCB2Q+CRAKU=; b=tAgGYktuoQSD0IBfqGDXCy2CtuFsDwECKiwv1uzADF+Cd6nnpNOx5j75oh0jBVvLaF ioyWcGBjjwiGeGoBb9F0ulMIev2+EkNJ9DrzizI3zhUMs3SPTQzyvPM2S+HdAjhVNS1J h5r/1Vo6UeVofNMHYssf0uloOZlncGL2eFVp+zCTh7yX60CRgxwfvW3ah9thmT7dRLqV B6QCqPshldIPac2Zn28gUGqWeKFN96mNboIFM4mafcwd+iX1ACeu4JJ7nFseZC83pMYm ErO9/4a4fRSw9SZYbxmXxYK/mg6CR7BE/0u+9mO7ZPWJwaYplf6/b0CD97iu/AQNeCMx czQw== X-Gm-Message-State: APjAAAW1eRX+SXgbM+KyVA21WYPtaFbW7+bo4qmeEi4SyULy4Qf5wcaP ciIgt3bScoe/M8Gr2IxTvAeI2vWC X-Google-Smtp-Source: APXvYqw+ScGfmd4W3pE0JkB3f+JsVZuNWteT8dOb3ibt9YPipkExU9B0l3LAHksF3IycAWzDoAgiCw== X-Received: by 2002:a63:318b:: with SMTP id x133mr47244pgx.297.1556366986988; Sat, 27 Apr 2019 05:09:46 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a63:1c8:: with SMTP id 191ls6951446pgb.0.gmail; Sat, 27 Apr 2019 05:09:46 -0700 (PDT) X-Received: by 2002:a62:5797:: with SMTP id i23mr52559842pfj.12.1556366986547; Sat, 27 Apr 2019 05:09:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556366986; cv=none; d=google.com; s=arc-20160816; b=vUTSZYN7QIoxODN02g0ltSW+iGZbVjLGw9ZrceLRVgnX+8vLBg84GRYy53gHEugaLr ActPfgMQ8ZJEw4h8vHKfMe6IAmn3rtxuQvGSbejkzkQZUX2NnE02cxPYkHPDUOYYYEn2 QOsiJP8CtFbq+Z0fFUBEeqF+BDgVSNa/XjO/qJBjb7C4a8E+6tj2aiSPKp7GX6t1xgPI geuYPNnuAsLAW2lcuX6kqqJ0M04rWVGFDKKGA+GDeQpSMb864pSVL28hL5+z6Oj5RyHq Q9kRRCyY6UPNh+FOcKvvaThMP/uOMUetcPRrgn7JNZkwEtfXqUAg/F0c3DZaf6/qVG25 If0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=j27ROTMPlvJQFdkm16NvRhONhh+bMCHFPK83ST3x/OU=; b=EvolMlP0o0At8wPMnethIDWkO3+2pCxuAEsB/CojAMz0Ez2GWn93LPNU32f4sxa2eZ LyzQSjH2UHHDqVi/2LMdGlR4atFZ2kahT8EwfTaivoJfUZ9puxKprNJfjCM1BgB8IOGy htH+awpYw25WWg8sGXu4AW8CsvvAPD0dEX2S/dXHWyrJB6WodP3Yfr55wg5oBCkQj0D4 2RymDaM202JvdrWWg5D3HQrwptTLm+xu0KXc79nABwtxK0X/RtZj9zsqFrDFM5lSzYRr zh7jq2v4mVv3ng2Q/fgdaM5NT7CymIRQJXmPRe1eQuwBLpO5WYUYHI0by2ajbyx9x9Sq /VjA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=N3KcFRQV; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id a23sor3361993pgm.45.2019.04.27.05.09.46 for (Google Transport Security); Sat, 27 Apr 2019 05:09:46 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a63:2bc8:: with SMTP id r191mr13282693pgr.72.1556366986142; Sat, 27 Apr 2019 05:09:46 -0700 (PDT) Received: from localhost.localdomain ([115.97.185.144]) by smtp.gmail.com with ESMTPSA id f14sm1386872pgj.24.2019.04.27.05.09.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 27 Apr 2019 05:09:45 -0700 (PDT) From: Jagan Teki To: Simon Glass , Philipp Tomsich , Kever Yang , Akash Gajjar , Tom Rini , Manivannan Sadhasivam Cc: Paul Kocialkowski , linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, u-boot@lists.denx.de, Jagan Teki Subject: [PATCH v6 13/13] doc: rockchip: Add global doc for rk3399 build/flash Date: Sat, 27 Apr 2019 17:39:16 +0530 Message-Id: <20190427120916.9033-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190427120916.9033-1-jagan@amarulasolutions.com> References: <20190427120916.9033-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=N3KcFRQV; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Since rockchip have an individual doc/README.rockchip, it would be better to update the same instead of maintaining it separately in board files. So, add the documentation for rk3399 - procedure to build for Rockchip miniloader and U-Boot SPL options - procedure to boot from SD for Rockchip miniloader and U-Boot SPL options - procedure to build ATF, PMU M0 firmware for puma boards - add boot logs of each option, so-that it would help for future boards porting Signed-off-by: Jagan Teki Reviewed-by: Philipp Tomsich --- doc/README.rockchip | 233 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 232 insertions(+), 1 deletion(-) diff --git a/doc/README.rockchip b/doc/README.rockchip index ec10ebbc26..ca4d6473b0 100644 --- a/doc/README.rockchip +++ b/doc/README.rockchip @@ -88,10 +88,92 @@ One RV3188 baord is supported: For example: +1. To build RK3288 board: + CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all -(or you can use another cross compiler if you prefer) + (or you can use another cross compiler if you prefer) + +2. To build RK3399 board: + + Option 1: Package the image with Rockchip miniloader: + + - Compile U-Boot + + => cd /path/to/u-boot + => make nanopi-neo4-rk3399_defconfig + => make + => make u-boot.itb + + - Get the rkbin + + => git clone https://github.com/rockchip-linux/rkbin.git + + - Create trust.img + + => cd /path/to/rkbin + => ./tools/trust_merger RKTRUST/RK3399TRUST.ini + + - Create uboot.img + + => cd /path/to/rkbin + => ./tools/loaderimage --pack --uboot /path/to/u-boot/u-boot-dtb.bin uboot.img + + (Get trust.img and uboot.img) + + Option 2: Package the image with SPL: + + - We need the Python elftools.elf.elffile library for make_fit_atf.py to work + + => sudo apt-get install python-pyelftools + + - Export cross compiler path for aarch64 + + - Compile ATF + + For Puma board. + + => git clone git://git.theobroma-systems.com/arm-trusted-firmware.git + => cd arm-trusted-firmware + => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31 + + (copy bl31.bin into U-Boot root dir) + => cp build/rk3399/release/bl31/bl31.bin /path/to/u-boot/bl31-rk3399.bin + + For rest of rk3399 boards. + + => git clone https://github.com/ARM-software/arm-trusted-firmware.git + => cd arm-trusted-firmware + + (export cross compiler path for Cortex-M0 MCU likely arm-none-eabi-) + => make realclean + => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 + + (copy bl31.elf into U-Boot root dir) + => cp build/rk3399/release/bl31/bl31.elf /path/to/u-boot + + - Compile PMU M0 firmware + + This is optional for most of the rk3399 boards and required only for Puma board. + + => git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git + => cd rk3399-cortex-m0 + (export cross compiler path for Cortex-M0 PMU) + => make CROSS_COMPILE=arm-cortex_m0-eabi- + + (copy rk3399m0.bin into U-Boot root dir) + => cp rk3399m0.bin /path/to/u-boot + + - Compile U-Boot + + => cd /path/to/u-boot + => make orangepi-rk3399_defconfig + => make + => make u-boot.itb + + (Get spl/u-boot-spl-dtb.bin, u-boot.itb images and some boards would get + spl/u-boot-spl.bin since it doesn't enable CONFIG_SPL_OF_CONTROL) Writing to the board with USB ============================= @@ -225,6 +307,153 @@ tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out truncate -s %2048 u-boot.bin cat u-boot.bin | split -b 512 --filter='openssl rc4 -K 7C4E0304550509072D2C7B38170D1711' >> out +Booting from an SD card on RK3399 +================================= + +To write an image that boots from an SD card (assumed to be /dev/sdc): + +Option 1: Package the image with Rockchip miniloader: + + - Create idbloader.img + + => cd /path/to/u-boot + => ./tools/mkimage -n rk3399 -T rksd -d /path/to/rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin idbloader.img + => cat /path/to/rkbin/bin/rk33/rk3399_miniloader_v1.19.bin >> idbloader.img + + - Write idbloader.img at 64 sector + + => sudo dd if=idbloader.img of=/dev/sdc seek=64 + + - Write trust.img at 24576 + + => sudo dd if=trust.img of=/dev/sdc seek=24576 + + - Write uboot.img at 16384 sector + + => sudo dd if=uboot.img of=/dev/sdc seek=16384 + => sync + +Put this SD (or micro-SD) card into your board and reset it. You should see +something like: + +DDR Version 1.20 20190314 +In +Channel 0: DDR3, 933MHz +Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB +no stride +ch 0 ddrconfig = 0x101, ddrsize = 0x20 +pmugrf_os_reg[2] = 0x10006281, stride = 0x17 +OUT +Boot1: 2019-03-14, version: 1.19 +CPUId = 0x0 +ChipType = 0x10, 239 +mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000 +mmc: ERROR: Card did not respond to voltage select! +emmc reinit +mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000 +mmc: ERROR: Card did not respond to voltage select! +emmc reinit +mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000 +mmc: ERROR: Card did not respond to voltage select! +SdmmcInit=2 1 +mmc0:cmd5,20 +SdmmcInit=0 0 +BootCapSize=0 +UserCapSize=60543MB +FwPartOffset=2000 , 0 +StorageInit ok = 45266 +SecureMode = 0 +SecureInit read PBA: 0x4 +SecureInit read PBA: 0x404 +SecureInit read PBA: 0x804 +SecureInit read PBA: 0xc04 +SecureInit read PBA: 0x1004 +SecureInit read PBA: 0x1404 +SecureInit read PBA: 0x1804 +SecureInit read PBA: 0x1c04 +SecureInit ret = 0, SecureMode = 0 +atags_set_bootdev: ret:(0) +GPT 0x3380ec0 signature is wrong +recovery gpt... +GPT 0x3380ec0 signature is wrong +recovery gpt fail! +LoadTrust Addr:0x4000 +No find bl30.bin +Load uboot, ReadLba = 2000 +hdr 0000000003380880 + 0x0:0x88,0x41,0x3e,0x97,0xe6,0x61,0x54,0x23,0xe9,0x5a,0xd1,0x2b,0xdc,0x2f,0xf9,0x35, + +Load OK, addr=0x200000, size=0x9c9c0 +RunBL31 0x10000 +NOTICE: BL31: v1.3(debug):370ab80 +NOTICE: BL31: Built : 09:23:41, Mar 4 2019 +NOTICE: BL31: Rockchip release version: v1.1 +INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3 +INFO: Using opteed sec cpu_context! +INFO: boot cpu mask: 0 +INFO: plat_rockchip_pmu_init(1181): pd status 3e +INFO: BL31: Initializing runtime services +INFO: BL31: Initializing BL32 +INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec 7 06:11:20 UTC 2018 aarch64) + +INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2 + +INF [0x0] TEE-CORE:init_teecore:83: teecore inits done +INFO: BL31: Preparing for EL3 exit to normal world +INFO: Entry point address = 0x200000 +INFO: SPSR = 0x3c9 + + +U-Boot 2019.04-rc4-00136-gfd121f9641-dirty (Apr 16 2019 - 14:02:47 +0530) + +Model: FriendlyARM NanoPi NEO4 +DRAM: 1022 MiB +MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0 +Loading Environment from MMC... *** Warning - bad CRC, using default environment + +In: serial@ff1a0000 +Out: serial@ff1a0000 +Err: serial@ff1a0000 +Model: FriendlyARM NanoPi NEO4 +Net: eth0: ethernet@fe300000 +Hit any key to stop autoboot: 0 +=> + +Option 2: Package the image with SPL: + + - Prefix rk3399 header to SPL image + + => cd /path/to/u-boot + => ./tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl-dtb.bin out + + - Write prefixed SPL at 64th sector + + => sudo dd if=out of=/dev/sdc seek=64 + + - Write U-Boot proper at 16384 sector + + => sudo dd if=u-boot.itb of=/dev/sdc seek=16384 + => sync + +Put this SD (or micro-SD) card into your board and reset it. You should see +something like: + +U-Boot SPL board init +Trying to boot from MMC1 + + +U-Boot 2019.01-00004-g14db5ee998 (Mar 11 2019 - 13:18:41 +0530) + +Model: Orange Pi RK3399 Board +DRAM: 2 GiB +MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0 +Loading Environment from MMC... OK +In: serial@ff1a0000 +Out: serial@ff1a0000 +Err: serial@ff1a0000 +Model: Orange Pi RK3399 Board +Net: eth0: ethernet@fe300000 +Hit any key to stop autoboot: 0 +=> Using fastboot on rk3288 ======================== @@ -385,5 +614,7 @@ There are some documents about partitions in the links below. http://rockchip.wikidot.com/partitions -- +Jagan Teki +27 Mar 2019 Simon Glass 24 June 2015