Message ID | 20230903204849.660722-3-dario.binacchi@amarulasolutions.com |
---|---|
State | New |
Headers | show |
Series |
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Related | show |
On 9/3/23 22:48, Dario Binacchi wrote: > commit 011644249686f2675e142519cd59e81e04cfc231 Linux upstream. > > Add pin configurations for using CAN controller on stm32f7. > > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > Link: https://lore.kernel.org/all/20230427204540.3126234-4-dario.binacchi@amarulasolutions.com > Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> > --- > > arch/arm/dts/stm32f7-pinctrl.dtsi | 82 +++++++++++++++++++++++++++++++ > 1 file changed, 82 insertions(+) > > diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi > index 8f37aefa7315..000278ec2c58 100644 > --- a/arch/arm/dts/stm32f7-pinctrl.dtsi > +++ b/arch/arm/dts/stm32f7-pinctrl.dtsi > @@ -284,6 +284,88 @@ > slew-rate = <2>; > }; > }; > + > + can1_pins_a: can1-0 { > + pins1 { > + pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */ > + bias-pull-up; > + }; > + }; > + > + can1_pins_b: can1-1 { > + pins1 { > + pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */ > + bias-pull-up; > + }; > + }; > + > + can1_pins_c: can1-2 { > + pins1 { > + pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */ > + bias-pull-up; > + > + }; > + }; > + > + can1_pins_d: can1-3 { > + pins1 { > + pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */ > + bias-pull-up; > + > + }; > + }; > + > + can2_pins_a: can2-0 { > + pins1 { > + pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */ > + bias-pull-up; > + }; > + }; > + > + can2_pins_b: can2-1 { > + pins1 { > + pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */ > + bias-pull-up; > + }; > + }; > + > + can3_pins_a: can3-0 { > + pins1 { > + pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */ > + bias-pull-up; > + }; > + }; > + > + can3_pins_b: can3-1 { > + pins1 { > + pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */ > + bias-pull-up; > + }; > + }; > }; > }; > }; Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Thanks Patrice
On 9/3/23 22:48, Dario Binacchi wrote: > commit 011644249686f2675e142519cd59e81e04cfc231 Linux upstream. > > Add pin configurations for using CAN controller on stm32f7. > > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > Link: https://lore.kernel.org/all/20230427204540.3126234-4-dario.binacchi@amarulasolutions.com > Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> > --- > > arch/arm/dts/stm32f7-pinctrl.dtsi | 82 +++++++++++++++++++++++++++++++ > 1 file changed, 82 insertions(+) > > diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi > index 8f37aefa7315..000278ec2c58 100644 > --- a/arch/arm/dts/stm32f7-pinctrl.dtsi > +++ b/arch/arm/dts/stm32f7-pinctrl.dtsi > @@ -284,6 +284,88 @@ > slew-rate = <2>; > }; > }; > + > + can1_pins_a: can1-0 { > + pins1 { > + pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */ > + bias-pull-up; > + }; > + }; > + > + can1_pins_b: can1-1 { > + pins1 { > + pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */ > + bias-pull-up; > + }; > + }; > + > + can1_pins_c: can1-2 { > + pins1 { > + pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */ > + bias-pull-up; > + > + }; > + }; > + > + can1_pins_d: can1-3 { > + pins1 { > + pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */ > + bias-pull-up; > + > + }; > + }; > + > + can2_pins_a: can2-0 { > + pins1 { > + pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */ > + bias-pull-up; > + }; > + }; > + > + can2_pins_b: can2-1 { > + pins1 { > + pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */ > + bias-pull-up; > + }; > + }; > + > + can3_pins_a: can3-0 { > + pins1 { > + pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */ > + bias-pull-up; > + }; > + }; > + > + can3_pins_b: can3-1 { > + pins1 { > + pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */ > + }; > + pins2 { > + pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */ > + bias-pull-up; > + }; > + }; > }; > }; > }; Apply on stm32/next Thanks Patrice
diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi index 8f37aefa7315..000278ec2c58 100644 --- a/arch/arm/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/dts/stm32f7-pinctrl.dtsi @@ -284,6 +284,88 @@ slew-rate = <2>; }; }; + + can1_pins_a: can1-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can1_pins_b: can1-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can1_pins_c: can1-2 { + pins1 { + pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */ + bias-pull-up; + + }; + }; + + can1_pins_d: can1-3 { + pins1 { + pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */ + bias-pull-up; + + }; + }; + + can2_pins_a: can2-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can2_pins_b: can2-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can3_pins_a: can3-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */ + bias-pull-up; + }; + }; + + can3_pins_b: can3-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */ + bias-pull-up; + }; + }; }; }; };