@@ -651,6 +651,8 @@ F: package/luaexpat/
F: package/xinetd/
N: Dario Binacchi <dario.binacchi@amarula.solutions.com>
+F: board/bsh/
+F: configs/imx8mn_bsh_smm_s2_defconfig
F: package/uuu/
N: Dario Binacchi <dariobin@libero.it>
@@ -2040,6 +2042,8 @@ F: package/python-crc16/
F: package/python-pyzmq/
N: Michael Trimarchi <michael@amarulasolutions.com>
+F: board/bsh/
+F: configs/imx8mn_bsh_smm_s2_defconfig
F: package/python-spidev/
N: Michael Vetter <jubalh@iodoru.org>
new file mode 100755
@@ -0,0 +1,22 @@
+#!/bin/bash
+
+OUTPUT_DIR=$1
+
+if ! test -d "${OUTPUT_DIR}" ; then
+ echo "ERROR: no output directory specified."
+ echo "Usage: $0 OUTPUT_DIR"
+ echo ""
+ echo "Arguments:"
+ echo " OUTPUT_DIR The Buildroot output directory."
+ exit 1
+fi
+
+IMAGES_DIR=${OUTPUT_DIR}/images
+
+${OUTPUT_DIR}/host/bin/uuu -v -b ${IMAGES_DIR}/nand-full.lst \
+ ${IMAGES_DIR}/flash.bin \
+ ${IMAGES_DIR}/flash.bin \
+ ${IMAGES_DIR}/rootfs.ubifs \
+ ${IMAGES_DIR}/Image \
+ ${IMAGES_DIR}/freescale/imx8mn-bsh-smm-s2.dtb
+
new file mode 100644
@@ -0,0 +1,833 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_AUDIT=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_IRQ_TIME_ACCOUNTING=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_NUMA_BALANCING=y
+CONFIG_MEMCG=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_HUGETLB=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_PERF=y
+CONFIG_USER_NS=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_ARCH_MXC=y
+CONFIG_ARM64_VA_BITS_48=y
+CONFIG_SCHED_MC=y
+CONFIG_SCHED_SMT=y
+CONFIG_NUMA=y
+CONFIG_CRASH_DUMP=y
+CONFIG_FORCE_MAX_ZONEORDER=14
+CONFIG_COMPAT=y
+# CONFIG_ARM64_PTR_AUTH is not set
+# CONFIG_ARM64_TLB_RANGE is not set
+# CONFIG_ARM64_MTE is not set
+CONFIG_RANDOMIZE_BASE=y
+CONFIG_PM_DEBUG=y
+CONFIG_PM_TEST_SUSPEND=y
+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
+CONFIG_ENERGY_MODEL=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_ARM_PSCI_CPUIDLE=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_ACPI_CPPC_CPUFREQ=m
+CONFIG_ARM_SCPI_CPUFREQ=y
+CONFIG_ARM_IMX_CPUFREQ_DT=y
+CONFIG_ARM_SCMI_PROTOCOL=y
+CONFIG_ARM_SCPI_PROTOCOL=y
+CONFIG_EFI_CAPSULE_LOADER=y
+CONFIG_IMX_DSP=y
+CONFIG_IMX_SCU=y
+CONFIG_IMX_SCU_PD=y
+CONFIG_ACPI=y
+CONFIG_ACPI_APEI=y
+CONFIG_ACPI_APEI_GHES=y
+CONFIG_ACPI_APEI_MEMORY_FAILURE=y
+CONFIG_ACPI_APEI_EINJ=y
+CONFIG_ARM64_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM64_CE=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+CONFIG_CRYPTO_SHA512_ARM64_CE=m
+CONFIG_CRYPTO_SHA3_ARM64=m
+CONFIG_CRYPTO_SM3_ARM64_CE=m
+CONFIG_CRYPTO_GHASH_ARM64_CE=y
+CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+CONFIG_CRYPTO_CHACHA20_NEON=m
+CONFIG_CRYPTO_AES_ARM64_BS=m
+CONFIG_JUMP_LABEL=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_KSM=y
+CONFIG_MEMORY_FAILURE=y
+CONFIG_TRANSPARENT_HUGEPAGE=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IPV6_SIT=m
+CONFIG_NETFILTER=y
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
+CONFIG_NETFILTER_XT_TARGET_LOG=m
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_NAT=m
+CONFIG_IP6_NF_TARGET_MASQUERADE=m
+CONFIG_BRIDGE=m
+CONFIG_BRIDGE_VLAN_FILTERING=y
+CONFIG_NET_DSA=m
+CONFIG_NET_DSA_TAG_OCELOT=m
+CONFIG_VLAN_8021Q=y
+CONFIG_VLAN_8021Q_GVRP=y
+CONFIG_VLAN_8021Q_MVRP=y
+CONFIG_LLC2=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_MULTIQ=m
+CONFIG_NET_SCH_CBS=m
+CONFIG_NET_SCH_ETF=m
+CONFIG_NET_SCH_TAPRIO=m
+CONFIG_NET_SCH_MQPRIO=m
+CONFIG_NET_SCH_INGRESS=m
+CONFIG_NET_CLS_BASIC=m
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_FLOWER=m
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_GACT=m
+CONFIG_NET_ACT_MIRRED=m
+CONFIG_NET_ACT_GATE=m
+CONFIG_TSN=y
+CONFIG_QRTR=m
+CONFIG_QRTR_SMD=m
+CONFIG_QRTR_TUN=m
+CONFIG_BPF_JIT=y
+CONFIG_NET_PKTGEN=m
+CONFIG_CAN=m
+CONFIG_CAN_FLEXCAN=m
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_LEDS=y
+# CONFIG_BT_DEBUGFS is not set
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIUART_ATH3K=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIUART_3WIRE=y
+CONFIG_BT_HCIUART_BCM=y
+CONFIG_BT_HCIUART_QCA=y
+CONFIG_BT_HCIVHCI=y
+CONFIG_CFG80211=y
+CONFIG_NL80211_TESTMODE=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_MAC80211=y
+CONFIG_MAC80211_LEDS=y
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
+CONFIG_NFC=m
+CONFIG_NFC_NCI=m
+CONFIG_NFC_S3FWRN5_I2C=m
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_FW_LOADER_USER_HELPER=y
+CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
+CONFIG_BRCMSTB_GISB_ARB=y
+CONFIG_SIMPLE_PM_BUS=y
+CONFIG_VEXPRESS_CONFIG=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_SST25L=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_MTD_NAND_DENALI_DT=y
+CONFIG_MTD_NAND_GPMI_NAND=y
+CONFIG_MTD_SPI_NOR=y
+# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_NBD=m
+CONFIG_VIRTIO_BLK=y
+CONFIG_SENSORS_FXOS8700=y
+CONFIG_SENSORS_FXAS2100X=y
+CONFIG_SRAM=y
+CONFIG_EEPROM_AT24=m
+CONFIG_EEPROM_AT25=m
+CONFIG_UACCE=m
+CONFIG_RAID_ATTRS=m
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_SAS_ATA=y
+CONFIG_SCSI_HISI_SAS=y
+CONFIG_SCSI_UFSHCD=y
+CONFIG_SCSI_UFSHCD_PLATFORM=y
+CONFIG_ATA=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_IMX=y
+CONFIG_AHCI_CEVA=y
+CONFIG_AHCI_XGENE=y
+CONFIG_AHCI_QORIQ=y
+CONFIG_PATA_PLATFORM=y
+CONFIG_PATA_OF_PLATFORM=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=m
+CONFIG_BLK_DEV_DM=m
+CONFIG_DM_CRYPT=m
+CONFIG_DM_MIRROR=m
+CONFIG_DM_ZERO=m
+CONFIG_NETDEVICES=y
+CONFIG_MACVLAN=m
+CONFIG_MACVTAP=m
+CONFIG_TUN=y
+CONFIG_VETH=m
+CONFIG_VIRTIO_NET=y
+CONFIG_AMD_XGBE=y
+CONFIG_BCMGENET=m
+CONFIG_MACB=y
+CONFIG_FEC=y
+CONFIG_FEC_UIO=y
+CONFIG_FSL_XGMAC_MDIO=y
+CONFIG_FSL_ENETC_IERB=y
+CONFIG_HIX5HD2_GMAC=y
+CONFIG_HNS_DSAF=y
+CONFIG_HNS_ENET=y
+CONFIG_MVMDIO=y
+CONFIG_MSCC_OCELOT_SWITCH=y
+CONFIG_QCOM_EMAC=m
+CONFIG_RMNET=m
+CONFIG_SMC91X=y
+CONFIG_SMSC911X=y
+CONFIG_STMMAC_ETH=y
+CONFIG_DWMAC_GENERIC=m
+CONFIG_MICROCHIP_PHY=y
+CONFIG_NXP_TJA11XX_PHY=y
+CONFIG_MDIO_BITBANG=y
+CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y
+CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_RTL8152=y
+CONFIG_USB_LAN78XX=m
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_DM9601=m
+CONFIG_USB_NET_SR9800=m
+CONFIG_USB_NET_SMSC75XX=m
+CONFIG_USB_NET_SMSC95XX=m
+CONFIG_USB_NET_PLUSB=m
+CONFIG_USB_NET_MCS7830=m
+CONFIG_BRCMFMAC=y
+CONFIG_HOSTAP=y
+CONFIG_WL18XX=m
+CONFIG_WLCORE_SDIO=m
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_ADC=m
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_RPMSG=y
+CONFIG_KEYBOARD_SNVS_PWRKEY=y
+CONFIG_KEYBOARD_IMX_SC_PWRKEY=y
+CONFIG_KEYBOARD_CROS_EC=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ATMEL_MXT=m
+CONFIG_TOUCHSCREEN_GOODIX=m
+CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_I2C=m
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_MPL3115=y
+CONFIG_INPUT_ISL29023=y
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_SERIO_AMBAKMI=y
+CONFIG_LEGACY_PTY_COUNT=16
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+CONFIG_SERIAL_XILINX_PS_UART=y
+CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
+CONFIG_SERIAL_FSL_LPUART=y
+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
+CONFIG_SERIAL_FSL_LINFLEXUART=y
+CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y
+CONFIG_SERIAL_DEV_BUS=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_IPMI_HANDLER=m
+CONFIG_IPMI_DEVICE_INTERFACE=m
+CONFIG_IPMI_SI=m
+CONFIG_TCG_TPM=y
+CONFIG_TCG_TIS_I2C_INFINEON=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_I2C_GPIO=m
+CONFIG_I2C_IMX=y
+CONFIG_I2C_IMX_LPI2C=y
+CONFIG_I2C_RK3X=y
+CONFIG_I2C_RPBUS=y
+CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_I2C_SLAVE=y
+CONFIG_SPI=y
+CONFIG_SPI_CADENCE_QUADSPI=y
+CONFIG_SPI_FSL_LPSPI=y
+CONFIG_SPI_FSL_QUADSPI=y
+CONFIG_SPI_NXP_FLEXSPI=y
+CONFIG_SPI_IMX=y
+CONFIG_SPI_PL022=y
+CONFIG_SPI_ROCKCHIP=y
+CONFIG_SPI_SPIDEV=y
+CONFIG_SPI_SLAVE=y
+CONFIG_SPI_SLAVE_TIME=y
+CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_PINCTRL_MAX77620=y
+CONFIG_PINCTRL_IMX8MM=y
+CONFIG_PINCTRL_IMX8MN=y
+CONFIG_PINCTRL_IMX8MP=y
+CONFIG_PINCTRL_IMX8MQ=y
+CONFIG_PINCTRL_IMX8QM=y
+CONFIG_PINCTRL_IMX8QXP=y
+CONFIG_PINCTRL_IMX8DXL=y
+CONFIG_PINCTRL_IMX8ULP=y
+CONFIG_PINCTRL_S32V_CORE=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_ALTERA=m
+CONFIG_GPIO_DWAPB=y
+CONFIG_GPIO_MB86S7X=y
+CONFIG_GPIO_MXC=y
+CONFIG_GPIO_PL061=y
+CONFIG_GPIO_IMX_RPMSG=y
+CONFIG_GPIO_WCD934X=m
+CONFIG_GPIO_XGENE=y
+CONFIG_GPIO_MAX732X=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_PCA953X_IRQ=y
+CONFIG_GPIO_BD9571MWV=m
+CONFIG_POWER_RESET_BRCMSTB=y
+CONFIG_POWER_RESET_XGENE=y
+CONFIG_POWER_RESET_SYSCON=y
+CONFIG_SYSCON_REBOOT_MODE=y
+CONFIG_BATTERY_SBS=m
+CONFIG_BATTERY_BQ27XXX=y
+CONFIG_SENSORS_ARM_SCMI=y
+CONFIG_SENSORS_ARM_SCPI=y
+CONFIG_SENSORS_FP9931=y
+CONFIG_SENSORS_LM90=m
+CONFIG_SENSORS_PWM_FAN=m
+CONFIG_SENSORS_INA2XX=m
+CONFIG_SENSORS_INA3221=m
+CONFIG_THERMAL_WRITABLE_TRIPS=y
+CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
+CONFIG_CPU_THERMAL=y
+CONFIG_THERMAL_EMULATION=y
+CONFIG_IMX_SC_THERMAL=y
+CONFIG_IMX8MM_THERMAL=y
+CONFIG_DEVICE_THERMAL=y
+CONFIG_QORIQ_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_ARM_SP805_WATCHDOG=y
+CONFIG_ARM_SBSA_WATCHDOG=y
+CONFIG_DW_WATCHDOG=y
+CONFIG_IMX2_WDT=y
+CONFIG_IMX_SC_WDT=y
+CONFIG_IMX7ULP_WDT=y
+CONFIG_ARM_SMC_WATCHDOG=y
+CONFIG_MFD_BD9571MWV=y
+CONFIG_MFD_AXP20X_I2C=y
+CONFIG_MFD_IMX_MIX=y
+CONFIG_MFD_HI6421_PMIC=y
+CONFIG_MFD_FP9931=y
+CONFIG_MFD_MAX77620=y
+CONFIG_MFD_RK808=y
+CONFIG_MFD_SEC_CORE=y
+CONFIG_MFD_ROHM_BD718XX=y
+CONFIG_MFD_WCD934X=m
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_AXP20X=y
+CONFIG_REGULATOR_BD718XX=y
+CONFIG_REGULATOR_BD9571MWV=y
+CONFIG_REGULATOR_FAN53555=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_HI6421V530=y
+CONFIG_REGULATOR_MAX77620=y
+CONFIG_REGULATOR_MAX8973=y
+CONFIG_REGULATOR_FP9931=y
+CONFIG_REGULATOR_PCA9450=y
+CONFIG_REGULATOR_PFUZE100=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK808=y
+CONFIG_REGULATOR_S2MPS11=y
+CONFIG_REGULATOR_VCTRL=m
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
+CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
+CONFIG_MEDIA_SDR_SUPPORT=y
+CONFIG_MEDIA_PLATFORM_SUPPORT=y
+# CONFIG_DVB_NET is not set
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_MXC_CAPTURE=y
+CONFIG_VIDEO_MX8_CAPTURE=y
+CONFIG_VIDEO_MXC_CSI_CAMERA=y
+CONFIG_MXC_MIPI_CSI=y
+CONFIG_MXC_CAMERA_OV5640_MIPI_V2=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_SDR_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_IMX219=m
+CONFIG_VIDEO_OV5640=y
+CONFIG_VIDEO_OV5645=m
+CONFIG_IMX_DPU_CORE=y
+CONFIG_IMX_LCDIF_CORE=y
+CONFIG_IMX_LCDIFV3_CORE=y
+CONFIG_DRM=y
+CONFIG_DRM_I2C_CH7006=m
+CONFIG_DRM_I2C_SIL164=m
+CONFIG_DRM_I2C_NXP_TDA998X=m
+CONFIG_DRM_MALI_DISPLAY=m
+CONFIG_DRM_RCAR_DW_HDMI=m
+CONFIG_DRM_RCAR_LVDS=m
+CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_PANEL_ILITEK_ILI9805=y
+CONFIG_DRM_PANEL_SYNAPTICS_R63353=y
+CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
+CONFIG_DRM_PANEL_WKS_101WX001=y
+CONFIG_DRM_DISPLAY_CONNECTOR=m
+CONFIG_DRM_LONTIUM_LT9611=m
+CONFIG_DRM_FSL_IMX_LVDS_BRIDGE=y
+CONFIG_DRM_NWL_MIPI_DSI=y
+CONFIG_DRM_NXP_SEIKO_43WVFIG=y
+CONFIG_DRM_SII902X=m
+CONFIG_DRM_SIMPLE_BRIDGE=m
+CONFIG_DRM_THINE_THC63LVD1024=m
+CONFIG_DRM_TI_SN65DSI86=m
+CONFIG_DRM_I2C_ADV7511=y
+CONFIG_DRM_I2C_ADV7511_AUDIO=y
+CONFIG_DRM_CDNS_HDMI_CEC=y
+CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
+CONFIG_DRM_DW_HDMI_I2S_AUDIO=m
+CONFIG_DRM_DW_HDMI_GP_AUDIO=y
+CONFIG_DRM_DW_HDMI_CEC=y
+CONFIG_DRM_ITE_IT6263=y
+CONFIG_DRM_ITE_IT6161=y
+CONFIG_DRM_IMX=y
+CONFIG_DRM_IMX_LCDIF_MUX_DISPLAY=y
+CONFIG_DRM_IMX_PARALLEL_DISPLAY=y
+CONFIG_DRM_IMX_TVE=y
+CONFIG_DRM_IMX_LDB=y
+CONFIG_DRM_IMX8QM_LDB=y
+CONFIG_DRM_IMX8QXP_LDB=y
+CONFIG_DRM_IMX8MP_LDB=y
+CONFIG_DRM_IMX_HDMI=y
+CONFIG_DRM_IMX_SEC_DSIM=y
+CONFIG_DRM_IMX_DCNANO=y
+CONFIG_DRM_IMX_DCSS=y
+CONFIG_DRM_IMX_CDNS_MHDP=y
+CONFIG_DRM_ETNAVIV=m
+CONFIG_DRM_HISI_KIRIN=m
+CONFIG_DRM_MXSFB=y
+CONFIG_DRM_PL111=m
+CONFIG_DRM_LIMA=m
+CONFIG_DRM_PANFROST=m
+CONFIG_DRM_LEGACY=y
+CONFIG_FB_ARMCLCD=y
+CONFIG_FB_EFI=y
+CONFIG_FB_MXC_EINK_V2_PANEL=y
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_BACKLIGHT_LP855X=m
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_DYNAMIC_MINORS=y
+CONFIG_SND_ALOOP=m
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_FSL_ASRC=y
+CONFIG_SND_SOC_FSL_EASRC=y
+CONFIG_SND_IMX_SOC=y
+CONFIG_SND_SOC_FSL_ASOC_CARD=y
+CONFIG_SND_SOC_SOF_TOPLEVEL=y
+CONFIG_SND_SOC_SOF_OF=m
+CONFIG_SND_SOC_SOF_COMPRESS=y
+CONFIG_SND_SOC_SOF_IMX_TOPLEVEL=y
+CONFIG_SND_SOC_SOF_IMX8_SUPPORT=y
+CONFIG_SND_SOC_SOF_IMX8M_SUPPORT=y
+CONFIG_SND_SOC_SOF_IMX8ULP_SUPPORT=y
+CONFIG_SND_SOC_AK4458=y
+CONFIG_SND_SOC_AK5558=y
+CONFIG_SND_SOC_PCM512x_I2C=y
+CONFIG_SND_SOC_TLV320AIC31XX=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_SND_AUDIO_GRAPH_CARD=y
+CONFIG_I2C_HID=m
+CONFIG_USB_CONN_GPIO=y
+CONFIG_USB=y
+CONFIG_USB_OTG=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+CONFIG_USB_HCD_TEST_MODE=y
+CONFIG_USB_ACM=m
+CONFIG_USB_STORAGE=y
+CONFIG_USB_UAS=y
+CONFIG_USB_CDNS3=y
+CONFIG_USB_CDNS3_GADGET=y
+CONFIG_USB_CDNS3_HOST=y
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_ISP1760=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_CONSOLE=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_SIMPLE=y
+CONFIG_USB_SERIAL_FTDI_SIO=y
+CONFIG_USB_TEST=m
+CONFIG_USB_EHSET_TEST_FIXTURE=y
+CONFIG_USB_HSIC_USB3503=y
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_USB_MXS_PHY=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_SNP_UDC_PLAT=y
+CONFIG_USB_BDC_UDC=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_SERIAL=y
+CONFIG_USB_CONFIGFS_ACM=y
+CONFIG_USB_CONFIGFS_OBEX=y
+CONFIG_USB_CONFIGFS_NCM=y
+CONFIG_USB_CONFIGFS_ECM=y
+CONFIG_USB_CONFIGFS_ECM_SUBSET=y
+CONFIG_USB_CONFIGFS_RNDIS=y
+CONFIG_USB_CONFIGFS_EEM=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_CONFIGFS_F_LB_SS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_UAC1=y
+CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y
+CONFIG_USB_CONFIGFS_F_UAC2=y
+CONFIG_USB_CONFIGFS_F_MIDI=y
+CONFIG_USB_CONFIGFS_F_HID=y
+CONFIG_USB_CONFIGFS_F_UVC=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_AUDIO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_TYPEC=y
+CONFIG_TYPEC_TCPM=y
+CONFIG_TYPEC_TCPCI=y
+CONFIG_TYPEC_FUSB302=m
+CONFIG_TYPEC_HD3SS3220=m
+CONFIG_TYPEC_SWITCH_GPIO=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK_MINORS=32
+CONFIG_MMC_ARMMMCI=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ARASAN=y
+CONFIG_MMC_SDHCI_OF_ESDHC=y
+CONFIG_MMC_SDHCI_CADENCE=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+CONFIG_MMC_SDHCI_F_SDH30=y
+CONFIG_MMC_SPI=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_EXYNOS=y
+CONFIG_MMC_DW_HI3798CV200=y
+CONFIG_MMC_DW_K3=y
+CONFIG_MMC_SDHCI_XENON=y
+CONFIG_MMC_SDHCI_AM654=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_SYSCON=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_DISK=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_LEDS_TRIGGER_PANIC=y
+CONFIG_EDAC=y
+CONFIG_EDAC_GHES=y
+CONFIG_EDAC_SYNOPSYS=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1307=m
+CONFIG_RTC_DRV_MAX77686=y
+CONFIG_RTC_DRV_RK808=m
+CONFIG_RTC_DRV_PCF85363=m
+CONFIG_RTC_DRV_RX8581=m
+CONFIG_RTC_DRV_RV8803=m
+CONFIG_RTC_DRV_S5M=y
+CONFIG_RTC_DRV_DS3232=y
+CONFIG_RTC_DRV_PCF2127=m
+CONFIG_RTC_DRV_EFI=y
+CONFIG_RTC_DRV_CROS_EC=y
+CONFIG_RTC_DRV_PL031=y
+CONFIG_RTC_DRV_SNVS=y
+CONFIG_RTC_DRV_IMX_SC=y
+CONFIG_RTC_DRV_IMX_RPMSG=y
+CONFIG_DMADEVICES=y
+CONFIG_BCM_SBA_RAID=m
+CONFIG_FSL_EDMA=y
+CONFIG_FSL_QDMA=m
+CONFIG_FSL_EDMA_V3=y
+CONFIG_IMX_SDMA=y
+CONFIG_MV_XOR_V2=y
+CONFIG_MXS_DMA=y
+CONFIG_MXC_PXP_V3=y
+CONFIG_PL330_DMA=y
+CONFIG_QCOM_HIDMA_MGMT=y
+CONFIG_QCOM_HIDMA=y
+CONFIG_DMATEST=y
+CONFIG_DMABUF_HEAPS=y
+CONFIG_DMABUF_HEAPS_SYSTEM=y
+CONFIG_DMABUF_HEAPS_CMA=y
+CONFIG_DMABUF_HEAPS_DSP=y
+CONFIG_VFIO=y
+CONFIG_VIRTIO_BALLOON=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_STAGING=y
+CONFIG_STAGING_MEDIA=y
+CONFIG_VIDEO_IMX_CAPTURE=y
+CONFIG_IMX8_MEDIA_DEVICE=m
+CONFIG_ION=y
+CONFIG_ION_SYSTEM_HEAP=y
+CONFIG_ION_CMA_HEAP=y
+CONFIG_CHROME_PLATFORMS=y
+CONFIG_CROS_EC=y
+CONFIG_CROS_EC_I2C=y
+CONFIG_CROS_EC_SPI=y
+CONFIG_CROS_EC_CHARDEV=m
+CONFIG_COMMON_CLK_RK808=y
+CONFIG_COMMON_CLK_SCPI=y
+CONFIG_COMMON_CLK_CS2000_CP=y
+CONFIG_COMMON_CLK_S2MPS11=y
+CONFIG_CLK_QORIQ=y
+CONFIG_COMMON_CLK_XGENE=y
+CONFIG_COMMON_CLK_PWM=y
+CONFIG_COMMON_CLK_VC5=y
+CONFIG_CLK_IMX8MN=y
+CONFIG_ARCH_S32_CLK=y
+CONFIG_HWSPINLOCK=y
+CONFIG_ARM_MHU=y
+CONFIG_IMX_MBOX=y
+CONFIG_PLATFORM_MHU=y
+CONFIG_ARM_SMMU=y
+CONFIG_ARM_SMMU_V3=y
+CONFIG_REMOTEPROC=y
+CONFIG_IMX_REMOTEPROC=y
+CONFIG_IMX_DSP_REMOTEPROC=y
+CONFIG_RPMSG_CHAR=y
+CONFIG_RPMSG_QCOM_GLINK_RPM=y
+CONFIG_SOUNDWIRE=m
+CONFIG_SOUNDWIRE_QCOM=m
+CONFIG_SOC_BRCMSTB=y
+CONFIG_FSL_RCPM=y
+CONFIG_FSL_QIXIS=y
+CONFIG_SOC_TI=y
+CONFIG_EXTCON_PTN5150=m
+CONFIG_EXTCON_USB_GPIO=y
+CONFIG_EXTCON_USBC_CROS_EC=y
+CONFIG_MEMORY=y
+CONFIG_IIO=y
+CONFIG_IMX8QXP_ADC=y
+CONFIG_MAX9611=m
+CONFIG_IIO_CROS_EC_SENSORS_CORE=m
+CONFIG_IIO_CROS_EC_SENSORS=m
+CONFIG_IIO_ST_LSM6DSX=y
+CONFIG_IIO_CROS_EC_LIGHT_PROX=m
+CONFIG_IIO_CROS_EC_BARO=m
+CONFIG_PWM=y
+CONFIG_PWM_CROS_EC=m
+CONFIG_PWM_FSL_FTM=m
+CONFIG_PWM_IMX27=y
+CONFIG_PWM_RPCHIP=y
+CONFIG_RESET_IMX7=y
+CONFIG_RESET_IMX8ULP_SIM=y
+CONFIG_PHY_XGENE=y
+CONFIG_PHY_MIXEL_LVDS=y
+CONFIG_PHY_MIXEL_LVDS_COMBO=y
+CONFIG_PHY_CADENCE_SALVO=y
+CONFIG_PHY_FSL_IMX8MP_LVDS=y
+CONFIG_PHY_MIXEL_MIPI_DPHY=y
+CONFIG_PHY_SAMSUNG_HDMI_PHY=y
+CONFIG_PHY_QCOM_USB_HS=y
+CONFIG_PHY_SAMSUNG_USB2=y
+CONFIG_ARM_SMMU_V3_PMU=m
+CONFIG_FSL_IMX8_DDR_PMU=y
+CONFIG_HISI_PMU=y
+CONFIG_NVMEM_IMX_OCOTP=y
+CONFIG_NVMEM_IMX_OCOTP_SCU=y
+CONFIG_FPGA=y
+CONFIG_FPGA_BRIDGE=m
+CONFIG_ALTERA_FREEZE_BRIDGE=m
+CONFIG_FPGA_REGION=m
+CONFIG_OF_FPGA_REGION=m
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+CONFIG_MUX_MMIO=y
+CONFIG_SLIM_QCOM_CTRL=m
+CONFIG_INTERCONNECT=y
+CONFIG_MXC_SIM=y
+CONFIG_MXC_EMVSIM=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_BTRFS_FS=m
+CONFIG_BTRFS_FS_POSIX_ACL=y
+CONFIG_FANOTIFY=y
+CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
+CONFIG_QUOTA=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=m
+CONFIG_CUSE=m
+CONFIG_OVERLAY_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_HUGETLBFS=y
+CONFIG_EFIVAR_FS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_XZ=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_2=y
+CONFIG_ROOT_NFS=y
+CONFIG_9P_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_SECURITY=y
+CONFIG_CRYPTO_USER=y
+CONFIG_CRYPTO_TEST=m
+CONFIG_CRYPTO_DH=m
+CONFIG_CRYPTO_CHACHA20POLY1305=m
+CONFIG_CRYPTO_ECHAINIV=y
+CONFIG_CRYPTO_TLS=m
+CONFIG_CRYPTO_CFB=m
+CONFIG_CRYPTO_CTS=m
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_OFB=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_XCBC=m
+CONFIG_CRYPTO_VMAC=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_RMD128=m
+CONFIG_CRYPTO_RMD160=m
+CONFIG_CRYPTO_RMD256=m
+CONFIG_CRYPTO_RMD320=m
+CONFIG_CRYPTO_STREEBOG=m
+CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_CAMELLIA=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_SALSA20=m
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_ANSI_CPRNG=y
+CONFIG_CRYPTO_USER_API_HASH=m
+CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
+CONFIG_CRYPTO_USER_API_AEAD=m
+CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=m
+CONFIG_CRYPTO_DEV_FSL_CAAM=m
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m
+CONFIG_CRYPTO_DEV_CCREE=m
+CONFIG_CRYPTO_DEV_AMLOGIC_GXL=m
+CONFIG_INDIRECT_PIO=y
+CONFIG_CRC_CCITT=m
+CONFIG_CMA_SIZE_MBYTES=32
+CONFIG_IRQ_POLL=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_FTRACE is not set
+CONFIG_CORESIGHT=y
+CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
+CONFIG_CORESIGHT_SOURCE_ETM4X=y
+CONFIG_MEMTEST=y
new file mode 100644
@@ -0,0 +1,48 @@
+# @_flash.bin | bootloader
+# @_image [_flash.bin] | image burn to nand, default is the same as bootloader
+# @_filesystem | filesystem to burn
+# @_kernel | kernel image
+# @_dtb | dtb image
+
+# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
+SDP: boot -f _flash.bin
+
+# This command will be run when ROM support stream mode
+# i.MX8QXP, i.MX8QM
+SDPS: boot -f _flash.bin
+
+# These commands will be run when use SPL and will be skipped if no spl
+# SDPU will be deprecated. please use SDPV instead of SDPU
+# {
+SDPU: delay 1000
+SDPU: write -f _flash.bin -offset 0x57c00
+SDPU: jump
+# }
+
+# These commands will be run when use SPL and will be skipped if no spl
+# if (SPL support SDPV)
+# {
+SDPV: delay 1000
+SDPV: write -f _flash.bin -skipspl
+SDPV: jump
+# }
+
+FB: ucmd setenv fastboot_buffer ${loadaddr}
+FB: download -f _image
+# Burn image to nandfit partition if needed
+FB: ucmd if env exists nandfit_part; then nand erase.part nandfit; nand write ${fastboot_buffer} nandfit ${filesize}; else true; fi;
+FB: ucmd nandbcb init ${fastboot_buffer} nandboot ${filesize}
+
+FB[-t 10000]: ucmd ubi part nandrootfs
+FB[-t 10000]: ucmd ubi create root -
+FB: download -f _filesystem
+FB[-t 60000]: ucmd ubi write ${loadaddr} root ${filesize}
+
+FB: download -f _kernel
+FB[-t 10000]: ucmd nand write ${loadaddr} nandkernel ${filesize}
+
+FB: download -f _dtb
+FB[-t 8000]: ucmd nand write ${loadaddr} nanddtb ${filesize}
+
+FB: reboot
+FB: done
new file mode 100644
@@ -0,0 +1,63 @@
+From 81c6e8da232e4eaefe2808ea5f30c404f441c063 Mon Sep 17 00:00:00 2001
+From: Dario Binacchi <dario.binacchi@amarulasolutions.com>
+Date: Sun, 22 May 2022 17:40:15 +0200
+Subject: [PATCH] dmaengine: mxs: fix driver registering
+
+Driver registration fails on SOC imx8mn as its supplier, the clock
+control module, is not ready. Since platform_driver_probe(), as
+reported by its description, is incompatible with deferred probing,
+we have to use platform_driver_register().
+
+Fixes: a580b8c5429a ("dmaengine: mxs-dma: add dma support for i.MX23/28")
+Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
+Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
+Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
+Cc: stable@vger.kernel.org
+
+Series-version: 2
+Series-changes: 2
+- Add the tag "Cc: stable@vger.kernel.org" in the sign-off area.
+
+Series-cc: linux-amarula@amarulasolutions.com
+---
+ drivers/dma/mxs-dma.c | 11 ++++-------
+ 1 file changed, 4 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c
+index 994fc4d2aca4..b8a3e692330d 100644
+--- a/drivers/dma/mxs-dma.c
++++ b/drivers/dma/mxs-dma.c
+@@ -670,7 +670,7 @@ static enum dma_status mxs_dma_tx_status(struct dma_chan *chan,
+ return mxs_chan->status;
+ }
+
+-static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma)
++static int mxs_dma_init(struct mxs_dma_engine *mxs_dma)
+ {
+ int ret;
+
+@@ -741,7 +741,7 @@ static struct dma_chan *mxs_dma_xlate(struct of_phandle_args *dma_spec,
+ ofdma->of_node);
+ }
+
+-static int __init mxs_dma_probe(struct platform_device *pdev)
++static int mxs_dma_probe(struct platform_device *pdev)
+ {
+ struct device_node *np = pdev->dev.of_node;
+ const struct mxs_dma_type *dma_type;
+@@ -839,10 +839,7 @@ static struct platform_driver mxs_dma_driver = {
+ .name = "mxs-dma",
+ .of_match_table = mxs_dma_dt_ids,
+ },
++ .probe = mxs_dma_probe,
+ };
+
+-static int __init mxs_dma_module_init(void)
+-{
+- return platform_driver_probe(&mxs_dma_driver, mxs_dma_probe);
+-}
+-subsys_initcall(mxs_dma_module_init);
++module_platform_driver(mxs_dma_driver);
+--
+2.32.0
+
new file mode 100644
@@ -0,0 +1,78 @@
+From da52c7c7d89abdcdf3dd858969094a914ecda9dc Mon Sep 17 00:00:00 2001
+From: Michael Trimarchi <michael@amarulasolutions.com>
+Date: Sun, 15 May 2022 11:35:30 +0200
+Subject: [PATCH 01/10] nand: raw: mxs_nand: Fix specific hook registration
+
+Move the hook after nand_scan_tail is called. The hook must be replaced
+to the mxs specific one but those must to be assignment later in the
+probe function.
+
+With this fix markbad is working again. Before this change:
+
+nand markbad 0xDEC00
+NXS NAND: Writing OOB isn't supported
+NXS NAND: Writing OOB isn't supported
+block 0x000dec00 NOT marked as bad! ERROR 0
+
+Cc: Han Xu <han.xu@nxp.com>
+Cc: Fabio Estevam <festevam@gmail.com>
+Acked-by: Han Xu <han.xu@nxp.com>
+Tested-By: Tim Harvey <tharvey@gateworks.com>
+Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
+---
+ drivers/mtd/nand/raw/mxs_nand.c | 32 ++++++++++++++++----------------
+ 1 file changed, 16 insertions(+), 16 deletions(-)
+
+diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c
+index ee5d7fde9ce1..53f24b9c4b1a 100644
+--- a/drivers/mtd/nand/raw/mxs_nand.c
++++ b/drivers/mtd/nand/raw/mxs_nand.c
+@@ -1246,22 +1246,6 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd)
+ /* Enable BCH complete interrupt */
+ writel(BCH_CTRL_COMPLETE_IRQ_EN, &bch_regs->hw_bch_ctrl_set);
+
+- /* Hook some operations at the MTD level. */
+- if (mtd->_read_oob != mxs_nand_hook_read_oob) {
+- nand_info->hooked_read_oob = mtd->_read_oob;
+- mtd->_read_oob = mxs_nand_hook_read_oob;
+- }
+-
+- if (mtd->_write_oob != mxs_nand_hook_write_oob) {
+- nand_info->hooked_write_oob = mtd->_write_oob;
+- mtd->_write_oob = mxs_nand_hook_write_oob;
+- }
+-
+- if (mtd->_block_markbad != mxs_nand_hook_block_markbad) {
+- nand_info->hooked_block_markbad = mtd->_block_markbad;
+- mtd->_block_markbad = mxs_nand_hook_block_markbad;
+- }
+-
+ return 0;
+ }
+
+@@ -1467,6 +1451,22 @@ int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info)
+ if (err)
+ goto err_free_buffers;
+
++ /* Hook some operations at the MTD level. */
++ if (mtd->_read_oob != mxs_nand_hook_read_oob) {
++ nand_info->hooked_read_oob = mtd->_read_oob;
++ mtd->_read_oob = mxs_nand_hook_read_oob;
++ }
++
++ if (mtd->_write_oob != mxs_nand_hook_write_oob) {
++ nand_info->hooked_write_oob = mtd->_write_oob;
++ mtd->_write_oob = mxs_nand_hook_write_oob;
++ }
++
++ if (mtd->_block_markbad != mxs_nand_hook_block_markbad) {
++ nand_info->hooked_block_markbad = mtd->_block_markbad;
++ mtd->_block_markbad = mxs_nand_hook_block_markbad;
++ }
++
+ err = nand_register(0, mtd);
+ if (err)
+ goto err_free_buffers;
+--
+2.32.0
+
new file mode 100644
@@ -0,0 +1,165 @@
+From 84901413e2554b7e62540a7403578f695f52623b Mon Sep 17 00:00:00 2001
+From: Michael Trimarchi <michael@amarulasolutions.com>
+Date: Sun, 15 May 2022 11:35:31 +0200
+Subject: [PATCH 02/10] mtd: nand: mxs_nand_spl: Fix bad block skipping
+
+The specific implementation was having bug. Those bugs are since
+the beginning of the implementation. Some manufactures can already
+experience this bug in their SPL code. This bug can be more visible on
+architecture that has complicated boot process like imx8mn. Older
+version of uboot can be affected if the bad block
+appear in correspoding of the beginning of u-boot image. In order to
+adjust the function we scan from the first erase block.
+
+The problematic part of old code was in this part:
+
+while (is_badblock(mtd, offs, 1)) {
+ page = page + nand_page_per_block;
+ /* Check i we've reached the end of flash. */
+ if (page >= mtd->size >> chip->page_shift) {
+ free(page_buf);
+ return -ENOMEM;
+ }
+}
+
+Even we fix it adding increment of the offset of one erase block size
+, we don't fix the problem, because the first erase block where the
+image start is not checked. The code was tested on an imx8mn where
+the boot rom api was not able to skip it. This code is used by other
+architecures like imx6 and imx8mm
+
+Cc: Han Xu <han.xu@nxp.com>
+Cc: Fabio Estevam <festevam@gmail.com>
+Acked-by: Han Xu <han.xu@nxp.com>
+Tested-By: Tim Harvey <tharvey@gateworks.com>
+Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
+---
+ drivers/mtd/nand/raw/mxs_nand_spl.c | 90 ++++++++++++++++-------------
+ 1 file changed, 49 insertions(+), 41 deletions(-)
+
+diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c
+index 59a67ee4145d..2bfb181007b7 100644
+--- a/drivers/mtd/nand/raw/mxs_nand_spl.c
++++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
+@@ -218,14 +218,14 @@ void nand_init(void)
+ mxs_nand_setup_ecc(mtd);
+ }
+
+-int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
++int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
+ {
+- struct nand_chip *chip;
+- unsigned int page;
++ unsigned int sz;
++ unsigned int block, lastblock;
++ unsigned int page, page_offset;
+ unsigned int nand_page_per_block;
+- unsigned int sz = 0;
++ struct nand_chip *chip;
+ u8 *page_buf = NULL;
+- u32 page_off;
+
+ chip = mtd_to_nand(mtd);
+ if (!chip->numchips)
+@@ -235,47 +235,42 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
+ if (!page_buf)
+ return -ENOMEM;
+
+- page = offs >> chip->page_shift;
+- page_off = offs & (mtd->writesize - 1);
++ /* offs has to be aligned to a page address! */
++ block = offs / mtd->erasesize;
++ lastblock = (offs + size - 1) / mtd->erasesize;
++ page = (offs % mtd->erasesize) / mtd->writesize;
++ page_offset = offs % mtd->writesize;
+ nand_page_per_block = mtd->erasesize / mtd->writesize;
+
+- debug("%s offset:0x%08x len:%d page:%x\n", __func__, offs, size, page);
+-
+- while (size) {
+- if (mxs_read_page_ecc(mtd, page_buf, page) < 0)
+- return -1;
+-
+- if (size > (mtd->writesize - page_off))
+- sz = (mtd->writesize - page_off);
+- else
+- sz = size;
+-
+- memcpy(buf, page_buf + page_off, sz);
+-
+- offs += mtd->writesize;
+- page++;
+- buf += (mtd->writesize - page_off);
+- page_off = 0;
+- size -= sz;
+-
+- /*
+- * Check if we have crossed a block boundary, and if so
+- * check for bad block.
+- */
+- if (!(page % nand_page_per_block)) {
+- /*
+- * Yes, new block. See if this block is good. If not,
+- * loop until we find a good block.
+- */
+- while (is_badblock(mtd, offs, 1)) {
+- page = page + nand_page_per_block;
+- /* Check i we've reached the end of flash. */
+- if (page >= mtd->size >> chip->page_shift) {
++ while (block <= lastblock && size > 0) {
++ if (!is_badblock(mtd, mtd->erasesize * block, 1)) {
++ /* Skip bad blocks */
++ while (page < nand_page_per_block) {
++ int curr_page = nand_page_per_block * block + page;
++
++ if (mxs_read_page_ecc(mtd, page_buf, curr_page) < 0) {
+ free(page_buf);
+- return -ENOMEM;
++ return -EIO;
+ }
++
++ if (size > (mtd->writesize - page_offset))
++ sz = (mtd->writesize - page_offset);
++ else
++ sz = size;
++
++ memcpy(dst, page_buf + page_offset, sz);
++ dst += sz;
++ size -= sz;
++ page_offset = 0;
++ page++;
+ }
++
++ page = 0;
++ } else {
++ lastblock++;
+ }
++
++ block++;
+ }
+
+ free(page_buf);
+@@ -294,6 +289,19 @@ void nand_deselect(void)
+
+ u32 nand_spl_adjust_offset(u32 sector, u32 offs)
+ {
+- /* Handle the offset adjust in nand_spl_load_image,*/
++ unsigned int block, lastblock;
++
++ block = sector / mtd->erasesize;
++ lastblock = (sector + offs) / mtd->erasesize;
++
++ while (block <= lastblock) {
++ if (is_badblock(mtd, block * mtd->erasesize, 1)) {
++ offs += mtd->erasesize;
++ lastblock++;
++ }
++
++ block++;
++ }
++
+ return offs;
+ }
+--
+2.32.0
+
new file mode 100644
@@ -0,0 +1,95 @@
+From c2e0b6f589f8f73c5cd9bd82938021f34b3b875b Mon Sep 17 00:00:00 2001
+From: Michael Trimarchi <michael@amarulasolutions.com>
+Date: Sun, 15 May 2022 11:35:32 +0200
+Subject: [PATCH 03/10] arm: mach-imx: cmd_nandbcb fix bad block handling
+
+The badblock should be skipped properly in reading and writing.
+Fix the logic. The bcb struct is written, skipping the bad block,
+so we need to read using the same logic. This was tested create
+bad block in the area and then flash it and read it back.
+
+Acked-by: Han Xu <han.xu@nxp.com>
+Tested-By: Tim Harvey <tharvey@gateworks.com>
+Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
+---
+ arch/arm/mach-imx/cmd_nandbcb.c | 21 +++++++--------------
+ 1 file changed, 7 insertions(+), 14 deletions(-)
+
+diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c
+index f119e9f88d5c..c54f52b343c7 100644
+--- a/arch/arm/mach-imx/cmd_nandbcb.c
++++ b/arch/arm/mach-imx/cmd_nandbcb.c
+@@ -506,10 +506,6 @@ static int read_fcb(struct boot_config *boot_cfg, struct fcb_block *fcb,
+ int ret = 0;
+
+ mtd = boot_cfg->mtd;
+- if (mtd_block_isbad(mtd, off)) {
+- printf("Block %d is bad, skipped\n", (int)CONV_TO_BLOCKS(off));
+- return 1;
+- }
+
+ fcb_raw_page = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);
+ if (!fcb_raw_page) {
+@@ -530,7 +526,7 @@ static int read_fcb(struct boot_config *boot_cfg, struct fcb_block *fcb,
+ else if (plat_config.misc_flags & FCB_ENCODE_BCH_40b)
+ mxs_nand_mode_fcb_40bit(mtd);
+
+- ret = nand_read(mtd, off, &size, (u_char *)fcb);
++ ret = nand_read_skip_bad(mtd, off, &size, NULL, mtd->size, (u_char *)fcb);
+
+ /* switch BCH back */
+ mxs_nand_mode_normal(mtd);
+@@ -617,6 +613,7 @@ static int write_fcb(struct boot_config *boot_cfg, struct fcb_block *fcb)
+ for (i = 0; i < g_boot_search_count; i++) {
+ if (mtd_block_isbad(mtd, off)) {
+ printf("Block %d is bad, skipped\n", i);
++ off += mtd->erasesize;
+ continue;
+ }
+
+@@ -676,20 +673,15 @@ static int read_dbbt(struct boot_config *boot_cfg, struct dbbt_block *dbbt,
+ void *dbbt_data_page, loff_t off)
+ {
+ size_t size;
++ size_t actual_size;
+ struct mtd_info *mtd;
+ loff_t to;
+ int ret;
+
+ mtd = boot_cfg->mtd;
+
+- if (mtd_block_isbad(mtd, off)) {
+- printf("Block %d is bad, skipped\n",
+- (int)CONV_TO_BLOCKS(off));
+- return 1;
+- }
+-
+ size = sizeof(struct dbbt_block);
+- ret = nand_read(mtd, off, &size, (u_char *)dbbt);
++ ret = nand_read_skip_bad(mtd, off, &size, &actual_size, mtd->size, (u_char *)dbbt);
+ printf("NAND DBBT read from 0x%llx offset 0x%zx read: %s\n",
+ off, size, ret ? "ERROR" : "OK");
+ if (ret)
+@@ -697,9 +689,9 @@ static int read_dbbt(struct boot_config *boot_cfg, struct dbbt_block *dbbt,
+
+ /* dbbtpages == 0 if no bad blocks */
+ if (dbbt->dbbtpages > 0) {
+- to = off + 4 * mtd->writesize;
++ to = off + 4 * mtd->writesize + actual_size - size;
+ size = mtd->writesize;
+- ret = nand_read(mtd, to, &size, dbbt_data_page);
++ ret = nand_read_skip_bad(mtd, to, &size, NULL, mtd->size, dbbt_data_page);
+ printf("DBBT data read from 0x%llx offset 0x%zx read: %s\n",
+ to, size, ret ? "ERROR" : "OK");
+
+@@ -729,6 +721,7 @@ static int write_dbbt(struct boot_config *boot_cfg, struct dbbt_block *dbbt,
+ if (mtd_block_isbad(mtd, off)) {
+ printf("Block %d is bad, skipped\n",
+ (int)(i + CONV_TO_BLOCKS(off)));
++ off += mtd->erasesize;
+ continue;
+ }
+
+--
+2.32.0
+
new file mode 100644
@@ -0,0 +1,42 @@
+From 85d26c1c5e503d1ecae5818684dc54029bf6959d Mon Sep 17 00:00:00 2001
+From: Michael Trimarchi <michael@amarulasolutions.com>
+Date: Sun, 15 May 2022 11:35:33 +0200
+Subject: [PATCH 04/10] spl: spl_nand: Fix bad block handling in fitImage
+
+If the fitImage has some bad block in fit image area, the
+offset must be recalulcated. This should be done always.
+After implementing it in mxs now is possible to call the function
+even for that platform.
+
+Cc: Fabio Estevam <festevam@gmail.com>
+Tested-By: Tim Harvey <tharvey@gateworks.com>
+Reviewed-by: Tom Rini <trini@konsulko.com>
+Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
+---
+ common/spl/spl_nand.c | 5 +----
+ 1 file changed, 1 insertion(+), 4 deletions(-)
+
+diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
+index fc61b447a52e..82a10ffa63aa 100644
+--- a/common/spl/spl_nand.c
++++ b/common/spl/spl_nand.c
+@@ -43,15 +43,12 @@ static ulong spl_nand_fit_read(struct spl_load_info *load, ulong offs,
+ ulong size, void *dst)
+ {
+ int err;
+-#ifdef CONFIG_SYS_NAND_BLOCK_SIZE
+ ulong sector;
+
+ sector = *(int *)load->priv;
+- offs = sector + nand_spl_adjust_offset(sector, offs - sector);
+-#else
+ offs *= load->bl_len;
+ size *= load->bl_len;
+-#endif
++ offs = sector + nand_spl_adjust_offset(sector, offs - sector);
+ err = nand_spl_load_image(offs, size, dst);
+ if (err)
+ return 0;
+--
+2.32.0
+
new file mode 100644
@@ -0,0 +1,30 @@
+From 16f75e0dfe9d435db7ec129f2e7c0d7a641cd3a0 Mon Sep 17 00:00:00 2001
+From: Michael Trimarchi <michael@amarulasolutions.com>
+Date: Sun, 15 May 2022 11:35:34 +0200
+Subject: [PATCH 05/10] board: bsh: Switch to nand spl load instead of romapi
+
+romapi is not eble to skip bad block so we need to workaround
+using the spl
+
+Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
+---
+ board/bsh/imx8mn_smm_s2/spl.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/board/bsh/imx8mn_smm_s2/spl.c b/board/bsh/imx8mn_smm_s2/spl.c
+index 0f61acc6302f..097b60c05551 100644
+--- a/board/bsh/imx8mn_smm_s2/spl.c
++++ b/board/bsh/imx8mn_smm_s2/spl.c
+@@ -18,6 +18,9 @@
+
+ int spl_board_boot_device(enum boot_device boot_dev_spl)
+ {
++ if (IS_ENABLED(CONFIG_NAND_MXS) && get_boot_device() != USB_BOOT)
++ return BOOT_DEVICE_NAND;
++
+ return BOOT_DEVICE_BOOTROM;
+ }
+
+--
+2.32.0
+
new file mode 100644
@@ -0,0 +1,159 @@
+From d818bfb185a9f62fc988141d2dbbf9e9bc8ffa5d Mon Sep 17 00:00:00 2001
+From: Michael Trimarchi <michael@amarulasolutions.com>
+Date: Sun, 22 May 2022 15:22:08 +0200
+Subject: [PATCH 06/10] include/configs: Remove rootwait=1 to all the affected
+ boards
+
+rootwait=1 is not a valid kernel boot parameters. According
+to the documenation is only rootwait
+
+rootwait [KNL] Wait (indefinitely) for root device to show up.
+ Useful for devices that are detected asynchronously
+ (e.g. USB and MMC devices).
+
+Fix:
+Unknown kernel command line parameters "rootwait=1", will be passed to user space.
+
+Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
+Reviewed-by: Heiko Schocher <hs@denx.de>
+---
+ include/configs/am335x_evm.h | 2 +-
+ include/configs/am43xx_evm.h | 2 +-
+ include/configs/baltos.h | 2 +-
+ include/configs/chiliboard.h | 2 +-
+ include/configs/etamin.h | 2 +-
+ include/configs/imx8mn_bsh_smm_s2.h | 2 +-
+ include/configs/siemens-am33x-common.h | 4 ++--
+ include/configs/ti_armv7_keystone2.h | 2 +-
+ include/environment/ti/nand.h | 2 +-
+ 9 files changed, 10 insertions(+), 10 deletions(-)
+
+diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
+index fd5b209a52db..f301a6dc835b 100644
+--- a/include/configs/am335x_evm.h
++++ b/include/configs/am335x_evm.h
+@@ -34,7 +34,7 @@
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype}\0" \
+ "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \
+- "nandrootfstype=ubifs rootwait=1\0" \
++ "nandrootfstype=ubifs rootwait\0" \
+ "nandboot=echo Booting from nand ...; " \
+ "run nandargs; " \
+ "nand read ${fdtaddr} NAND.u-boot-spl-os; " \
+diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
+index 5057441f7506..1f5c3cd04e88 100644
+--- a/include/configs/am43xx_evm.h
++++ b/include/configs/am43xx_evm.h
+@@ -166,7 +166,7 @@
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype}\0" \
+ "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \
+- "nandrootfstype=ubifs rootwait=1\0" \
++ "nandrootfstype=ubifs rootwait\0" \
+ "nandboot=echo Booting from nand ...; " \
+ "run nandargs; " \
+ "nand read ${fdtaddr} NAND.u-boot-spl-os; " \
+diff --git a/include/configs/baltos.h b/include/configs/baltos.h
+index b881d8c03fd7..7b43741fde7c 100644
+--- a/include/configs/baltos.h
++++ b/include/configs/baltos.h
+@@ -37,7 +37,7 @@
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype}\0" \
+ "nandroot=ubi0:rootfs rw ubi.mtd=5\0" \
+- "nandrootfstype=ubifs rootwait=1\0" \
++ "nandrootfstype=ubifs rootwait\0" \
+ "nandboot=echo Booting from nand ...; " \
+ "run nandargs; " \
+ "setenv loadaddr 0x84000000; " \
+diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h
+index 82acda595f09..8bad0f9ac4b6 100644
+--- a/include/configs/chiliboard.h
++++ b/include/configs/chiliboard.h
+@@ -20,7 +20,7 @@
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype}\0" \
+ "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system\0" \
+- "nandrootfstype=ubifs rootwait=1\0" \
++ "nandrootfstype=ubifs rootwait\0" \
+ "nandboot=echo Booting from nand ...; " \
+ "run nandargs; " \
+ "nand read ${fdt_addr} NAND.u-boot-spl-os; " \
+diff --git a/include/configs/etamin.h b/include/configs/etamin.h
+index dc83ab71908b..3548382d2036 100644
+--- a/include/configs/etamin.h
++++ b/include/configs/etamin.h
+@@ -113,7 +113,7 @@
+ "nand_active_ubi_vol=rootfs_a\0" \
+ "rootfs_name=rootfs\0" \
+ "kernel_name=uImage\0"\
+- "nand_root_fs_type=ubifs rootwait=1\0" \
++ "nand_root_fs_type=ubifs rootwait\0" \
+ "nand_args=run bootargs_defaults;" \
+ "mtdparts default;" \
+ "setenv ${partitionset_active} true;" \
+diff --git a/include/configs/imx8mn_bsh_smm_s2.h b/include/configs/imx8mn_bsh_smm_s2.h
+index 098f23b206d1..f7529783692e 100644
+--- a/include/configs/imx8mn_bsh_smm_s2.h
++++ b/include/configs/imx8mn_bsh_smm_s2.h
+@@ -21,7 +21,7 @@
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype}\0" \
+ "nandroot=ubi0:root rw ubi.mtd=nandrootfs\0" \
+- "nandrootfstype=ubifs rootwait=1\0" \
++ "nandrootfstype=ubifs rootwait\0" \
+ "nandboot=echo Booting from nand ...; " \
+ "run nandargs; " \
+ "nand read ${fdt_addr_r} nanddtb; " \
+diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
+index 08c4d52d658f..9f1a6cd51b40 100644
+--- a/include/configs/siemens-am33x-common.h
++++ b/include/configs/siemens-am33x-common.h
+@@ -237,7 +237,7 @@
+ "nand_active_ubi_vol=rootfs_a\0" \
+ "nand_active_ubi_vol_A=rootfs_a\0" \
+ "nand_active_ubi_vol_B=rootfs_b\0" \
+- "nand_root_fs_type=ubifs rootwait=1\0" \
++ "nand_root_fs_type=ubifs rootwait\0" \
+ "nand_src_addr=0x280000\0" \
+ "nand_src_addr_A=0x280000\0" \
+ "nand_src_addr_B=0x780000\0" \
+@@ -314,7 +314,7 @@
+ "nand_active_ubi_vol=rootfs_a\0" \
+ "rootfs_name=rootfs\0" \
+ "kernel_name=uImage\0"\
+- "nand_root_fs_type=ubifs rootwait=1\0" \
++ "nand_root_fs_type=ubifs rootwait\0" \
+ "nand_args=run bootargs_defaults;" \
+ "mtdparts default;" \
+ "setenv ${partitionset_active} true;" \
+diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
+index 57f013cbf846..133daecf7164 100644
+--- a/include/configs/ti_armv7_keystone2.h
++++ b/include/configs/ti_armv7_keystone2.h
+@@ -180,7 +180,7 @@
+ "sf write ${loadaddr} 0 ${filesize}\0" \
+ "burn_uboot_nand=nand erase 0 0x100000; " \
+ "nand write ${loadaddr} 0 ${filesize}\0" \
+- "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1 " \
++ "args_all=setenv bootargs console=ttyS0,115200n8 rootwait " \
+ KERNEL_MTD_PARTS \
+ "args_net=setenv bootargs ${bootargs} rootfstype=nfs " \
+ "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \
+diff --git a/include/environment/ti/nand.h b/include/environment/ti/nand.h
+index 11dcefcc41ca..7d00afa2b10f 100644
+--- a/include/environment/ti/nand.h
++++ b/include/environment/ti/nand.h
+@@ -14,7 +14,7 @@
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype}\0" \
+ "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \
+- "nandrootfstype=ubifs rootwait=1\0" \
++ "nandrootfstype=ubifs rootwait\0" \
+ "nandboot=echo Booting from nand ...; " \
+ "run nandargs; " \
+ "nand read ${fdtaddr} NAND.u-boot-spl-os; " \
+--
+2.32.0
+
new file mode 100644
@@ -0,0 +1,42 @@
+From 9fc117eedd61161e1449222bf66af4414333d62c Mon Sep 17 00:00:00 2001
+From: Dario Binacchi <dario.binacchi@amarulasolutions.com>
+Date: Wed, 18 May 2022 18:43:34 +0200
+Subject: [PATCH 07/10] configs: imx8mn_bsh_smm_s2: add NAND driver
+
+It allows to boot from NAND.
+
+Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
+Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
+Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
+---
+ configs/imx8mn_bsh_smm_s2_defconfig | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig
+index 49f425300151..08f52e50609b 100644
+--- a/configs/imx8mn_bsh_smm_s2_defconfig
++++ b/configs/imx8mn_bsh_smm_s2_defconfig
+@@ -30,8 +30,10 @@ CONFIG_SPL_BOARD_INIT=y
+ CONFIG_SPL_BOOTROM_SUPPORT=y
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
++CONFIG_SPL_DMA=y
+ CONFIG_SPL_I2C=y
+ CONFIG_SPL_MTD_SUPPORT=y
++CONFIG_SPL_NAND_SUPPORT=y
+ CONFIG_SPL_POWER=y
+ CONFIG_SPL_WATCHDOG=y
+ CONFIG_SYS_PROMPT="> "
+@@ -65,6 +67,9 @@ CONFIG_SYS_NAND_USE_FLASH_BBT=y
+ CONFIG_NAND_MXS=y
+ CONFIG_NAND_MXS_DT=y
+ CONFIG_SYS_NAND_ONFI_DETECTION=y
++CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
++CONFIG_SYS_NAND_U_BOOT_OFFS=0xD8000
++CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x4058000
+ CONFIG_PHYLIB=y
+ CONFIG_PHY_NXP_TJA11XX=y
+ CONFIG_DM_ETH=y
+--
+2.32.0
+
new file mode 100644
@@ -0,0 +1,29 @@
+From bbc8da82b648591be6a6ae866168d2aa18d1b55f Mon Sep 17 00:00:00 2001
+From: Dario Binacchi <dario.binacchi@amarulasolutions.com>
+Date: Thu, 26 May 2022 10:20:49 +0200
+Subject: [PATCH 08/10] configs: imx8mn_bsh_smm_s2: add UBI commands
+
+They allow to flash the ubifs rootfs.
+
+Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
+Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
+Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
+---
+ configs/imx8mn_bsh_smm_s2_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig
+index 08f52e50609b..f8c75a2b237e 100644
+--- a/configs/imx8mn_bsh_smm_s2_defconfig
++++ b/configs/imx8mn_bsh_smm_s2_defconfig
+@@ -43,6 +43,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
+ CONFIG_CMD_MTDPARTS=y
+ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
+ CONFIG_MTDPARTS_DEFAULT="gpmi-nand:64m(nandboot),16m(nandfit),32m(nandkernel),1m(nanddtb),8m(nandtee),-(nandrootfs)"
++CONFIG_CMD_UBI=y
+ CONFIG_OF_CONTROL=y
+ CONFIG_SPL_OF_CONTROL=y
+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+--
+2.32.0
+
new file mode 100644
@@ -0,0 +1,32 @@
+From 0bc2d78f1f08f8517e83dadc265f7ad7ecc5e68e Mon Sep 17 00:00:00 2001
+From: Dario Binacchi <dario.binacchi@amarulasolutions.com>
+Date: Thu, 26 May 2022 10:56:38 +0200
+Subject: [PATCH 09/10] configs: imx8mn_bsh_smm_s2: remove console from
+ bootargs
+
+The Linux kernel device tree already specifies the device to be used for
+boot console output with a stdout-path property under /chosen.
+
+Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
+Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
+Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
+---
+ include/configs/imx8mn_bsh_smm_s2.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/include/configs/imx8mn_bsh_smm_s2.h b/include/configs/imx8mn_bsh_smm_s2.h
+index f7529783692e..17722488ab3f 100644
+--- a/include/configs/imx8mn_bsh_smm_s2.h
++++ b/include/configs/imx8mn_bsh_smm_s2.h
+@@ -16,7 +16,7 @@
+ #define NANDARGS \
+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
+- "nandargs=setenv bootargs console=${console} " \
++ "nandargs=setenv bootargs " \
+ "${optargs} " \
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype}\0" \
+--
+2.32.0
+
new file mode 100644
@@ -0,0 +1,30 @@
+From 790d25e150c78afbc230e76e05de01f21a75996e Mon Sep 17 00:00:00 2001
+From: Dario Binacchi <dario.binacchi@amarulasolutions.com>
+Date: Thu, 26 May 2022 11:00:33 +0200
+Subject: [PATCH 10/10] configs: imx8mn_bsh_smm_s2: add mtdparts to bootargs
+
+Passing the mtdparts environment variable to the Linux kernel is
+required to properly mount the UBI rootfs.
+
+Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
+Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
+Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
+---
+ include/configs/imx8mn_bsh_smm_s2.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/include/configs/imx8mn_bsh_smm_s2.h b/include/configs/imx8mn_bsh_smm_s2.h
+index 17722488ab3f..0dc514f00684 100644
+--- a/include/configs/imx8mn_bsh_smm_s2.h
++++ b/include/configs/imx8mn_bsh_smm_s2.h
+@@ -18,6 +18,7 @@
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
+ "nandargs=setenv bootargs " \
+ "${optargs} " \
++ "mtdparts=${mtdparts} " \
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype}\0" \
+ "nandroot=ubi0:root rw ubi.mtd=nandrootfs\0" \
+--
+2.32.0
+
new file mode 100755
@@ -0,0 +1,4 @@
+#!/bin/sh
+BOARD_DIR="$(dirname $0)"
+
+cp ${BOARD_DIR}/nand-full.lst ${BINARIES_DIR}
new file mode 100644
@@ -0,0 +1,75 @@
+i.MX8MN BSH SMM S2
+==================
+
+This tutorial describes how to use the predefined Buildroot
+configuration for the i.MX8MN BSH SMM S2 PRO board.
+
+Building
+--------
+
+Configure buildroot:
+
+ $ make imx8mn_bsh_smm_s2_defconfig
+
+Change settings to fit your needs (optional):
+
+ $ make menuconfig
+
+Compile everything and build the rootfs image:
+
+ $ make
+
+
+Result of the build
+-------------------
+
+After building, the output/images directory contains:
+
+ output/images/
+ ├── bl31.bin
+ ├── ddr3*
+ ├── flash.bin
+ ├── freescale/imx8mn-bsh-smm-s2.dtb
+ ├── Image
+ ├── nand-full.lst
+ ├── rootfs.ext2
+ ├── rootfs.ext4 -> rootfs.ext2
+ ├── rootfs.tar
+ ├── rootfs.ubifs
+ ├── u-boot.bin
+ └── u-boot-spl.bin
+
+
+Preparing the board
+-------------------
+
+Plug the USB type A to micro B cable into the USB Debug
+Connector (DBG UART). Use serial port settings 115200 8N1
+to access the debug console.
+
+Plug another USB type A to micro B cable into the USB-OTG
+Connector (USB1). This connection is used to flash the board
+firmware using the Freescale/NXP UUU tool.
+
+Connect the power supply/adaptor to the DC Power Jack (labelled
++5V).
+
+
+Flashing
+--------
+
+Power up the board by switching on the Power ON Switch, which is
+placed right next to the DC Jack.
+
+Enter the following U-Boot commands on the debug serial console:
+
+ $ nand erase.chip
+ $ reset
+
+Flash the built images directly to board’s memory. On your computer,
+run:
+
+ $ board/bsh/imx8mn-bsh-smm-s2/flash.sh output/
+
+It will flash the bootloader, the Device Tree Blob, the kernel image
+and the UBI root file system.
new file mode 100644
@@ -0,0 +1,44 @@
+BR2_aarch64=y
+BR2_GLOBAL_PATCH_DIR="board/bsh/imx8mn-bsh-smm-s2/patches"
+BR2_TARGET_GENERIC_GETTY_PORT="ttymxc3"
+BR2_ROOTFS_POST_BUILD_SCRIPT="board/bsh/imx8mn-bsh-smm-s2/post-build.sh"
+BR2_LINUX_KERNEL=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.18"
+BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
+BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/bsh/imx8mn-bsh-smm-s2/linux.config"
+BR2_LINUX_KERNEL_DTS_SUPPORT=y
+BR2_LINUX_KERNEL_INTREE_DTS_NAME="freescale/imx8mn-bsh-smm-s2"
+BR2_LINUX_KERNEL_DTB_KEEP_DIRNAME=y
+BR2_LINUX_KERNEL_INSTALL_TARGET=y
+BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
+BR2_PACKAGE_FREESCALE_IMX=y
+BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8MN=y
+BR2_PACKAGE_FIRMWARE_IMX=y
+BR2_PACKAGE_FIRMWARE_IMX_DDR3=y
+BR2_TARGET_ROOTFS_EXT2=y
+BR2_TARGET_ROOTFS_EXT2_4=y
+BR2_TARGET_ROOTFS_EXT2_SIZE="120M"
+BR2_TARGET_ROOTFS_UBIFS=y
+BR2_TARGET_ROOTFS_UBIFS_LEBSIZE=0x1f000
+BR2_TARGET_ROOTFS_UBIFS_RT_NONE=y
+BR2_TARGET_ARM_TRUSTED_FIRMWARE=y
+BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_VERSION=y
+BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_VERSION_VALUE="v2.5"
+BR2_TARGET_ARM_TRUSTED_FIRMWARE_PLATFORM="imx8mn"
+BR2_TARGET_ARM_TRUSTED_FIRMWARE_ADDITIONAL_VARIABLES="IMX_BOOT_UART_BASE=0x30a60000"
+BR2_TARGET_ARM_TRUSTED_FIRMWARE_DEBUG=y
+BR2_TARGET_UBOOT=y
+BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_VERSION=y
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2022.07-rc2"
+BR2_TARGET_UBOOT_BOARD_DEFCONFIG="imx8mn_bsh_smm_s2"
+BR2_TARGET_UBOOT_NEEDS_DTC=y
+BR2_TARGET_UBOOT_NEEDS_PYLIBFDT=y
+BR2_TARGET_UBOOT_NEEDS_OPENSSL=y
+BR2_TARGET_UBOOT_NEEDS_ATF_BL31=y
+BR2_TARGET_UBOOT_NEEDS_IMX_FIRMWARE=y
+BR2_TARGET_UBOOT_FORMAT_CUSTOM=y
+BR2_TARGET_UBOOT_FORMAT_CUSTOM_NAME="flash.bin"
+BR2_TARGET_UBOOT_SPL=y
+BR2_PACKAGE_HOST_UUU=y