@@ -93,6 +93,11 @@ struct mxs_gpmi_regs {
#define GPMI_CTRL1_DECOUPLE_CS (1 << 24)
#define GPMI_CTRL1_WRN_DLY_SEL_MASK (0x3 << 22)
#define GPMI_CTRL1_WRN_DLY_SEL_OFFSET 22
+#define GPMI_CTRL1_WRN_DLY_SEL_4_TO_8NS 0x0
+#define GPMI_CTRL1_WRN_DLY_SEL_6_TO_10NS 0x1
+#define GPMI_CTRL1_WRN_DLY_SEL_7_TO_12NS 0x2
+#define GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY 0x3
+
#define GPMI_CTRL1_TIMEOUT_IRQ_EN (1 << 20)
#define GPMI_CTRL1_GANGED_RDYBUSY (1 << 19)
#define GPMI_CTRL1_BCH_MODE (1 << 18)
@@ -111,6 +116,10 @@ struct mxs_gpmi_regs {
#define GPMI_CTRL1_ATA_IRQRDY_POLARITY (1 << 2)
#define GPMI_CTRL1_CAMERA_MODE (1 << 1)
#define GPMI_CTRL1_GPMI_MODE (1 << 0)
+#define GPMI_CTRL1_CLEAR_MASK (GPMI_CTRL1_WRN_DLY_SEL_MASK | \
+ GPMI_CTRL1_DLL_ENABLE | \
+ GPMI_CTRL1_RDN_DELAY_MASK | \
+ GPMI_CTRL1_HALF_PERIOD)
#define GPMI_TIMING0_ADDRESS_SETUP_MASK (0xff << 16)
#define GPMI_TIMING0_ADDRESS_SETUP_OFFSET 16