| Message ID | 20241227165719.3902388-19-dario.binacchi@amarulasolutions.com |
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From: Dario Binacchi <dario.binacchi@amarulasolutions.com>
To: linux-kernel@vger.kernel.org
Cc: linux-amarula@amarulasolutions.com,
Dario Binacchi <dario.binacchi@amarulasolutions.com>,
Conor Dooley <conor+dt@kernel.org>,
Fabio Estevam <festevam@gmail.com>,
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Shawn Guo <shawnguo@kernel.org>,
devicetree@vger.kernel.org,
imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 18/23] arm64: dts: imx8mm: add PLLs to clock controller
module (CCM)
Date: Fri, 27 Dec 2024 17:56:21 +0100
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diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index b1a4cc521bf4..c3287978c42b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -642,9 +642,14 @@ clk: clock-controller@30380000 { <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; #clock-cells = <1>; clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, - <&clk_ext3>, <&clk_ext4>; + <&clk_ext3>, <&clk_ext4>, + <&anatop IMX8MM_ANATOP_AUDIO_PLL1>, + <&anatop IMX8MM_ANATOP_AUDIO_PLL1>, + <&anatop IMX8MM_ANATOP_DRAM_PLL>, + <&anatop IMX8MM_ANATOP_VIDEO_PLL>; clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", - "clk_ext3", "clk_ext4"; + "clk_ext3", "clk_ext4", "audio_pll1", "audio_pll2", + "dram_pll", "video_pll"; fsl,anatop = <&anatop>; assigned-clocks = <&clk IMX8MM_CLK_A53_SRC>, <&clk IMX8MM_CLK_A53_CORE>,
Add the PLLs generated by anatop to the clock list of the Clock Controller Module (CCM) node. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> --- (no changes since v4) Changes in v4: - New arch/arm64/boot/dts/freescale/imx8mm.dtsi | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)