| Message ID | 20260107194541.1843999-1-dario.binacchi@amarulasolutions.com |
|---|---|
| State | New |
| Headers | show |
| Series |
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| Related | show |
On Wed, 07 Jan 2026 20:45:32 +0100, Dario Binacchi wrote: > Add devicetree bindings for TAMP backup registers. These 32-bit > registers are retained in all low-power modes and in VBAT mode. As a > result, they can also be used to store sensitive data because their > content is protected by a tamper detection circuit. > > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > --- > > .../bindings/nvmem/st,stm32-tamp-nvram.yaml | 55 +++++++++++++++++++ > 1 file changed, 55 insertions(+) > create mode 100644 Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade This patch series was applied (using b4) to base: Base: f0b9d8eb98dfee8d00419aa07543bdc2c1a44fb1 (use --merge-base to override) If this is not the correct base, please add 'base-commit' tag (or use b4 which does this automatically) New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/st/' for 20260107194541.1843999-1-dario.binacchi@amarulasolutions.com: arch/arm64/boot/dts/st/stm32mp257f-dk.dtb: tamp@46010000 (st,stm32-tamp): '#address-cells', '#size-cells', 'nvram@46010100', 'ranges' do not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/arm/stm32/st,stm32-syscon.yaml arch/arm64/boot/dts/st/stm32mp257f-ev1.dtb: tamp@46010000 (st,stm32-tamp): '#address-cells', '#size-cells', 'nvram@46010100', 'ranges' do not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/arm/stm32/st,stm32-syscon.yaml To unsubscribe from this group and stop receiving emails from it, send an email to linux-amarula+unsubscribe@amarulasolutions.com.
diff --git a/Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml b/Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml new file mode 100644 index 000000000000..e03469fbe436 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/st,stm32-tamp-nvram.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 TAMP's NVRAM + +description: | + The TAMP peripheral integrates, amongst others, Non Volatile RAM + (NVRAM) with 32/128 32-bit backup registers which can be used by + software to store information or communicate with a boot loader. + +maintainers: + - Dario Binacchi <dario.binacchi@amarulasolutions.com> + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + enum: + - st,stm32mp15-tamp-nvram + - st,stm32mp25-tamp-nvram + + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + nvram: nvram@46010100 { + compatible = "st,stm32mp25-tamp-nvram"; + reg = <0x46010100 0x200>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + fwu_info: tamp-bkp@c0 { + reg = <0xc0 0x4>; + }; + + boot_mode: tamp-bkp@180 { + reg = <0x180 0x4>; + }; + }; + }; +...
Add devicetree bindings for TAMP backup registers. These 32-bit registers are retained in all low-power modes and in VBAT mode. As a result, they can also be used to store sensitive data because their content is protected by a tamper detection circuit. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> --- .../bindings/nvmem/st,stm32-tamp-nvram.yaml | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml