[2/2] arm64: dts: st: add TAMP-NVRAM support for STM32MP25

Message ID 20260107194541.1843999-2-dario.binacchi@amarulasolutions.com
State New
Headers show
Series
  • [1/2] dt-bindings: nvmem: add STM32 TAMP NVRAM
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Commit Message

Dario Binacchi Jan. 7, 2026, 7:45 p.m. UTC
Add the TAMP node along with its NVRAM child node and define the
fixed-layout for fwu_info and boot_mode registers.

The TAMP (Tamper and backup registers) block is a system controller that
provides access to backup registers as NVMEM storage that persists across
reboots.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

---

 arch/arm64/boot/dts/st/stm32mp251.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

Patch

diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index a8e6e0f77b83..c7839e732f31 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -2084,6 +2084,32 @@  rtc: rtc@46000000 {
 			status = "disabled";
 		};
 
+		tamp: tamp@46010000 {
+			compatible = "st,stm32-tamp", "syscon", "simple-mfd";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0x46010000 0x400>;
+			ranges;
+
+			nvram: nvram@46010100 {
+				compatible = "st,stm32mp25-tamp-nvram";
+				reg = <0x46010100 0x200>;
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					fwu_info: tamp-bkp@c0 {
+						reg = <0xc0 0x4>;
+					};
+
+					boot_mode: tamp-bkp@180 {
+						reg = <0x180 0x4>;
+					};
+				};
+			};
+		};
+
 		pinctrl_z: pinctrl@46200000 {
 			#address-cells = <1>;
 			#size-cells = <1>;